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Fix errors in handling interrupt bits on context restore

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1540 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-02-28 21:52:35 +00:00
parent 71fe52975d
commit 09f42c9736
3 changed files with 4 additions and 4 deletions
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2
arch/z80/src/ez80/ez80_restorecontext.asm
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@ -99,7 +99,7 @@ _ez80_restorecontext:
; Restore interrupt state ; Restore interrupt state
ex af, af' ; Recover interrupt state ex af, af' ; Recover interrupt state
jp po, noinrestore ; No parity, IFF2=0, means disabled jp po, noinrestore ; Odd parity, IFF2=0, means disabled
ex af, af' ; Restore AF (before enabling interrupts) ex af, af' ; Restore AF (before enabling interrupts)
ei ; yes.. Enable interrupts ei ; yes.. Enable interrupts
ret ; and return ret ; and return

2
arch/z80/src/ez80/ez80_saveusercontext.asm
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@ -122,7 +122,7 @@ _ez80_saveusercontext:
; Save the current interrupt state at offset 0 ; Save the current interrupt state at offset 0
ld a, i ; Get interrupt state ld a, i ; Get interrupt state in parity bit
push af push af
pop hl pop hl
ld (iy + XCPT_I), hl ; Index 0: I w/interrupt state in parity/overflow ld (iy + XCPT_I), hl ; Index 0: I w/interrupt state in parity/overflow

2
arch/z80/src/ez80/ez80_timerisr.c
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@ -76,7 +76,7 @@
int up_timerisr(int irq, chipreg_t *regs) int up_timerisr(int irq, chipreg_t *regs)
{ {
ubyte reg; volatile ubyte reg;
/* Read the appropropriate timer0 registr to clear the interrupt */ /* Read the appropropriate timer0 registr to clear the interrupt */