From 0a1da7eacade5cb23c67a3b2211438fa7c5679e7 Mon Sep 17 00:00:00 2001 From: Juha Niskanen Date: Wed, 30 Aug 2017 11:40:58 +0300 Subject: [PATCH] configs: update STM32L4 configs for ADC changes Signed-off-by: Juha Niskanen --- configs/nucleo-f072rb/README.txt | 3 +- configs/nucleo-f072rb/src/stm32_bringup.c | 2 +- configs/nucleo-f091rc/README.txt | 7 +- configs/nucleo-l432kc/include/board.h | 6 +- configs/nucleo-l432kc/src/stm32_adc.c | 22 +- configs/nucleo-l452re/include/board.h | 13 + configs/nucleo-l452re/nsh/defconfig | 24 +- configs/nucleo-l452re/src/Makefile | 8 + configs/nucleo-l452re/src/nucleo-l452re.h | 30 ++ configs/nucleo-l452re/src/stm32_adc.c | 309 ++++++++++++++++++ configs/nucleo-l452re/src/stm32_bringup.c | 12 + configs/nucleo-l452re/src/stm32_dac.c | 94 ++++++ configs/nucleo-l476rg/include/board.h | 6 + configs/nucleo-l476rg/src/stm32_adc.c | 26 +- configs/nucleo-l476rg/src/stm32_ajoystick.c | 18 +- configs/nucleo-l476rg/src/stm32_buttons.c | 6 +- configs/nucleo-l496zg/README.txt | 105 ++---- configs/nucleo-l496zg/include/board.h | 4 +- configs/nucleo-l496zg/nsh/defconfig | 27 +- configs/nucleo-l496zg/src/stm32_adc.c | 97 +++++- configs/stm32l476-mdk/src/stm32_clockconfig.c | 13 - .../stm32l476vg-disco/src/stm32_clockconfig.c | 13 - 22 files changed, 670 insertions(+), 175 deletions(-) create mode 100644 configs/nucleo-l452re/src/stm32_adc.c create mode 100644 configs/nucleo-l452re/src/stm32_dac.c diff --git a/configs/nucleo-f072rb/README.txt b/configs/nucleo-f072rb/README.txt index ff54adc15a..a7e39499b9 100644 --- a/configs/nucleo-f072rb/README.txt +++ b/configs/nucleo-f072rb/README.txt @@ -329,5 +329,4 @@ Configurations CONFIG_HAVE_CXXINITIALIZE=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y - And also support fo C++ constructors under - apps/platform/nucleo-stm32f072rb. + And also support for C++ constructors under apps/platform. diff --git a/configs/nucleo-f072rb/src/stm32_bringup.c b/configs/nucleo-f072rb/src/stm32_bringup.c index e3f8698a6f..255e65f9b9 100644 --- a/configs/nucleo-f072rb/src/stm32_bringup.c +++ b/configs/nucleo-f072rb/src/stm32_bringup.c @@ -49,7 +49,7 @@ #include "nucleo-f072rb.h" /**************************************************************************** - * Pre-processor Defintiionis + * Pre-processor Definitions ****************************************************************************/ #undef HAVE_I2C_DRIVER diff --git a/configs/nucleo-f091rc/README.txt b/configs/nucleo-f091rc/README.txt index 83798de161..0937488eec 100644 --- a/configs/nucleo-f091rc/README.txt +++ b/configs/nucleo-f091rc/README.txt @@ -95,7 +95,7 @@ Serial Console TTL to RS-232 converter connection: - Nucleo CN10 STM32F072RB + Nucleo CN10 STM32F091RC ----------- ------------ Pin 21 PA9 USART1_TX *Warning you make need to reverse RX/TX on Pin 33 PA10 USART1_RX some RS-232 converters @@ -281,7 +281,7 @@ Configurations 40231 92 1208 41531 a23b nuttx Those additional features cost about 8KiB FLASH. I believe that is a - good use of the STM32F072RB's FLASH, but if you interested in the + good use of the STM32F091RC's FLASH, but if you interested in the more minimal configuration, here is what was changed: Removed @@ -315,5 +315,4 @@ Configurations CONFIG_HAVE_CXXINITIALIZE=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y - And also support fo C++ constructors under - apps/platform/nucleo-stm32f072rb. + And also support for C++ constructors under apps/platform. diff --git a/configs/nucleo-l432kc/include/board.h b/configs/nucleo-l432kc/include/board.h index de5fdb345c..cbec4b9c37 100644 --- a/configs/nucleo-l432kc/include/board.h +++ b/configs/nucleo-l432kc/include/board.h @@ -62,7 +62,7 @@ * is we set aside more DMA channels/streams. */ -/* Values defined in arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h */ +/* Values defined in arch/arm/src/stm32l4/chip/stm32l4x3xx_dma.h */ #define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices */ @@ -73,6 +73,10 @@ #define DMACHAN_USART1_RX DMACHAN_USART1_RX_2 +/* ADC */ + +#define ADC1_DMA_CHAN DMACHAN_ADC1_1 + /* Alternate function pin selections ************************************************/ /* USART1: diff --git a/configs/nucleo-l432kc/src/stm32_adc.c b/configs/nucleo-l432kc/src/stm32_adc.c index 775d83190b..c2aeaf3da7 100644 --- a/configs/nucleo-l432kc/src/stm32_adc.c +++ b/configs/nucleo-l432kc/src/stm32_adc.c @@ -52,7 +52,7 @@ #include "stm32l4_pwm.h" #include "nucleo-l432kc.h" -#ifdef CONFIG_STM32_ADC1 +#ifdef CONFIG_STM32L4_ADC1 /************************************************************************************ * Pre-processor Definitions @@ -73,20 +73,20 @@ #ifdef CONFIG_ADC_DMA -static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0, 1}; +static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {1, 2}; /* Configurations of pins used byte each ADC channels */ -static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0, GPIO_ADC1_IN0}; +static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN1, GPIO_ADC1_IN2}; #else /* Without DMA, only a single channel can be supported */ -static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0}; +static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {1}; /* Configurations of pins used byte each ADC channels */ -static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0}; +static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN1}; #endif /* CONFIG_ADC_DMA */ @@ -99,14 +99,14 @@ static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0}; ************************************************************************************/ /************************************************************************************ - * Name: stm32_adc_setup + * Name: stm32l4_adc_setup * * Description: * Initialize ADC and register the ADC driver. * ************************************************************************************/ -int stm32_adc_setup(void) +int stm32l4_adc_setup(void) { struct adc_dev_s *adc; int ret; @@ -116,12 +116,12 @@ int stm32_adc_setup(void) for (i = 0; i < ADC1_NCHANNELS; i++) { - stm32_configgpio(g_adc1_pinlist[i]); + stm32l4_configgpio(g_adc1_pinlist[i]); } - /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + /* Call stm32l4_adc_initialize() to get an instance of the ADC interface */ - adc = stm32_adcinitialize(1, g_adc1_chanlist, ADC1_NCHANNELS); + adc = stm32l4_adc_initialize(1, g_adc1_chanlist, ADC1_NCHANNELS); if (adc == NULL) { aerr("ERROR: Failed to get ADC interface\n"); @@ -140,4 +140,4 @@ int stm32_adc_setup(void) return OK; } -#endif /* CONFIG_STM32_ADC1 */ +#endif /* CONFIG_STM32L4_ADC1 */ diff --git a/configs/nucleo-l452re/include/board.h b/configs/nucleo-l452re/include/board.h index 2e2a85e993..b891fb272a 100644 --- a/configs/nucleo-l452re/include/board.h +++ b/configs/nucleo-l452re/include/board.h @@ -73,6 +73,10 @@ #define DMACHAN_USART1_RX DMACHAN_USART1_RX_2 +/* ADC */ + +#define ADC1_DMA_CHAN DMACHAN_ADC1_1 + /* Alternate function pin selections ************************************************/ /* USART1: @@ -208,6 +212,14 @@ #define BUTTON_USER_BIT (1 << BUTTON_USER) +/* ADC measurements + * Default is ADC1_IN9 (PA4) connected to CN8-connector pin 3, A2. + */ + +#define ADC1_MEASURE_CHANNEL 9 +#define GPIO_MEASURE_ADC (GPIO_ADC1_IN9) + + /* Quadrature encoder * Default is to use timer 5 (32-bit) and encoder on PA0/PA1 */ @@ -251,6 +263,7 @@ extern "C" /************************************************************************************ * Public Function Prototypes ************************************************************************************/ + /************************************************************************************ * Name: stm32l4_board_initialize * diff --git a/configs/nucleo-l452re/nsh/defconfig b/configs/nucleo-l452re/nsh/defconfig index 0479cab58c..1eddbe7888 100644 --- a/configs/nucleo-l452re/nsh/defconfig +++ b/configs/nucleo-l452re/nsh/defconfig @@ -1,27 +1,27 @@ -# CONFIG_ARCH_FPU is not set -# CONFIG_NSH_ARGCAT is not set -# CONFIG_NSH_CMDOPT_DF_H is not set -# CONFIG_NSH_CMDPARMS is not set +CONFIG_ADC=y CONFIG_ANALOG=y -CONFIG_ARCH_BOARD_NUCLEO_L452RE=y +CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="nucleo-l452re" +CONFIG_ARCH_BOARD_NUCLEO_L452RE=y CONFIG_ARCH_BUTTONS=y -CONFIG_ARCH_CHIP_STM32L4=y CONFIG_ARCH_CHIP_STM32L452RE=y +CONFIG_ARCH_CHIP_STM32L4=y +# CONFIG_ARCH_FPU is not set CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARCH="arm" CONFIG_ARMV7M_STACKCHECK=y CONFIG_BOARD_LOOPSPERMSEC=8499 CONFIG_BUILTIN=y +CONFIG_DAC=y CONFIG_DEBUG_ASSERTIONS=y CONFIG_DEBUG_ERROR=y CONFIG_DEBUG_FEATURES=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SYMBOLS=y CONFIG_DEBUG_WARN=y -CONFIG_DISABLE_POLL=y +CONFIG_EXAMPLES_ADC_SWTRIG=y +CONFIG_EXAMPLES_ADC=y CONFIG_EXAMPLES_ALARM=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y CONFIG_EXAMPLES_NSH=y @@ -29,8 +29,8 @@ CONFIG_EXAMPLES_OSTEST=y CONFIG_EXAMPLES_RANDOM=y CONFIG_FS_PROCFS_REGISTER=y CONFIG_FS_PROCFS=y -CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HAVE_CXX=y CONFIG_I2C_RESET=y CONFIG_I2C=y CONFIG_MAX_TASKS=16 @@ -39,7 +39,10 @@ CONFIG_MM_REGIONS=2 CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_ARGCAT is not set CONFIG_NSH_BUILTIN_APPS=y +# CONFIG_NSH_CMDOPT_DF_H is not set +# CONFIG_NSH_CMDPARMS is not set CONFIG_NSH_DISABLE_IFUPDOWN=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_LINELEN=64 @@ -63,6 +66,9 @@ CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y CONFIG_SERIAL_TERMIOS=y CONFIG_STACK_COLORATION=y +CONFIG_STM32L4_ADC1_DMA=y +CONFIG_STM32L4_ADC1=y +CONFIG_STM32L4_DAC1=y CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y CONFIG_STM32L4_DMA1=y CONFIG_STM32L4_DMA2=y diff --git a/configs/nucleo-l452re/src/Makefile b/configs/nucleo-l452re/src/Makefile index 4cd0f2e7c4..5a2875c8a4 100644 --- a/configs/nucleo-l452re/src/Makefile +++ b/configs/nucleo-l452re/src/Makefile @@ -49,6 +49,14 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y) CSRCS += stm32_buttons.c endif +ifeq ($(CONFIG_ADC),y) +CSRCS += stm32_adc.c +endif + +ifeq ($(CONFIG_DAC),y) +CSRCS += stm32_dac.c +endif + ifeq ($(CONFIG_LIB_BOARDCTL),y) CSRCS += stm32_appinit.c endif diff --git a/configs/nucleo-l452re/src/nucleo-l452re.h b/configs/nucleo-l452re/src/nucleo-l452re.h index 04df58ef3b..ae511be83e 100644 --- a/configs/nucleo-l452re/src/nucleo-l452re.h +++ b/configs/nucleo-l452re/src/nucleo-l452re.h @@ -129,6 +129,36 @@ * Public Functions ****************************************************************************/ +/************************************************************************************ + * Name: stm32l4_adc_setup + * + * Description: + * Initialize ADC and register the ADC driver. + * + ************************************************************************************/ + +int stm32l4_adc_setup(void); + +/************************************************************************************ + * Name: stm32l4_adc_measure_voltages + * + * Description: + * Read internal reference voltage, internal VBAT and one external voltage. + * + ************************************************************************************/ + +int stm32l4_adc_measure_voltages(uint32_t *vrefint, uint32_t *vbat, uint32_t *vext); + +/************************************************************************************ + * Name: stm32l4_dac_setup + * + * Description: + * Initialize DAC and register the DAC driver. + * + ************************************************************************************/ + +int stm32l4_dac_setup(void); + /**************************************************************************** * Name: stm32_bringup * diff --git a/configs/nucleo-l452re/src/stm32_adc.c b/configs/nucleo-l452re/src/stm32_adc.c new file mode 100644 index 0000000000..292b653780 --- /dev/null +++ b/configs/nucleo-l452re/src/stm32_adc.c @@ -0,0 +1,309 @@ +/***************************************************************************** + * configs/nucleo-l452re/src/stm32_adc.c + * + * Copyright (C) 2017 Haltian Ltd. All rights reserved. + * Authors: Juha Niskanen + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include "stm32l4_gpio.h" +#include "stm32l4_adc.h" +#include "nucleo-l452re.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* STM32 chip specific calibration values *******************************************/ + +/* Voltage used for calibration of internal analog reference voltage (Vrefint) */ +#if defined(CONFIG_ARCH_CHIP_STM32F7) \ + || defined(CONFIG_ARCH_CHIP_STM32F4) \ + || defined(CONFIG_ARCH_CHIP_STM32F0) +# define STM32_VREFINT_MVOLTS ((uint32_t)3300) +#elif defined(CONFIG_ARCH_CHIP_STM32L4) || defined(CONFIG_STM32L15XXX) +# define STM32_VREFINT_MVOLTS ((uint32_t)3000) +#endif + +/* Internal reference voltage calibration value locations. Taken from + * https://github.com/micropython/micropython/commit/87215a0f0480dd0324a1b9c1d3fc3a5c2806249d + * + * F0 value from DM00115237 Rev 4 p. 19. for STM32F091xB and STM32F091xC + * + * Note: These seems to not vary between MCUs of a given family, but + * should nevertheless be verified from data-sheet when porting this + * file to a new chip. + */ +#if defined(CONFIG_ARCH_CHIP_STM32F7) +# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1ff0f44a)) +#elif defined(CONFIG_ARCH_CHIP_STM32F4) +# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1fff7a2a)) +#elif defined(CONFIG_ARCH_CHIP_STM32F0) +# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1ffff7ba)) +#elif defined(CONFIG_ARCH_CHIP_STM32L4) +# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1fff75aa)) +#elif defined(CONFIG_STM32L15XXX) +# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1ff800f8)) +#endif + +/* Internal temperature sensor calibration locations. Taken from + * STM32L452 datasheet. + */ +#if defined(CONFIG_ARCH_CHIP_STM32L4) + +/* TS ADC raw data acquired at a temperature of 30 °C (± 5 °C) */ +# define STM32_TSENSE_TSCAL1 (*(int16_t *)((uint32_t)0x1fff75a8)) + +/* TS ADC raw data acquired at a temperature of 130 °C (± 5 °C) */ + +# define STM32_TSENSE_TSCAL2 (*(int16_t *)((uint32_t)0x1fff75ca)) +#endif + +/* Configuration ********************************************************************/ + +/* These are internal to STM32L4 */ + +#define ADC1_INTERNAL_VREFINT_CHANNEL 0 +#define ADC1_INTERNAL_TSENSE_CHANNEL 17 +#define ADC1_INTERNAL_VBATDIV3_CHANNEL 18 + +/* Application specific channel defined in board.h */ + +/* The number of ADC channels in the conversion list */ + +#define ADC1_NCHANNELS 4 + +#if ADC1_NCHANNELS > 1 && !defined(CONFIG_STM32L4_ADC1_DMA) +# warning "Reading multiple channels without DMA might cause overruns!" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static struct adc_dev_s *g_adc; + +static const uint8_t g_chanlist[ADC1_NCHANNELS] = +{ + ADC1_INTERNAL_VREFINT_CHANNEL, + ADC1_INTERNAL_TSENSE_CHANNEL, + ADC1_INTERNAL_VBATDIV3_CHANNEL, + ADC1_MEASURE_CHANNEL, +}; + +/* Configurations of pins used by each ADC channel */ + +static const uint32_t g_pinlist[ADC1_NCHANNELS] = +{ + 0xffffffffU, + 0xffffffffU, + 0xffffffffU, + GPIO_MEASURE_ADC, +}; + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32l4_adc_measure_voltages + * + * Description: + * Read internal reference voltage, internal VBAT and one external voltage. + * + ************************************************************************************/ + +int stm32l4_adc_measure_voltages(uint32_t *vrefint, uint32_t *vbat, uint32_t *vext) +{ + ssize_t nbytes; + struct adc_msg_s sample[ADC1_NCHANNELS] = { 0 }; + int nsamples; + int fd, ret, errval; + + fd = open("/dev/adc0", O_RDONLY); + if (fd < 0) + { + _err("Cannot open ADC converter\n"); + ret = fd; + goto out; + } + + ret = ioctl(fd, ANIOC_TRIGGER, 0); + if (ret < 0) + { + _err("Cannot trigger ADC conversion\n"); + goto out_close; + } + + nbytes = read(fd, sample, sizeof(sample)); + if (nbytes < 0) + { + errval = errno; + ret = -errval; + if (errval != EINTR) + { + _err("read failed: %d\n", errval); + goto out_close; + } + + _info("Interrupted read...\n"); + goto out_close; + } + else if (nbytes == 0) + { + _err("No data read\n"); + ret = ERROR; + goto out_close; + } + + nsamples = nbytes / sizeof(struct adc_msg_s); + if (nsamples * sizeof(struct adc_msg_s) != nbytes) + { + _info("Read size=%ld is not a multiple of sample size=%d, Ignoring\n", + (long)nbytes, sizeof(struct adc_msg_s)); + } + else + { + int i; + int32_t tsense; + _info("Sample (nsamples = %d):\n", nsamples); + + *vrefint = *vbat = *vext = 0; + + for (i = 0; i < nsamples ; i++) + { + _info("%d: channel: %d value: %d\n", + i+1, sample[i].am_channel, sample[i].am_data); + + /* Add the raw value to entropy pool. */ + + add_sensor_randomness(sample[i].am_data); + + switch (sample[i].am_channel) + { + case ADC1_INTERNAL_VREFINT_CHANNEL: + /* Calculate corrected Vrefint with factory calibration value. */ + + *vrefint = STM32_VREFINT_MVOLTS * STM32_VREFINT_CAL / sample[i].am_data; + _info("VREFINT: %d -> %u mV\n", sample[i].am_data, *vrefint); + break; + case ADC1_INTERNAL_TSENSE_CHANNEL: + /* Calculate final temperature. Sensor precision is ±2 °C, + * so it does not matter much if we use integer type here. + */ + + tsense = (110 - 30) * (sample[i].am_data - STM32_TSENSE_TSCAL1) + / (STM32_TSENSE_TSCAL2 - STM32_TSENSE_TSCAL1) + 30; + _info("TSENSE: %d -> %d °C\n", sample[i].am_data, tsense); + break; + case ADC1_INTERNAL_VBATDIV3_CHANNEL: + *vbat = 3 * sample[i].am_data; + _info("VBAT/3: %d -> %u mV\n", sample[i].am_data, *vbat); + break; + case ADC1_MEASURE_CHANNEL: + *vext = sample[i].am_data; + _info("External channel: %d\n", *vext); + break; + default: + _err("ADC got value from unknown channel %d\n", sample[i].am_channel); + break; + } + } + } + +out_close: + close(fd); +out: + return ret; +} + +/************************************************************************************ + * Name: stm32l4_adc_setup + ************************************************************************************/ + +int stm32l4_adc_setup(void) +{ + static bool initialized = false; + + if (!initialized) + { +#ifdef CONFIG_STM32L4_ADC1 + int ret, i; + + /* Configure the pins as analog inputs for the selected channels */ + + for (i = 0; i < ADC1_NCHANNELS; i++) + { + if (g_pinlist[i] != 0xffffffffU) + { + stm32l4_configgpio(g_pinlist[i]); + } + } + + /* Call stm32l4_adc_initialize() to get an instance of the ADC interface */ + + g_adc = stm32l4_adc_initialize(1, g_chanlist, ADC1_NCHANNELS); + if (g_adc == NULL) + { + _err("Failed to get ADC interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc0" */ + + ret = adc_register("/dev/adc0", g_adc); + if (ret < 0) + { + _err("adc_register failed: %d\n", ret); + return ret; + } +#endif + initialized = true; + } + + return OK; +} diff --git a/configs/nucleo-l452re/src/stm32_bringup.c b/configs/nucleo-l452re/src/stm32_bringup.c index 1280168612..bcc426139a 100644 --- a/configs/nucleo-l452re/src/stm32_bringup.c +++ b/configs/nucleo-l452re/src/stm32_bringup.c @@ -112,6 +112,18 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_DAC + _info("Initializing DAC\n"); + + (void)stm32l4_dac_setup(); +#endif + +#ifdef CONFIG_ADC + _info("Initializing ADC\n"); + + (void)stm32l4_adc_setup(); +#endif + UNUSED(ret); return OK; } diff --git a/configs/nucleo-l452re/src/stm32_dac.c b/configs/nucleo-l452re/src/stm32_dac.c new file mode 100644 index 0000000000..efde2cd351 --- /dev/null +++ b/configs/nucleo-l452re/src/stm32_dac.c @@ -0,0 +1,94 @@ +/***************************************************************************** + * configs/nucleo-l452re/src/stm32_dac.c + * + * Copyright (C) 2017 Haltian Ltd. All rights reserved. + * Authors: Juha Niskanen + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include +#include +#include +#include "stm32l4_gpio.h" +#include "stm32l4_dac.h" +#include "nucleo-l452re.h" + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static struct dac_dev_s *g_dac; + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32l4_dac_setup + ************************************************************************************/ + +int stm32l4_dac_setup(void) +{ + static bool initialized = false; + + if (!initialized) + { +#ifdef CONFIG_STM32L4_DAC1 + int ret; + + g_dac = stm32l4_dacinitialize(0); + if (g_dac == NULL) + { + _err("Failed to get DAC interface\n"); + return -ENODEV; + } + + /* Register the DAC driver at "/dev/dac0" */ + + ret = dac_register("/dev/dac0", g_dac); + if (ret < 0) + { + _err("dac_register failed: %d\n", ret); + return ret; + } +#endif + initialized = true; + } + + return OK; +} diff --git a/configs/nucleo-l476rg/include/board.h b/configs/nucleo-l476rg/include/board.h index 0cbecee0c5..f1625efdf8 100644 --- a/configs/nucleo-l476rg/include/board.h +++ b/configs/nucleo-l476rg/include/board.h @@ -73,6 +73,12 @@ #define DMACHAN_USART1_RX DMACHAN_USART1_RX_2 +/* ADC */ + +#define ADC1_DMA_CHAN DMACHAN_ADC1_1 +#define ADC2_DMA_CHAN DMACHAN_ADC2_2 +#define ADC3_DMA_CHAN DMACHAN_ADC3_2 + /* Alternate function pin selections ************************************************/ /* USART1: diff --git a/configs/nucleo-l476rg/src/stm32_adc.c b/configs/nucleo-l476rg/src/stm32_adc.c index 7ca4b18ab0..fe613fb399 100644 --- a/configs/nucleo-l476rg/src/stm32_adc.c +++ b/configs/nucleo-l476rg/src/stm32_adc.c @@ -52,7 +52,7 @@ #include "stm32l4_pwm.h" #include "nucleo-l476rg.h" -#ifdef CONFIG_STM32_ADC1 +#ifdef CONFIG_STM32L4_ADC1 /************************************************************************************ * Pre-processor Definitions @@ -73,24 +73,24 @@ #ifdef CONFIG_AJOYSTICK #ifdef CONFIG_ADC_DMA -/* The Itead analog joystick gets inputs on ADC_IN0 and ADC_IN1 */ +/* The Itead analog joystick gets inputs on ADC_IN1 and ADC_IN2 */ -static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0, 1}; +static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {1, 2}; /* Configurations of pins used byte each ADC channels */ -static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0, GPIO_ADC1_IN0}; +static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN1, GPIO_ADC1_IN2}; #else /* Without DMA, only a single channel can be supported */ -/* The Itead analog joystick gets input on ADC_IN0 */ +/* The Itead analog joystick gets input on ADC_IN1 */ -static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {0}; +static const uint8_t g_adc1_chanlist[ADC1_NCHANNELS] = {1}; /* Configurations of pins used byte each ADC channels */ -static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0}; +static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN1}; #endif /* CONFIG_ADC_DMA */ #endif /* CONFIG_AJOYSTICK */ @@ -104,14 +104,14 @@ static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN0}; ************************************************************************************/ /************************************************************************************ - * Name: stm32_adc_setup + * Name: stm32l4_adc_setup * * Description: * Initialize ADC and register the ADC driver. * ************************************************************************************/ -int stm32_adc_setup(void) +int stm32l4_adc_setup(void) { struct adc_dev_s *adc; int ret; @@ -121,12 +121,12 @@ int stm32_adc_setup(void) for (i = 0; i < ADC1_NCHANNELS; i++) { - stm32_configgpio(g_adc1_pinlist[i]); + stm32l4_configgpio(g_adc1_pinlist[i]); } - /* Call stm32_adcinitialize() to get an instance of the ADC interface */ + /* Call stm32l4_adc_initialize() to get an instance of the ADC interface */ - adc = stm32_adcinitialize(1, g_adc1_chanlist, ADC1_NCHANNELS); + adc = stm32l4_adc_initialize(1, g_adc1_chanlist, ADC1_NCHANNELS); if (adc == NULL) { aerr("ERROR: Failed to get ADC interface\n"); @@ -145,4 +145,4 @@ int stm32_adc_setup(void) return OK; } -#endif /* CONFIG_STM32_ADC1 */ +#endif /* CONFIG_STM32L4_ADC1 */ diff --git a/configs/nucleo-l476rg/src/stm32_ajoystick.c b/configs/nucleo-l476rg/src/stm32_ajoystick.c index 3c20ebca2e..2864a98c93 100644 --- a/configs/nucleo-l476rg/src/stm32_ajoystick.c +++ b/configs/nucleo-l476rg/src/stm32_ajoystick.c @@ -1,5 +1,5 @@ /**************************************************************************** - * configs/nucleo-f3x1re/src/stm32_ajoystick.c + * configs/nucleo-l476rg/src/stm32_ajoystick.c * * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -62,8 +62,8 @@ # if !defined(CONFIG_ADC) # error CONFIG_ADC is required for the Itead joystick # undef CONFIG_AJOYSTICK -# elif !defined(CONFIG_STM32_ADC1) -# error CONFIG_STM32_ADC1 is required for Itead joystick +# elif !defined(CONFIG_STM32L4_ADC1) +# error CONFIG_STM32L4_ADC1 is required for Itead joystick # undef CONFIG_AJOYSTICK # endif #endif /* CONFIG_AJOYSTICK */ @@ -305,7 +305,7 @@ static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s *lower) * button is pressed. */ - if (!stm32_gpioread(g_joygpio[i])) + if (!stm32l4_gpioread(g_joygpio[i])) { ret |= (1 << i); } @@ -375,8 +375,8 @@ static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower, iinfo("GPIO %d: rising: %d falling: %d\n", i, rising, falling); - (void)stm32_gpiosetevent(g_joygpio[i], rising, falling, - true, ajoy_interrupt, NULL); + (void)stm32l4_gpiosetevent(g_joygpio[i], rising, falling, + true, ajoy_interrupt, NULL); } } } @@ -402,7 +402,7 @@ static void ajoy_disable(void) flags = up_irq_save(); for (i = 0; i < AJOY_NGPIOS; i++) { - (void)stm32_gpiosetevent(g_joygpio[i], false, false, false, NULL, NULL); + (void)stm32l4_gpiosetevent(g_joygpio[i], false, false, false, NULL, NULL); } up_irq_restore(flags); @@ -481,14 +481,14 @@ int board_ajoy_initialize(void) /* Configure the GPIO pins as interrupting inputs. NOTE: This is * unnecessary for interrupting pins since it will also be done by - * stm32_gpiosetevent(). + * stm32l4_gpiosetevent(). */ for (i = 0; i < AJOY_NGPIOS; i++) { /* Configure the PIO as an input */ - stm32_configgpio(g_joygpio[i]); + stm32l4_configgpio(g_joygpio[i]); } /* Register the joystick device as /dev/ajoy0 */ diff --git a/configs/nucleo-l476rg/src/stm32_buttons.c b/configs/nucleo-l476rg/src/stm32_buttons.c index 456795c304..de9ae2b161 100644 --- a/configs/nucleo-l476rg/src/stm32_buttons.c +++ b/configs/nucleo-l476rg/src/stm32_buttons.c @@ -71,7 +71,7 @@ void board_button_initialize(void) * also configured for the pin. */ - stm32_configgpio(GPIO_BTN_USER); + stm32l4_configgpio(GPIO_BTN_USER); } /**************************************************************************** @@ -84,7 +84,7 @@ uint32_t board_buttons(void) * pressed. */ - bool released = stm32_gpioread(GPIO_BTN_USER); + bool released = stm32l4_gpioread(GPIO_BTN_USER); return !released; } @@ -117,7 +117,7 @@ int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) if (id == BUTTON_USER) { - ret = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler, arg); + ret = stm32l4_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler, arg); } return ret; diff --git a/configs/nucleo-l496zg/README.txt b/configs/nucleo-l496zg/README.txt index c188dd8b82..deeb1988d8 100644 --- a/configs/nucleo-l496zg/README.txt +++ b/configs/nucleo-l496zg/README.txt @@ -2,9 +2,7 @@ README ====== This README discusses issues unique to NuttX configurations for the STMicro -Nucleo-144 board. See - -http://www.st.com/content/ccc/resource/technical/document/data_brief/group0/7b/df/1d/e9/64/55/43/8d/DM00247910/files/DM00247910.pdf/jcr:content/translations/en.DM00247910.pdf +Nucleo-144 board for STM32L4 chips. Contents ======== @@ -40,7 +38,7 @@ LQFP144 package. Variants include ------------- ------------------ -This directory supports the L4 variants of Nucleo-144 +This directory supports the STM32L4 variants of Nucleo-144. Please read the User Manual UM2179: Getting started with STM32 Nucleo board software development tools and take note of the Powering options for the @@ -218,97 +216,64 @@ Flashing RED - In the event of a fatal crash, all other LEDs will be Serial Consoles =============== -< Section needs updating > - USART6 (CONFIG_NUCLEO_CONSOLE_ARDUINO) + USART3 ------ - STM32F7 - ARDUIONO FUNCTION GPIO - -- ----- --------- ----- - DO RX USART6_RX PG9 - D1 TX USART6_TX PG14 - -- ----- --------- ----- - You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL - - Nucleo 144 FTDI TTL-232R-3V3 - ------------- ------------------- - TXD - D1-TXD - RXD - Pin 5 (Yellow) - RXD - D0-RXD - TXD - Pin 4 (Orange) - GND GND - GND Pin 1 (Black) - ------------- ------------------- - - *Note you will be reverse RX/TX - - Use make menuconfig to configure USART6 as the console: - - CONFIG_STM32F7_USART6=y - CONFIG_USARTs_SERIALDRIVER=y - CONFIG_USARTS_SERIAL_CONSOLE=y - CONFIG_USART6_RXBUFSIZE=256 - CONFIG_USART6_TXBUFSIZE=256 - CONFIG_USART6_BAUD=115200 - CONFIG_USART6_BITS=8 - CONFIG_USART6_PARITY=0 - CONFIG_USART6_2STOP=0 - - USART8 (CONFIG_NUCLEO_CONSOLE_MORPHO) - ------ + Default board is configured to use USART3 as console. Pins and Connectors: + FUNC GPIO Connector Pin NAME ---- --- ------- ---- - TXD: PE1 CN11-61, PE1 - RXD: PE0 CN12-64, PE0 - CN10-33, D34 + TXD: PC4 CN8-9, A4 + RXD: PC5 CN8-11, A5 ---- --- ------- ---- - You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL Nucleo 144 FTDI TTL-232R-3V3 ------------- ------------------- - TXD - CN11-61 - RXD - Pin 5 (Yellow) - RXD - CN12-64 - TXD - Pin 4 (Orange) - GND CN12-63 - GND Pin 1 (Black) + TXD - CN8-9 - RXD - Pin 5 (Yellow) + RXD - CN8-11 - TXD - Pin 4 (Orange) + GND - GND Pin 1 (Black) ------------- ------------------- *Note you will be reverse RX/TX - Use make menuconfig to configure USART8 as the console: + Use make menuconfig to configure USART3 as the console: - CONFIG_STM32L4_UART8=y - CONFIG_UART8_SERIALDRIVER=y - CONFIG_UART8_SERIAL_CONSOLE=y - CONFIG_UART8_RXBUFSIZE=256 - CONFIG_UART8_TXBUFSIZE=256 - CONFIG_UART8_BAUD=115200 - CONFIG_UART8_BITS=8 - CONFIG_UART8_PARITY=0 - CONFIG_UART8_2STOP=0 + CONFIG_STM32L4_USART3=y + CONFIG_USART3_SERIALDRIVER=y + CONFIG_USART3_SERIAL_CONSOLE=y + CONFIG_USART3_RXBUFSIZE=256 + CONFIG_USART3_TXBUFSIZE=256 + CONFIG_USART3_BAUD=115200 + CONFIG_USART3_BITS=8 + CONFIG_USART3_PARITY=0 + CONFIG_USART3_2STOP=0 - Virtual COM Port (CONFIG_NUCLEO_CONSOLE_VIRTUAL) + USART2 + ------ + + USART 2 could be used as console as well. + + Virtual COM Port ---------------- - Yet another option is to use USART3 and the USB virtual COM port. This + Yet another option is to use LPUART1 and the USB virtual COM port. This option may be more convenient for long term development, but is painful - to use during board bring-up. + to use during board bring-up. However as LPUART peripheral has not been + implemented for STM32L4, this cannot currently be used. Solder Bridges. This configuration requires: - PD8 USART3 TX SB5 ON and SB7 OFF (Default) - PD9 USART3 RX SB6 ON and SB4 OFF (Default) - - Configuring USART3 is the same as given above but add the S and #3. - - Question: What BAUD should be configure to interface with the Virtual - COM port? 115200 8N1? + PG7 LPUART1 TX SB131 ON and SB195 OFF (Default) + PG8 LPUART1 RX SB130 ON and SB193 OFF (Default) Default ------- - As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the - virtual COM port is enabled. - + As shipped, the virtual COM port is enabled. SPI --- @@ -320,7 +285,7 @@ SPI SDIO ---- - To test the SD performace one can use a SparkFun microSD Sniffer + To test the SD performance one can use a SparkFun microSD Sniffer from https://www.sparkfun.com/products/9419 or similar board and connect it as follows: @@ -371,8 +336,8 @@ nsh: CONFIG_HOST_LINUX=y : Builds under Linux CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : ARM GNU for Linux - 3. Although the default console is USART3 (which would correspond to + 3. Although the default console is LPUART1 (which would correspond to the Virtual COM port) I have done all testing with the console - device configured for UART8 (see instruction above under "Serial + device configured for USART3 (see instruction above under "Serial Consoles). diff --git a/configs/nucleo-l496zg/include/board.h b/configs/nucleo-l496zg/include/board.h index 8657c22734..7cfbf844f6 100644 --- a/configs/nucleo-l496zg/include/board.h +++ b/configs/nucleo-l496zg/include/board.h @@ -365,8 +365,8 @@ /* ADC */ #define ADC1_DMA_CHAN DMACHAN_ADC1_1 -#define ADC2_DMA_CHAN DMACHAN_ADC2_1 -#define ADC3_DMA_CHAN DMACHAN_ADC3_1 +#define ADC2_DMA_CHAN DMACHAN_ADC2_2 +#define ADC3_DMA_CHAN DMACHAN_ADC3_2 /* SPI * diff --git a/configs/nucleo-l496zg/nsh/defconfig b/configs/nucleo-l496zg/nsh/defconfig index 0ef0b4851f..d670aa8334 100644 --- a/configs/nucleo-l496zg/nsh/defconfig +++ b/configs/nucleo-l496zg/nsh/defconfig @@ -1,17 +1,15 @@ -# CONFIG_ARCH_FPU is not set -# CONFIG_NSH_ARGCAT is not set -# CONFIG_NSH_CMDOPT_DF_H is not set -# CONFIG_NSH_CMDPARMS is not set +CONFIG_ADC=y CONFIG_ANALOG=y -CONFIG_ARCH_BOARD_NUCLEO_L496ZG=y +CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="nucleo-l496zg" +CONFIG_ARCH_BOARD_NUCLEO_L496ZG=y CONFIG_ARCH_BUTTONS=y -CONFIG_ARCH_CHIP_STM32L4=y CONFIG_ARCH_CHIP_STM32L496ZG=y +CONFIG_ARCH_CHIP_STM32L4=y +# CONFIG_ARCH_FPU is not set CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_IRQBUTTONS=y CONFIG_ARCH_STACKDUMP=y -CONFIG_ARCH="arm" CONFIG_ARMV7M_STACKCHECK=y CONFIG_BOARD_LOOPSPERMSEC=8499 CONFIG_BUILTIN=y @@ -22,6 +20,8 @@ CONFIG_DEBUG_INFO=y CONFIG_DEBUG_SYMBOLS=y CONFIG_DEBUG_WARN=y CONFIG_DISABLE_POLL=y +CONFIG_EXAMPLES_ADC_SWTRIG=y +CONFIG_EXAMPLES_ADC=y CONFIG_EXAMPLES_ALARM=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y CONFIG_EXAMPLES_NSH=y @@ -29,8 +29,8 @@ CONFIG_EXAMPLES_OSTEST=y CONFIG_EXAMPLES_RANDOM=y CONFIG_FS_PROCFS_REGISTER=y CONFIG_FS_PROCFS=y -CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HAVE_CXX=y CONFIG_I2C_RESET=y CONFIG_I2C=y CONFIG_MAX_TASKS=16 @@ -39,7 +39,10 @@ CONFIG_MM_REGIONS=2 CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_ARGCAT is not set CONFIG_NSH_BUILTIN_APPS=y +# CONFIG_NSH_CMDOPT_DF_H is not set +# CONFIG_NSH_CMDPARMS is not set CONFIG_NSH_DISABLE_IFUPDOWN=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_LINELEN=64 @@ -63,7 +66,13 @@ CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y CONFIG_SERIAL_TERMIOS=y CONFIG_STACK_COLORATION=y +CONFIG_STM32L4_ADC1_DMA=y +CONFIG_STM32L4_ADC1_SAMPLE_FREQUENCY=1000 CONFIG_STM32L4_ADC1=y +CONFIG_STM32L4_ADC2_DMA=y +CONFIG_STM32L4_ADC2=y +CONFIG_STM32L4_ADC3_DMA=y +CONFIG_STM32L4_ADC3=y CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y CONFIG_STM32L4_DMA1=y CONFIG_STM32L4_DMA2=y @@ -81,6 +90,8 @@ CONFIG_STM32L4_SPI1=y CONFIG_STM32L4_SPI2=y CONFIG_STM32L4_SPI3=y CONFIG_STM32L4_SRAM2_HEAP=y +CONFIG_STM32L4_TIM1_ADC=y +CONFIG_STM32L4_TIM1=y CONFIG_STM32L4_USART2=y CONFIG_STM32L4_USART3=y CONFIG_SYSTEM_I2CTOOL=y diff --git a/configs/nucleo-l496zg/src/stm32_adc.c b/configs/nucleo-l496zg/src/stm32_adc.c index 10347c74e3..e56dae2688 100644 --- a/configs/nucleo-l496zg/src/stm32_adc.c +++ b/configs/nucleo-l496zg/src/stm32_adc.c @@ -1,5 +1,5 @@ /************************************************************************************ - * configs/nucleo-144/src/stm32_adc.c + * configs/nucleo-l496zg/src/stm32_adc.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -73,13 +73,12 @@ #endif #if defined(CONFIG_STM32L4_ADC1) || defined(CONFIG_STM32L4_ADC2) || defined(CONFIG_STM32L4_ADC3) -#ifndef CONFIG_STM32L4_ADC1 -# warning "Channel information only available for ADC1" -#endif /* The number of ADC channels in the conversion list */ #define ADC1_NCHANNELS 1 +#define ADC2_NCHANNELS 3 +#define ADC3_NCHANNELS 2 /************************************************************************************ * Private Data @@ -91,16 +90,26 @@ */ #ifdef CONFIG_STM32L4_ADC1 -static const uint8_t g_chanlist[ADC1_NCHANNELS] = {3}; +static const uint8_t g_chanlist_adc1[ADC1_NCHANNELS] = {3}; -/* Configurations of pins used byte each ADC channels +/* Configurations of pins used by each ADC channels * * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5, * GPIO_ADC1_IN6, GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9, GPIO_ADC1_IN10, * GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15}; */ -static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN3}; +static const uint32_t g_pinlist_adc1[ADC1_NCHANNELS] = {GPIO_ADC1_IN3}; +#endif + +#ifdef CONFIG_STM32L4_ADC2 +static const uint8_t g_chanlist_adc2[ADC2_NCHANNELS] = {4,17,18}; /* IN4, DAC1 and DAC2 */ +static const uint32_t g_pinlist_adc2[ADC2_NCHANNELS] = {GPIO_ADC1_IN4, 0, 0}; +#endif + +#ifdef CONFIG_STM32L4_ADC3 +static const uint8_t g_chanlist_adc3[ADC3_NCHANNELS] = {17,18}; /* TS and VBAT/3 */ +static const uint32_t g_pinlist_adc3[ADC3_NCHANNELS] = {0,0}; #endif /************************************************************************************ @@ -121,7 +130,6 @@ static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC1_IN3}; int stm32_adc_setup(void) { -#ifdef CONFIG_STM32L4_ADC1 static bool initialized = false; struct adc_dev_s *adc; int ret; @@ -133,20 +141,43 @@ int stm32_adc_setup(void) { /* Configure the pins as analog inputs for the selected channels */ +#ifdef CONFIG_STM32L4_ADC1 for (i = 0; i < ADC1_NCHANNELS; i++) { - if (g_pinlist[i] != 0) + if (g_pinlist_adc1[i] != 0) { - stm32l4_configgpio(g_pinlist[i]); + stm32l4_configgpio(g_pinlist_adc1[i]); } } +#endif - /* Call stm32_adcinitialize() to get an instance of the ADC interface */ +#ifdef CONFIG_STM32L4_ADC2 + for (i = 0; i < ADC2_NCHANNELS; i++) + { + if (g_pinlist_adc2[i] != 0) + { + stm32l4_configgpio(g_pinlist_adc2[i]); + } + } +#endif - adc = stm32l4_adc_initialize(1, g_chanlist, ADC1_NCHANNELS); +#ifdef CONFIG_STM32L4_ADC3 + for (i = 0; i < ADC3_NCHANNELS; i++) + { + if (g_pinlist_adc3[i] != 0) + { + stm32l4_configgpio(g_pinlist_adc3[i]); + } + } +#endif + + /* Call stm32l4_adc_initialize() to get an instance of the ADC interface */ + +#ifdef CONFIG_STM32L4_ADC1 + adc = stm32l4_adc_initialize(1, g_chanlist_adc1, ADC1_NCHANNELS); if (adc == NULL) { - aerr("ERROR: Failed to get ADC interface\n"); + aerr("ERROR: Failed to get ADC1 interface\n"); return -ENODEV; } @@ -158,6 +189,43 @@ int stm32_adc_setup(void) aerr("ERROR: adc_register failed: %d\n", ret); return ret; } +#endif + +#ifdef CONFIG_STM32L4_ADC2 + adc = stm32l4_adc_initialize(2, g_chanlist_adc2, ADC2_NCHANNELS); + if (adc == NULL) + { + aerr("ERROR: Failed to get ADC2 interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc1" */ + + ret = adc_register("/dev/adc1", adc); + if (ret < 0) + { + aerr("ERROR: adc_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_STM32L4_ADC3 + adc = stm32l4_adc_initialize(3, g_chanlist_adc3, ADC3_NCHANNELS); + if (adc == NULL) + { + aerr("ERROR: Failed to get ADC3 interface\n"); + return -ENODEV; + } + + /* Register the ADC driver at "/dev/adc2" */ + + ret = adc_register("/dev/adc2", adc); + if (ret < 0) + { + aerr("ERROR: adc_register failed: %d\n", ret); + return ret; + } +#endif /* Now we are initialized */ @@ -165,9 +233,6 @@ int stm32_adc_setup(void) } return OK; -#else - return -ENOSYS; -#endif } #endif /* CONFIG_STM32L4_ADC1 || CONFIG_STM32L4_ADC2 || CONFIG_STM32L4_ADC3 */ diff --git a/configs/stm32l476-mdk/src/stm32_clockconfig.c b/configs/stm32l476-mdk/src/stm32_clockconfig.c index d2ae4263e1..134097b083 100644 --- a/configs/stm32l476-mdk/src/stm32_clockconfig.c +++ b/configs/stm32l476-mdk/src/stm32_clockconfig.c @@ -222,18 +222,5 @@ void stm32l4_board_clockconfig(void) stm32l4_pwr_enableclk(true); stm32l4_rcc_enablelse(); #endif - - /* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source - * and then we can also do away with STM32L4_USE_CLK48, and give better - * warning messages - * - * XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already - * enabled ZZZ - */ - - regval = getreg32(STM32L4_RCC_CCIPR); - regval &= RCC_CCIPR_CLK48SEL_MASK; - regval |= STM32L4_CLK48_SEL; - putreg32(regval, STM32L4_RCC_CCIPR); } #endif diff --git a/configs/stm32l476vg-disco/src/stm32_clockconfig.c b/configs/stm32l476vg-disco/src/stm32_clockconfig.c index 5af2a5c763..16de23808c 100644 --- a/configs/stm32l476vg-disco/src/stm32_clockconfig.c +++ b/configs/stm32l476vg-disco/src/stm32_clockconfig.c @@ -222,18 +222,5 @@ void stm32l4_board_clockconfig(void) stm32l4_pwr_enableclk(true); stm32l4_rcc_enablelse(); #endif - - /* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source - * and then we can also do away with STM32L4_USE_CLK48, and give better - * warning messages - * - * XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already - * enabled ZZZ - */ - - regval = getreg32(STM32L4_RCC_CCIPR); - regval &= RCC_CCIPR_CLK48SEL_MASK; - regval |= STM32L4_CLK48_SEL; - putreg32(regval, STM32L4_RCC_CCIPR); } #endif