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Calypso update from Denis Carkiki. Adds UWire driver and support for external memory in NuttX heap

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4733 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-05-14 00:22:31 +00:00
parent a8727040dd
commit 0a5b65743c
14 changed files with 310 additions and 131 deletions
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6
arch/arm/include/calypso/uwire.h Normal file
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@ -0,0 +1,6 @@
#ifndef _CALYPSO_UWIRE_H
#define _CALYPSO_UWIRE_H
void uwire_init(void);
int uwire_xfer(int cs, int bitlen, const void *dout, void *din);
#endif

2
arch/arm/src/calypso/Make.defs
View File

@ -50,4 +50,4 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
CHIP_ASRCS = calypso_lowputc.S
CHIP_CSRCS = calypso_irq.c calypso_timer.c calypso_heap.c \
calypso_serial.c calypso_spi.c clock.c
calypso_serial.c calypso_spi.c clock.c calypso_uwire.c

36
arch/arm/src/calypso/calypso_heap.c
View File

@ -38,6 +38,7 @@
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/mm.h>
#include <sys/types.h>
#include <debug.h>
@ -60,25 +61,30 @@
*
****************************************************************************/
#if CONFIG_MM_REGIONS > 1
void up_addregion(void)
{
#ifdef CONFIG_ARCH_BOARD_COMPALE99
/* Disable watchdog in first non-common function */
wdog_enable(0);
/* Disable watchdog in first non-common function */
wdog_enable(0);
#endif
// XXX: change to initialization of extern memory with save defaults
/* Configure memory interface */
calypso_mem_cfg(CALYPSO_nCS0, 3, CALYPSO_MEM_16bit, 1);
calypso_mem_cfg(CALYPSO_nCS1, 3, CALYPSO_MEM_16bit, 1);
calypso_mem_cfg(CALYPSO_nCS2, 5, CALYPSO_MEM_16bit, 1);
calypso_mem_cfg(CALYPSO_nCS3, 5, CALYPSO_MEM_16bit, 1);
calypso_mem_cfg(CALYPSO_CS4, 0, CALYPSO_MEM_8bit, 1);
calypso_mem_cfg(CALYPSO_nCS6, 0, CALYPSO_MEM_32bit, 1);
calypso_mem_cfg(CALYPSO_nCS7, 0, CALYPSO_MEM_32bit, 0);
// XXX: change to initialization of extern memory with save defaults
/* Configure memory interface */
calypso_mem_cfg(CALYPSO_nCS0, 3, CALYPSO_MEM_16bit, 1);
calypso_mem_cfg(CALYPSO_nCS1, 3, CALYPSO_MEM_16bit, 1);
calypso_mem_cfg(CALYPSO_nCS2, 5, CALYPSO_MEM_16bit, 1);
calypso_mem_cfg(CALYPSO_nCS3, 5, CALYPSO_MEM_16bit, 1);
calypso_mem_cfg(CALYPSO_CS4, 0, CALYPSO_MEM_8bit, 1);
calypso_mem_cfg(CALYPSO_nCS6, 0, CALYPSO_MEM_32bit, 1);
calypso_mem_cfg(CALYPSO_nCS7, 0, CALYPSO_MEM_32bit, 0);
/* Set VTCXO_DIV2 = 1, configure PLL for 104 MHz and give ARM half of that */
calypso_clock_set(2, CALYPSO_PLL13_104_MHZ, ARM_MCLK_DIV_2);
/* Set VTCXO_DIV2 = 1, configure PLL for 104 MHz and give ARM half of that */
calypso_clock_set(2, CALYPSO_PLL13_104_MHZ, ARM_MCLK_DIV_2);
/* Configure the RHEA bridge with some sane default values */
calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
mm_addregion((FAR void*)CONFIG_HEAP2_START, CONFIG_HEAP2_END-CONFIG_HEAP2_START);
/* Configure the RHEA bridge with some sane default values */
calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
}
#endif

152
arch/arm/src/calypso/calypso_uwire.c Normal file
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@ -0,0 +1,152 @@
/****************************************************************************
* arch/arm/src/calypso/calypso_uwire.c
* Driver for Calypso uWire Master Controller
*
* (C) 2010 by Sylvain Munaut <tnt@246tNt.com>
*
* This source code is derivated from Osmocom-BB project and was
* relicensed as BSD with permission from original authors.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdint.h>
#include <stdio.h>
#include <debug.h>
#include "up_arch.h"
#define BASE_ADDR_UWIRE 0xfffe4000
#define UWIRE_REG(n) (BASE_ADDR_UWIRE+(n))
enum uwire_regs {
REG_DATA = 0x00,
REG_CSR = 0x02,
REG_SR1 = 0x04,
REG_SR2 = 0x06,
REG_SR3 = 0x08,
};
#define UWIRE_CSR_BITS_RD(n) (((n) & 0x1f) << 0)
#define UWIRE_CSR_BITS_WR(n) (((n) & 0x1f) << 5)
#define UWIRE_CSR_IDX(n) (((n) & 3) << 10)
#define UWIRE_CSR_CS_CMD (1 << 12)
#define UWIRE_CSR_START (1 << 13)
#define UWIRE_CSR_CSRB (1 << 14)
#define UWIRE_CSR_RDRB (1 << 15)
#define UWIRE_CSn_EDGE_RD (1 << 0) /* 1=falling 0=rising */
#define UWIRE_CSn_EDGE_WR (1 << 1) /* 1=falling 0=rising */
#define UWIRE_CSn_CS_LVL (1 << 2)
#define UWIRE_CSn_FRQ_DIV2 (0 << 3)
#define UWIRE_CSn_FRQ_DIV4 (1 << 3)
#define UWIRE_CSn_FRQ_DIV8 (2 << 3)
#define UWIRE_CSn_CKH
#define UWIRE_CSn_SHIFT(n) (((n) & 1) ? 6 : 0)
#define UWIRE_CSn_REG(n) (((n) & 2) ? REG_SR2 : REG_SR1)
#define UWIRE_SR3_CLK_EN (1 << 0)
#define UWIRE_SR3_CLK_DIV2 (0 << 1)
#define UWIRE_SR3_CLK_DIV4 (1 << 1)
#define UWIRE_SR3_CLK_DIV7 (2 << 1)
#define UWIRE_SR3_CLK_DIV10 (3 << 1)
static inline void _uwire_wait(int mask, int val)
{
while ((getreg16(UWIRE_REG(REG_CSR)) & mask) != val);
}
void uwire_init(void)
{
putreg16(UWIRE_SR3_CLK_EN | UWIRE_SR3_CLK_DIV2, UWIRE_REG(REG_SR3));
/* FIXME only init CS0 for now */
putreg16(((UWIRE_CSn_CS_LVL | UWIRE_CSn_FRQ_DIV2) << UWIRE_CSn_SHIFT(0)),
UWIRE_REG(UWIRE_CSn_REG(0)));
putreg16(UWIRE_CSR_IDX(0) | UWIRE_CSR_CS_CMD, UWIRE_REG(REG_CSR));
_uwire_wait(UWIRE_CSR_CSRB, 0);
}
int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
{
uint16_t tmp = 0;
if (bitlen <= 0 || bitlen > 16)
return -1;
if (cs < 0 || cs > 4)
return -1;
/* FIXME uwire_init always selects CS0 for now */
dbg("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
/* select the chip */
putreg16(UWIRE_CSR_IDX(0) | UWIRE_CSR_CS_CMD, UWIRE_REG(REG_CSR));
_uwire_wait(UWIRE_CSR_CSRB, 0);
if (dout) {
if (bitlen <= 8)
tmp = *(uint8_t *)dout;
else if (bitlen <= 16)
tmp = *(uint16_t *)dout;
tmp <<= 16 - bitlen; /* align to MSB */
putreg16(tmp, UWIRE_REG(REG_DATA));
dbg(", data_out=0x%04hx", tmp);
}
tmp = (dout ? UWIRE_CSR_BITS_WR(bitlen) : 0) |
(din ? UWIRE_CSR_BITS_RD(bitlen) : 0) |
UWIRE_CSR_START;
putreg16(tmp, UWIRE_REG(REG_CSR));
_uwire_wait(UWIRE_CSR_CSRB, 0);
if (din) {
_uwire_wait(UWIRE_CSR_RDRB, UWIRE_CSR_RDRB);
tmp = getreg16(UWIRE_REG(REG_DATA));
dbg(", data_in=0x%08x", tmp);
if (bitlen <= 8)
*(uint8_t *)din = tmp & 0xff;
else if (bitlen <= 16)
*(uint16_t *)din = tmp & 0xffff;
}
/* unselect the chip */
putreg16(UWIRE_CSR_IDX(0) | 0, UWIRE_REG(REG_CSR));
_uwire_wait(UWIRE_CSR_CSRB, 0);
dbg(")\n");
return 0;
}

11
configs/compal_e88/README.txt
View File

@ -26,12 +26,13 @@ directory at same level as the nuttx project:
|- apps
`- osmocom-bb
If you attempt to build this configuration without osmocom-bb, you will
get compilation errors in drivers/sercomm due to header files that are
needed from the osmocom-bb directory.
If you attempt to build this configuration without osmocom-bb, and that
you added support for sercomm in your configuration(CONFIG_SERCOMM_CONSOLE=y)
you will get compilation errors in drivers/sercomm due to header files that
are needed from the osmocom-bb directory.
By default, NuttX will use sercomm (HDLC protocol) to communicate with the
host system. Sercomm is the transport used by osmocom-bb that runs on top
By default, NuttX will not use sercomm (HDLC protocol) to communicate with
the host system. Sercomm is the transport used by osmocom-bb that runs on top
of serial. See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed
the usage of nuttx with sercomm.

2
configs/compal_e88/nsh_highram/Make.defs
View File

@ -35,12 +35,14 @@
include ${TOPDIR}/.config
ifeq ("${CONFIG_SERCOMM_CONSOLE}","y")
OSMODIR = $(TOPDIR)/../../osmocom-bb
EXTRA_LIBS = $(OSMODIR)/src/target/firmware/comm/libcomm.a \
$(OSMODIR)/src/shared/libosmocore/build-target/src/.libs/libosmocore.a \
$(OSMODIR)/src/target/firmware/calypso/libcalypso.a \
$(OSMODIR)/src/target/firmware/comm/libcomm.a
# ^^^ Stupid hack! Why do I have to put it twice???
endif
CROSSDEV = arm-elf-
CC = $(CROSSDEV)gcc

7
configs/compal_e88/nsh_highram/defconfig
View File

@ -88,7 +88,7 @@ CONFIG_ARCH_STACKDUMP=y
# CONFIG_UART_*_PARTIY - 0=no parity, 1=odd parity, 2=even parity
# CONFIG_UART_*_2STOP - Two stop bits
#
CONFIG_SERCOMM_CONSOLE=y
CONFIG_SERCOMM_CONSOLE=n
CONFIG_SERIAL_IRDA_CONSOLE=n
CONFIG_UART_IRDA_HWFLOWCONTROL=n
CONFIG_UART_MODEM_HWFLOWCONTROL=n
@ -104,6 +104,7 @@ CONFIG_UART_IRDA_PARITY=0
CONFIG_UART_MODEM_PARITY=0
CONFIG_UART_IRDA_2STOP=0
CONFIG_UART_MODEM_2STOP=0
CONFIG_STDIO_LINE_BUFFER=y
#
# C5471 Ethernet Driver settings
@ -205,7 +206,7 @@ CONFIG_HAVE_LIBM=n
CONFIG_DEBUG=n
CONFIG_DEBUG_VERBOSE=n
CONFIG_DEBUG_SYMBOLS=n
CONFIG_MM_REGIONS=2
CONFIG_MM_REGIONS=1
CONFIG_ARCH_LOWPUTC=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_INSTRUMENTATION=n
@ -246,7 +247,7 @@ CONFIG_DISABLE_PTHREAD=n
CONFIG_DISABLE_SIGNALS=n
CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_MOUNTPOINT=n
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_ENVIRON=n
CONFIG_DISABLE_POLL=y
#

11
configs/compal_e99/README.txt
View File

@ -26,12 +26,13 @@ directory at same level as the nuttx project:
|- apps
`- osmocom-bb
If you attempt to build this configuration without osmocom-bb, you will
get compilation errors in drivers/sercomm due to header files that are
needed from the osmocom-bb directory.
If you attempt to build this configuration without osmocom-bb, and that
you added support for sercomm in your configuration(CONFIG_SERCOMM_CONSOLE=y)
you will get compilation errors in drivers/sercomm due to header files that
are needed from the osmocom-bb directory.
By default, NuttX will use sercomm (HDLC protocol) to communicate with the
host system. Sercomm is the transport used by osmocom-bb that runs on top
By default, NuttX will not use sercomm (HDLC protocol) to communicate with
the host system. Sercomm is the transport used by osmocom-bb that runs on top
of serial. See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed
the usage of nuttx with sercomm.

2
configs/compal_e99/nsh_compalram/Make.defs
View File

@ -35,12 +35,14 @@
include ${TOPDIR}/.config
ifeq ("${CONFIG_SERCOMM_CONSOLE}","y")
OSMODIR = $(TOPDIR)/../../osmocom-bb
EXTRA_LIBS = $(OSMODIR)/src/target/firmware/comm/libcomm.a \
$(OSMODIR)/src/shared/libosmocore/build-target/src/.libs/libosmocore.a \
$(OSMODIR)/src/target/firmware/calypso/libcalypso.a \
$(OSMODIR)/src/target/firmware/comm/libcomm.a
# ^^^ Stupid hack! Why do I have to put it twice???
endif
CROSSDEV = arm-elf-
CC = $(CROSSDEV)gcc

9
configs/compal_e99/nsh_compalram/defconfig
View File

@ -69,6 +69,9 @@ CONFIG_ARCH_BOARD_COMPALE99=y
CONFIG_BOARD_LOOPSPERMSEC=1250
CONFIG_ROM_VECTORS=n
CONFIG_DRAM_END=0x00840000
CONFIG_MM_REGIONS=2
CONFIG_HEAP2_START=0x01000000
CONFIG_HEAP2_END=0x01200000
CONFIG_ARCH_LEDS=n
CONFIG_ARCH_INTERRUPTSTACK=1024
CONFIG_ARCH_STACKDUMP=y
@ -88,7 +91,7 @@ CONFIG_ARCH_STACKDUMP=y
# CONFIG_UART_*_PARTIY - 0=no parity, 1=odd parity, 2=even parity
# CONFIG_UART_*_2STOP - Two stop bits
#
CONFIG_SERCOMM_CONSOLE=y
CONFIG_SERCOMM_CONSOLE=n
CONFIG_SERIAL_IRDA_CONSOLE=n
CONFIG_UART_IRDA_HWFLOWCONTROL=n
CONFIG_UART_MODEM_HWFLOWCONTROL=n
@ -104,6 +107,7 @@ CONFIG_UART_IRDA_PARITY=0
CONFIG_UART_MODEM_PARITY=0
CONFIG_UART_IRDA_2STOP=0
CONFIG_UART_MODEM_2STOP=0
CONFIG_STDIO_LINE_BUFFER=y
#
# C5471 Ethernet Driver settings
@ -205,7 +209,6 @@ CONFIG_HAVE_LIBM=n
CONFIG_DEBUG=n
CONFIG_DEBUG_VERBOSE=n
CONFIG_DEBUG_SYMBOLS=n
CONFIG_MM_REGIONS=2
CONFIG_ARCH_LOWPUTC=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_INSTRUMENTATION=n
@ -246,7 +249,7 @@ CONFIG_DISABLE_PTHREAD=n
CONFIG_DISABLE_SIGNALS=n
CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_MOUNTPOINT=n
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_ENVIRON=n
CONFIG_DISABLE_POLL=y
#

4
configs/compal_e99/nsh_compalram/ld.script
View File

@ -12,9 +12,9 @@ ENTRY(__start)
MEMORY
{
/* compal-loaded binary: our text, initialized data */
LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00010000
LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
/* compal-loaded binary: our unitialized data, stacks, heap */
IRAM (rw) : ORIGIN = 0x00810000, LENGTH = 0x00010000
IRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00020000
}
SECTIONS
{

2
configs/compal_e99/nsh_highram/Make.defs
View File

@ -35,12 +35,14 @@
include ${TOPDIR}/.config
ifeq ("${CONFIG_SERCOMM_CONSOLE}","y")
OSMODIR = $(TOPDIR)/../../osmocom-bb
EXTRA_LIBS = $(OSMODIR)/src/target/firmware/comm/libcomm.a \
$(OSMODIR)/src/shared/libosmocore/build-target/src/.libs/libosmocore.a \
$(OSMODIR)/src/target/firmware/calypso/libcalypso.a \
$(OSMODIR)/src/target/firmware/comm/libcomm.a
# ^^^ Stupid hack! Why do I have to put it twice???
endif
CROSSDEV = arm-elf-
CC = $(CROSSDEV)gcc

9
configs/compal_e99/nsh_highram/defconfig
View File

@ -69,6 +69,9 @@ CONFIG_ARCH_BOARD_COMPALE99=y
CONFIG_BOARD_LOOPSPERMSEC=1250
CONFIG_ROM_VECTORS=n
CONFIG_DRAM_END=0x00840000
CONFIG_MM_REGIONS=2
CONFIG_HEAP2_START=0x01000000
CONFIG_HEAP2_END=0x01200000
CONFIG_ARCH_LEDS=n
CONFIG_ARCH_INTERRUPTSTACK=1024
CONFIG_ARCH_STACKDUMP=y
@ -88,7 +91,7 @@ CONFIG_ARCH_STACKDUMP=y
# CONFIG_UART_*_PARTIY - 0=no parity, 1=odd parity, 2=even parity
# CONFIG_UART_*_2STOP - Two stop bits
#
CONFIG_SERCOMM_CONSOLE=y
CONFIG_SERCOMM_CONSOLE=n
CONFIG_SERIAL_IRDA_CONSOLE=n
CONFIG_UART_IRDA_HWFLOWCONTROL=n
CONFIG_UART_MODEM_HWFLOWCONTROL=n
@ -104,6 +107,7 @@ CONFIG_UART_IRDA_PARITY=0
CONFIG_UART_MODEM_PARITY=0
CONFIG_UART_IRDA_2STOP=0
CONFIG_UART_MODEM_2STOP=0
CONFIG_STDIO_LINE_BUFFER=y
#
# C5471 Ethernet Driver settings
@ -205,7 +209,6 @@ CONFIG_HAVE_LIBM=n
CONFIG_DEBUG=n
CONFIG_DEBUG_VERBOSE=n
CONFIG_DEBUG_SYMBOLS=n
CONFIG_MM_REGIONS=2
CONFIG_ARCH_LOWPUTC=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_INSTRUMENTATION=n
@ -246,7 +249,7 @@ CONFIG_DISABLE_PTHREAD=n
CONFIG_DISABLE_SIGNALS=n
CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_MOUNTPOINT=n
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_ENVIRON=n
CONFIG_DISABLE_POLL=y
#

4
configs/compal_e99/nsh_highram/ld.script
View File

@ -14,9 +14,9 @@ MEMORY
/* 0x800000-0xa00000 */
/* compal-loaded binary: our text, initialized data */
LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000
TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00020000
TRAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00019000
/* compal-loaded binary: our unitialized data, stacks, heap */
IRAM (rw) : ORIGIN = 0x00840000, LENGTH = 0x00010000
IRAM (rw) : ORIGIN = 0x00839000, LENGTH = 0x00006000
}
SECTIONS
{