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lpc43/54 SDMMC: Remove some useless code. lpc54: Fix typos in the IOCON register definition file. Lpcxpresso-Lpc54628: Fix typols in board.h file

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This commit is contained in:
Gregory Nutt 2017-12-23 14:25:21 -06:00
parent b329b8c1e4
commit 0a5d9af33c
5 changed files with 19 additions and 29 deletions
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9
arch/arm/src/lpc43xx/lpc43_sdmmc.c
View File

@ -1086,7 +1086,6 @@ static int lpc43_sdmmc_interrupt(int irq, void *context, FAR void *arg)
mcerr("ERROR: Data CRC failure, pending=%08x remaining: %d\n",
pending, priv->remaining);
lpc43_putreg(SDMMC_INT_DCRC, LPC43_SDMMC_RINTSTS);
lpc43_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@ -1144,7 +1143,6 @@ static int lpc43_sdmmc_interrupt(int irq, void *context, FAR void *arg)
{
/* Finish the transfer */
lpc43_putreg(SDCARD_XFRDONE_CLEAR, LPC43_SDMMC_RINTSTS);
lpc43_endtransfer(priv, SDIOWAIT_TRANSFERDONE);
}
}
@ -1164,8 +1162,6 @@ static int lpc43_sdmmc_interrupt(int irq, void *context, FAR void *arg)
{
/* Yes.. wake the thread up */
lpc43_putreg(SDCARD_RESPDONE_CLEAR | SDCARD_CMDDONE_CLEAR,
LPC43_SDMMC_RINTSTS);
lpc43_endwait(priv, SDIOWAIT_RESPONSEDONE);
}
@ -1175,7 +1171,6 @@ static int lpc43_sdmmc_interrupt(int irq, void *context, FAR void *arg)
{
/* Yes.. wake the thread up */
lpc43_putreg(SDCARD_CMDDONE_CLEAR, LPC43_SDMMC_RINTSTS);
lpc43_endwait(priv, SDIOWAIT_CMDDONE);
}
}
@ -2478,7 +2473,7 @@ static int lpc43_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
ctrl |= MCI_DMADES0_FS; /* First DMA buffer */
}
/* No more data? Then this is the last descriptor */
/* No more data? Then this is the last descriptor */
if (buflen == 0)
{
@ -2496,7 +2491,7 @@ static int lpc43_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
i++;
}
lpc43_putreg((uint32_t) &g_sdmmc_dmadd[0], LPC43_SDMMC_DBADDR);
lpc43_putreg((uint32_t)&g_sdmmc_dmadd[0], LPC43_SDMMC_DBADDR);
/* Enable internal DMA, burst size of 4, fixed burst */

24
arch/arm/src/lpc54xx/chip/lpc54_iocon.h
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@ -354,24 +354,24 @@
/* Pin types by port */
#define IOCON_PIO0_TYPED_MASK (0x7f7e63ff) /* P0-9,13-14,17-22,24-30 */
#define IOCON_PIO1_TYPED_MASK (0xfffffffe) /* P1-31 */
#define IOCON_PIO2_TYPED_MASK (0xfffffffc) /* P2-31 */
#define IOCON_PIO3_TYPED_MASK (0xfe000000) /* P25-31 */
#define IOCON_PIO4_TYPED_MASK (0xffffffff) /* P0-31 */
#define IOCON_PIO5_TYPED_MASK (0x000007ff) /* P0-10 */
#define IOCON_PIO0_TYPED_MASK (0x7f7e63ff) /* P0.0-9,13-14,17-22,24-30 */
#define IOCON_PIO1_TYPED_MASK (0xfffffffe) /* P1.1-31 */
#define IOCON_PIO2_TYPED_MASK (0xfffffffc) /* P2.2-31 */
#define IOCON_PIO3_TYPED_MASK (0xfe000000) /* P3.25-31 */
#define IOCON_PIO4_TYPED_MASK (0xffffffff) /* P4.0-31 */
#define IOCON_PIO5_TYPED_MASK (0x000007ff) /* P5.0-10 */
#define IOCON_PIO0_TYPEI_MASK (0x00006000) /* P013-14 */
#define IOCON_PIO0_TYPEI_MASK (0x00006000) /* P0.13-14 */
#define IOCON_PIO1_TYPEI_MASK (0x00000000) /* None */
#define IOCON_PIO2_TYPEI_MASK (0x00000000) /* None */
#define IOCON_PIO3_TYPEI_MASK (0x00006000) /* P23-24 */
#define IOCON_PIO3_TYPEI_MASK (0x01800000) /* P3.23-24 */
#define IOCON_PIO4_TYPEI_MASK (0x00000000) /* None */
#define IOCON_PIO5_TYPEI_MASK (0x00000000) /* None */
#define IOCON_PIO0_TYPEA_MASK (0x80831c00) /* p10-12,15-16,23,31 */
#define IOCON_PIO1_TYPEA_MASK (0x00000001) /* p0 */
#define IOCON_PIO2_TYPEA_MASK (0x00000003) /* p0-1 */
#define IOCON_PIO3_TYPEA_MASK (0x00600000) /* p21-22 */
#define IOCON_PIO0_TYPEA_MASK (0x80831c00) /* p0.10-12,15-16,23,31 */
#define IOCON_PIO1_TYPEA_MASK (0x00000001) /* p1.0 */
#define IOCON_PIO2_TYPEA_MASK (0x00000003) /* p2.0-1 */
#define IOCON_PIO3_TYPEA_MASK (0x00600000) /* p3.21-22 */
#define IOCON_PIO4_TYPEA_MASK (0x00000000) /* None */
#define IOCON_PIO5_TYPEA_MASK (0x00000000) /* None */

9
arch/arm/src/lpc54xx/lpc54_sdmmc.c
View File

@ -1086,7 +1086,6 @@ static int lpc54_sdmmc_interrupt(int irq, void *context, FAR void *arg)
mcerr("ERROR: Data CRC failure, pending=%08x remaining: %d\n",
pending, priv->remaining);
lpc54_putreg(SDMMC_INT_DCRC, LPC54_SDMMC_RINTSTS);
lpc54_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@ -1144,7 +1143,6 @@ static int lpc54_sdmmc_interrupt(int irq, void *context, FAR void *arg)
{
/* Finish the transfer */
lpc54_putreg(SDCARD_XFRDONE_CLEAR, LPC54_SDMMC_RINTSTS);
lpc54_endtransfer(priv, SDIOWAIT_TRANSFERDONE);
}
}
@ -1164,8 +1162,6 @@ static int lpc54_sdmmc_interrupt(int irq, void *context, FAR void *arg)
{
/* Yes.. wake the thread up */
lpc54_putreg(SDCARD_RESPDONE_CLEAR | SDCARD_CMDDONE_CLEAR,
LPC54_SDMMC_RINTSTS);
lpc54_endwait(priv, SDIOWAIT_RESPONSEDONE);
}
@ -1175,7 +1171,6 @@ static int lpc54_sdmmc_interrupt(int irq, void *context, FAR void *arg)
{
/* Yes.. wake the thread up */
lpc54_putreg(SDCARD_CMDDONE_CLEAR, LPC54_SDMMC_RINTSTS);
lpc54_endwait(priv, SDIOWAIT_CMDDONE);
}
}
@ -2478,7 +2473,7 @@ static int lpc54_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
ctrl |= MCI_DMADES0_FS; /* First DMA buffer */
}
/* No more data? Then this is the last descriptor */
/* No more data? Then this is the last descriptor */
if (buflen == 0)
{
@ -2496,7 +2491,7 @@ static int lpc54_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
i++;
}
lpc54_putreg((uint32_t) &g_sdmmc_dmadd[0], LPC54_SDMMC_DBADDR);
lpc54_putreg((uint32_t)&g_sdmmc_dmadd[0], LPC54_SDMMC_DBADDR);
/* Enable internal DMA, burst size of 4, fixed burst */

2
configs/bambino-200e/include/board.h
View File

@ -244,7 +244,7 @@
* BOARD_CLKDIV_SDWIDEXFR=2, Fsdmmc=22MHz (25MHz max)
* BOARD_CLKDIV_SDXFR=2, Fsdmmc=22MHz (25MHz max)
*
* NOTE: *lock division is 2*n. For example, value of 0 means divide by
* NOTE: Clock division is 2*n. For example, value of 0 means divide by
* 2 * 0 = 0 (no division, bypass), value of 1 means divide by 2 * 1 = 2, value
* of 255 means divide by 2 * 255 = 510, and so on.
*

4
configs/lpcxpresso-lpc54628/include/board.h
View File

@ -215,7 +215,7 @@
* BOARD_CLKDIV_SDWIDEXFR=2, Fsdmmc=22MHz (25MHz max)
* BOARD_CLKDIV_SDXFR=2, Fsdmmc=22MHz (25MHz max)
*
* NOTE: *lock division is 2*n. For example, value of 0 means divide by
* NOTE: Clock division is 2*n. For example, value of 0 means divide by
* 2 * 0 = 0 (no division, bypass), value of 1 means divide by 2 * 1 = 2, value
* of 255 means divide by 2 * 255 = 510, and so on.
*
@ -316,7 +316,7 @@
#define GPIO_USART0_RXD (GPIO_FC0_RXD_SDA_MOSI_2 | GPIO_FILTER_OFF)
#define GPIO_USART0_TXD (GPIO_FC0_TXD_SCL_MISO_2 | GPIO_FILTER_OFF)
/* Flexomm2/I2C
/* Flexcomm2/I2C
*
* For I2C:
* Type A & D pins need: