ESP32: Fix some compilation issues

arch/xtensa/src/esp32/Make.defs

@@ -78,8 +78,8 @@ endif
 
 CHIP_ASRCS  =
 CHIP_CSRCS  = esp32_allocateheap.c esp32_clockconfig.c esp32_cpuint.c
-CHIP_CSRCS += esp32_intdecode.c esp32_irq.c esp32_region.c esp32_start.c
+CHIP_CSRCS += esp32_gpio.c esp32_intdecode.c esp32_irq.c esp32_region.c
-CHIP_CSRCS += esp32_timerisr.c
+CHIP_CSRCS += esp32_start.c esp32_timerisr.c
 
 # Configuration-dependent ESP32 files
 

arch/xtensa/src/esp32/chip/esp32_gpio.h

@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/xtensa/src/esp32/chip/esp32_uart.h
+ * arch/xtensa/src/esp32/chip/esp32_gpio.h
  *
  * Adapted from use in NuttX by:
  *
@@ -37,7 +37,6 @@
  * Pre-preprocessor Definitions
  ****************************************************************************/
 
-#include "soc.h"
 #define GPIO_BT_SELECT_REG          (DR_REG_GPIO_BASE + 0x0000)
 
 /* GPIO_BT_SEL : R/W ;bitpos:[31:0] ;default: x ; */

arch/xtensa/src/esp32/esp32_cpuint.c

@@ -48,6 +48,8 @@
 #include <nuttx/irq.h>
 #include <arch/irq.h>
 
+#include "chip/esp32_dport.h"
+#include "esp32_cpuint.h"
 #include "xtensa.h"
 
 /****************************************************************************
@@ -189,8 +191,8 @@ static const uint32_t g_priority[5] =
  *   Allocate a CPU interrupt
  *
  * Input Parameters:
- *   mask - mask of candidate CPU interrupts.  The CPU interrupt will be
+ *   intmask - mask of candidate CPU interrupts.  The CPU interrupt will be
- *          be allocated from free interrupts within this set
+ *             be allocated from free interrupts within this set
  *
  * Returned Value:
  *   On success, the allocated level-sensitive, CPU interrupt numbr is
@@ -200,10 +202,10 @@ static const uint32_t g_priority[5] =
  *
  ****************************************************************************/
 
-int esp32_alloc_levelint(uint32_t mask)
+int esp32_alloc_cpuint(uint32_t intmask)
 {
   irqstate_t flags;
-  uint32_t mask;
+  uint32_t bitmask;
   uint32_t intset;
   int cpuint;
   int ret = -ENOMEM;
@@ -214,16 +216,16 @@ int esp32_alloc_levelint(uint32_t mask)
 
   flags = enter_critical_section();
 
-  intset = g_free_cpuints & mask;
+  intset = g_free_cpuints & intmask;
   if (intset != 0)
     {
       /* Skip over initial unavailable CPU interrupts quickly in groups
        * of 8 interrupt.
        */
 
-      for (cpuint = 0, mask = 0xff;
+      for (cpuint = 0, bitmask = 0xff;
            cpuint <= ESP32_CPUINT_MAX;
-           cpuint += 8, mask <<= 8);
+           cpuint += 8, bitmask <<= 8);
 
       /* Search for an unallocated CPU interrupt number in the remaining
        * intset.
@@ -235,12 +237,12 @@ int esp32_alloc_levelint(uint32_t mask)
            * that CPU interrupt is available.
            */
 
-          mask = (1ul << cpuint);
+          bitmask = (1ul << cpuint);
-          if ((intset & mask) != 0)
+          if ((intset & bitmask) != 0)
             {
               /* Got it! */
 
-              g_free_cpuints &= ~mask;
+              g_free_cpuints &= ~bitmask;
               ret = cpuint;
               break;
             }
@@ -322,7 +324,7 @@ void up_enable_irq(int cpuint)
 
 int esp32_alloc_levelint(int priority)
 {
-  uint32_t mask;
+  uint32_t intmask;
 
   DEBUGASSERT(priority >= ESP32_MIN_PRIORITY &&
               priority <= ESP32_MAX_PRIORITY)
@@ -331,8 +333,8 @@ int esp32_alloc_levelint(int priority)
    * interrupt priority.
    */
 
-  mask = g_priority[ESP32_PRIO_INDEX(priority)] & EPS32_CPUINT_LEVELSET;
+  intmask = g_priority[ESP32_PRIO_INDEX(priority)] & EPS32_CPUINT_LEVELSET;
-  return esp_alloc_cpuint(mask);
+  return esp32_alloc_cpuint(intmask);
 }
 
 /****************************************************************************
@@ -354,7 +356,7 @@ int esp32_alloc_levelint(int priority)
 
 int esp32_alloc_edgeint(int priority)
 {
-  uint32_t mask;
+  uint32_t intmask;
 
   DEBUGASSERT(priority >= ESP32_MIN_PRIORITY &&
               priority <= ESP32_MAX_PRIORITY)
@@ -363,8 +365,8 @@ int esp32_alloc_edgeint(int priority)
    * interrupt priority.
    */
 
-  mask = g_priority[ESP32_PRIO_INDEX(priority)] & EPS32_CPUINT_EDGESET;
+  intmask = g_priority[ESP32_PRIO_INDEX(priority)] & EPS32_CPUINT_EDGESET;
-  return esp_alloc_cpuint(mask);
+  return esp32_alloc_cpuint(intmask);
 }
 
 /****************************************************************************
@@ -384,16 +386,16 @@ int esp32_alloc_edgeint(int priority)
 void esp32_free_cpuint(int cpuint)
 {
   irqstate_t flags;
-  uint32_t mask;
+  uint32_t bitmask;
 
   DEBUGASSERT(cpuint >= 0 && cpuint < ESP32_CPUINT_NEDGEPERIPHS);
 
   /* Mark the CPU interrupt as available */
 
-  mask  = (1ul << cpuint);
+  bitmask  = (1ul << cpuint);
   flags = enter_critical_section();
-  DEBUGASSERT((g_free_cpuints & mask) == 0);
+  DEBUGASSERT((g_free_cpuints & bitmask) == 0);
-  g_free_cpuints |= mask;
+  g_free_cpuints |= bitmask;
   leave_critical_section(flags);
 }
 
@@ -432,7 +434,7 @@ void esp32_attach_peripheral(int cpu, int periphid, int cpuint)
       regaddr = DPORT_PRO_MAP_REGADDR(periphid);
     }
 
-  putreg(cpuint, regaddr);
+  putreg32(cpuint, regaddr);
 }
 
 /****************************************************************************
@@ -468,5 +470,5 @@ void esp32_detach_peripheral(int cpu, int periphid)
       regaddr = DPORT_PRO_MAP_REGADDR(periphid);
     }
 
-  putreg(NO_CPUINT, regaddr);
+  putreg32(NO_CPUINT, regaddr);
 }

arch/xtensa/src/esp32/esp32_cpuint.h

@@ -98,7 +98,7 @@ int esp32_alloc_edgeint(int priority);
  *
  ****************************************************************************/
 
-void esp32_free_cpuint(int cpuint, int priority);
+void esp32_free_cpuint(int cpuint);
 
 /****************************************************************************
  * Name:  esp32_attach_peripheral

arch/xtensa/src/esp32/esp32_gpio.c

@@ -30,6 +30,7 @@
 
 #include <nuttx/config.h>
 
+#include <sys/types.h>
 #include <stdint.h>
 #include <assert.h>
 
@@ -38,6 +39,8 @@
 
 #include "chip/esp32_iomux.h"
 #include "chip/esp32_gpio.h"
+#include "xtensa.h"
+
 #include "esp32_gpio.h"
 
 /****************************************************************************
@@ -52,7 +55,9 @@
  * Private Data
  ****************************************************************************/
 
+#ifdef CONFIG_ESP32_GPIO_IRQ
 static uint8_t g_gpio_cpuint;
+#endif
 
 static const uint8_t g_pin2func[40] =
 {
@@ -155,9 +160,8 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr)
 {
   uintptr_t regaddr;
   uint32_t func;
-  uint32_t cntl;
+  uint32_t cntrl;
 
-  DEBUGASSERT(pin >=0 && pin <= ESP32_NIRQ_GPIO);
   DEBUGASSERT(pin >=0 && pin <= ESP32_NIRQ_GPIO);
 
   /* Handle input pins */
@@ -173,7 +177,7 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr)
         }
       else
         {
-          putreg32((1ul << (pin - 32), GPIO_ENABLE1_DATA_W1TC);
+          putreg32((1ul << (pin - 32)), GPIO_ENABLE1_DATA_W1TC);
         }
 
       if ((attr & PULLUP) != 0)
@@ -196,42 +200,42 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr)
         }
       else
         {
-          putreg32((1ul << (pin - 32), GPIO_ENABLE1_DATA_W1TS);
+          putreg32((1ul << (pin - 32)), GPIO_ENABLE1_DATA_W1TS);
         }
     }
 
   /* Add drivers */
 
-  func |= ((uint32_t)(2ul << FUN_DRV_S);
+  func |= (uint32_t)(2ul << FUN_DRV_S);
 
   /* Input enable... Required for output as well? */
 
   func |= FUN_IE;
 
-  
   if  ((attr & (INPUT | OUTPUT)) != 0)
     {
-      func |= ((uint32_t)(2 << MCU_SEL_S);
+      func |= (uint32_t)(2 << MCU_SEL_S);
     }
   else if (attr == SPECIAL)
     {
-      func |= ((uint32_t)(((pin) == 1 || (pin) == 3) ? 0 : 1) << MCU_SEL_S);
+      func |= (uint32_t)((((pin) == 1 || (pin) == 3) ? 0 : 1) << MCU_SEL_S);
     }
   else
     {
-      func |= ((uint32_t)(attr >> 5) << MCU_SEL_S);
+      func |= (uint32_t)((attr >> 5) << MCU_SEL_S);
     }
 
   if ((attr & OPEN_DRAIN) != 0)
     {
-      cntl = (1 << GPIO_PIN_PAD_DRIVER_S);
+      cntrl = (1 << GPIO_PIN_PAD_DRIVER_S);
     }
 
   regaddr = DR_REG_IO_MUX_BASE + g_pin2func[pin];
   putreg32(func, regaddr);
 
   regaddr = GPIO_REG(pin);
-  putreg32(cntl, regaddr);
+  putreg32(cntrl, regaddr);
+  return OK;
 }
 
 /****************************************************************************
@@ -244,30 +248,28 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr)
 
 void esp32_gpiowrite(int pin, bool value)
 {
-  if (pin > 39)
+  DEBUGASSERT(pin >=0 && pin <= ESP32_NIRQ_GPIO);
-    {
+
-      return;
-    }
   if (value)
     {
       if (pin < 32)
         {
-          GPIO.out_w1ts = ((uint32_t) 1 << pin);
+          putreg32((uint32_t)(1ul << pin), GPIO_OUT_W1TS_REG);
         }
       else
         {
-          GPIO.out1_w1ts.val = ((uint32_t) 1 << (pin - 32));
+          putreg32((uint32_t)(1ul << (pin - 32)), GPIO_OUT1_W1TS_REG);
         }
     }
   else
     {
       if (pin < 32)
         {
-          GPIO.out_w1tc = ((uint32_t) 1 << pin);
+          putreg32((uint32_t)(1ul << pin), GPIO_OUT_W1TC_REG);
         }
       else
         {
-          GPIO.out1_w1tc.val = ((uint32_t) 1 << (pin - 32));
+          putreg32((uint32_t)(1ul << (pin - 32)), GPIO_OUT1_W1TC_REG);
         }
     }
 }
@@ -282,17 +284,19 @@ void esp32_gpiowrite(int pin, bool value)
 
 bool esp32_gpioread(int pin)
 {
-  if (pin > 39)
+  uint32_t regval;
-    {
+ 
-      return false;
+  DEBUGASSERT(pin >=0 && pin <= ESP32_NIRQ_GPIO);
-    }
+
   if (pin < 32)
     {
-      return ((GPIO.in >> pin) & 1) != 0;
+      regval = getreg32(GPIO_IN_REG);
+      return ((regval >> pin) & 1) != 0;
     }
   else
     {
-      return ((GPIO.in1.val >> (pin - 32)) & 1) != 0;
+      regval = getreg32(GPIO_IN1_REG);
+      return ((regval >> (pin - 32)) & 1) != 0;
     }
 }
 

arch/xtensa/src/esp32/esp32_gpio.h

@@ -31,6 +31,15 @@
  * Included Files
  ****************************************************************************/
 
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
 /* Bit-encoded input to esp32_configgpio() **********************************/
 
 /* Encoded pin attributes used with esp32_configgpio() */

arch/xtensa/src/esp32/esp32_irq.c

@@ -144,6 +144,13 @@ void xtensa_irq_initialize(void)
 
   esp32_irq_dump("initial", NR_IRQS);
 
+#ifdef CONFIG_ESP32_GPIO_IRQ
+  /* Initialize GPIO interrupt support */
+
+  esp32_gpioirqinitialize();
+#endif
+
+
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
   /* And finally, enable interrupts */
 

configs/esp32-core/nsh/defconfig

@@ -74,14 +74,22 @@ CONFIG_ARCH="xtensa"
 CONFIG_ARCH_CHIP="esp32"
 CONFIG_ARCH_CHIP_ESP32=y
 CONFIG_ARCH_FAMILY_LX6=y
-CONFIG_XTENSA_NCOPROCESSORS=1
-# CONFIG_XTENSA_USE_SWPRI is not set
 CONFIG_XTENSA_CALL0_ABI=y
 # CONFIG_XTENSA_USE_OVLY is not set
+# CONFIG_ESP32_SPI2 is not set
+# CONFIG_XTENSA_TIMER1 is not set
+# CONFIG_XTENSA_TIMER2 is not set
+CONFIG_ESP32_UART0=y
+# CONFIG_ESP32_UART1 is not set
+# CONFIG_ESP32_UART2 is not set
 CONFIG_ESP32_BT_RESERVE_DRAM=0
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0
 CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
 
+#
+# ESP32 Peripheral Selection
+#
+
 #
 # Architecture Options
 #
@@ -558,10 +566,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
 CONFIG_EXAMPLES_NSH=y
 CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 # CONFIG_EXAMPLES_NULL is not set
-# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXFFS is not set
 # CONFIG_EXAMPLES_NXHELLO is not set
 # CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NX is not set
 # CONFIG_EXAMPLES_NXLINES is not set
 # CONFIG_EXAMPLES_NXTERM is not set
 # CONFIG_EXAMPLES_NXTEXT is not set