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arch/xtensa/src/esp32/hardware/esp32_soc.h: Lowercase hex value

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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit is contained in:
Abdelatif Guettouche 2020-09-28 20:27:20 +01:00 committed by Alan Carvalho de Assis
parent b6429a50d7
commit 0ba0a3a092
1 changed files with 26 additions and 25 deletions
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5
arch/xtensa/src/esp32/hardware/esp32_soc.h
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@ -251,6 +251,7 @@
#define PERIPHS_SPI_ENCRYPT_BASEADDR DR_REG_SPI_ENCRYPT_BASE #define PERIPHS_SPI_ENCRYPT_BASEADDR DR_REG_SPI_ENCRYPT_BASE
/* Overall memory map */ /* Overall memory map */
#define SOC_DROM_LOW 0x3f400000 #define SOC_DROM_LOW 0x3f400000
#define SOC_DROM_HIGH 0x3f800000 #define SOC_DROM_HIGH 0x3f800000
#define SOC_DRAM_LOW 0x3ffae000 #define SOC_DRAM_LOW 0x3ffae000
@ -414,10 +415,10 @@
/* APB_CTRL_PRE_DIV_CNT : R/W ;bitpos:[9:0] ;default: 10'h0 ; */ /* APB_CTRL_PRE_DIV_CNT : R/W ;bitpos:[9:0] ;default: 10'h0 ; */
#define APB_CTRL_PRE_DIV_CNT 0x000003FF #define APB_CTRL_PRE_DIV_CNT 0x000003ff
#define APB_CTRL_PRE_DIV_CNT_M ((APB_CTRL_PRE_DIV_CNT_V) << \ #define APB_CTRL_PRE_DIV_CNT_M ((APB_CTRL_PRE_DIV_CNT_V) << \
(APB_CTRL_PRE_DIV_CNT_S)) (APB_CTRL_PRE_DIV_CNT_S))
#define APB_CTRL_PRE_DIV_CNT_V 0x3FF #define APB_CTRL_PRE_DIV_CNT_V 0x3ff
#define APB_CTRL_PRE_DIV_CNT_S 0 #define APB_CTRL_PRE_DIV_CNT_S 0
#define I2C_BBPLL_IR_CAL_DELAY 0 #define I2C_BBPLL_IR_CAL_DELAY 0