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ESP32: Add option for interrupt support

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This commit is contained in:
Gregory Nutt 2016-10-15 10:11:35 -06:00
parent 6f35ced002
commit 0be3d12ba0
1 changed files with 5 additions and 0 deletions
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5
arch/xtensa/Kconfig
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@ -12,6 +12,7 @@ choice
config ARCH_CHIP_ESP32
bool "Expressif ESP32"
select ARCH_FAMILY_LX6
select XTENSA_HAVE_INTERRUPTS
---help---
The ESP32 is a dual-core system from Expressif with two Harvard
architecture Xtensa LX6 CPUs. All embedded memory, external memory
@ -33,6 +34,10 @@ config XTENSA_HAVE_LOOPS
bool "Zero overhead loops"
default n
config XTENSA_HAVE_INTERRUPTS
bool
default n
config XTENSA_USE_SWPRI
bool "Use SWPRI"
default n