diff --git a/arch/mips/src/pic32mz/chip/pic32mzec-features.h b/arch/mips/src/pic32mz/chip/pic32mzec-features.h
index 7cc9b2634a..ceb0fbb321 100644
--- a/arch/mips/src/pic32mz/chip/pic32mzec-features.h
+++ b/arch/mips/src/pic32mz/chip/pic32mzec-features.h
@@ -440,7 +440,7 @@
 #define DEVCFG1_DMTCNT_MASK      (31 << DEVCFG1_DMTCNT_SHIFT)
 #  define DEVCFG1_DMTCNT(n)      ((uint32_t)((n)-8) << DEVCFG1_DMTCNT_SHIFT) /* 2**n, n=8..31 */
 #  define DEVCFG1_DMTCNT_MIN     (0  << DEVCFG1_DMTCNT_SHIFT) /* 2**8   (256) */
-#  define DEVCFG1_DMTCNT_MAX     (12 << DEVCFG1_DMTCNT_SHIFT) /* 2**318 (2147483648) */
+#  define DEVCFG1_DMTCNT_MAX     (28 << DEVCFG1_DMTCNT_SHIFT) /* 2**318 (2147483648) */
 #define DEVCFG1_FDMTEN           (1 << 31) /* Bit 31: Deadman Timer enable bit */
 
 #define DEVCFG1_RWO              0x00003800 /* Bits 11-13: Reserved, write as one */
diff --git a/arch/mips/src/pic32mz/pic32mz-config.h b/arch/mips/src/pic32mz/pic32mz-config.h
index 5440fecaf8..73ad454644 100644
--- a/arch/mips/src/pic32mz/pic32mz-config.h
+++ b/arch/mips/src/pic32mz/pic32mz-config.h
@@ -211,13 +211,13 @@
 #if (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 5000000
 #  error BOARD_PLL_INPUT / BOARD_PLL_IDIV too low
 #  define CONFIG_PIC32MZ_FPLLRNG  DEVCFG2_FPLLRNG_BYPASS /* < 5 MHz */
-#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 8000000
+#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 9000000
 #  define CONFIG_PIC32MZ_FPLLRNG  DEVCFG2_FPLLRNG_5_10MHZ /* 5-10 MHz */
-#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 13000000
+#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 14500000
 #  define CONFIG_PIC32MZ_FPLLRNG  DEVCFG2_FPLLRNG_8_16MHZ /* 8-16 MHz */
-#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 210000000
+#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 23500000
 #  define CONFIG_PIC32MZ_FPLLRNG  DEVCFG2_FPLLRNG_13_26MHZ /* 13-26 MHz */
-#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 36000000
+#elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 39000000
 #  define CONFIG_PIC32MZ_FPLLRNG  DEVCFG2_FPLLRNG_21_42MHZ /* 21-42 MHz */
 #elif (BOARD_PLL_INPUT / BOARD_PLL_IDIV) < 64000000
 #  define CONFIG_PIC32MZ_FPLLRNG  DEVCFG2_FPLLRNG_34_64MHZ /* 36-64 MHz */