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Add _ to the beginning of all debug macros to avoid name collisions

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This commit is contained in:
Gregory Nutt 2016-06-16 12:33:32 -06:00
parent fdaf3d7268
commit 0c8c7fecf0
252 changed files with 1348 additions and 1374 deletions
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4
Kconfig
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@ -413,7 +413,7 @@ config DEBUG_ERROR
bool "Enable Error Output" bool "Enable Error Output"
default n default n
---help--- ---help---
Enables output from err() statements. Errors are significant system Enables output from [a-z]err() statements. Errors are significant system
exceptions that require immediate attention. exceptions that require immediate attention.
config DEBUG_WARN config DEBUG_WARN
@ -421,7 +421,7 @@ config DEBUG_WARN
default n default n
depends on DEBUG_ERROR depends on DEBUG_ERROR
---help--- ---help---
Enables output from warn() statements. Warnings are considered to Enables output from [a-z]warn() statements. Warnings are considered to
be various unexpected conditions, potential errors or errors that will be various unexpected conditions, potential errors or errors that will
not have serious consequences. not have serious consequences.

6
arch/arm/src/a1x/a1x_serial.c
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@ -1156,7 +1156,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
/* Read the modem status register (MSR) to clear */ /* Read the modem status register (MSR) to clear */
status = up_serialin(priv, A1X_UART_MSR_OFFSET); status = up_serialin(priv, A1X_UART_MSR_OFFSET);
info("MSR: %02x\n", status); _info("MSR: %02x\n", status);
break; break;
} }
@ -1167,7 +1167,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
/* Read the line status register (LSR) to clear */ /* Read the line status register (LSR) to clear */
status = up_serialin(priv, A1X_UART_LSR_OFFSET); status = up_serialin(priv, A1X_UART_LSR_OFFSET);
info("LSR: %02x\n", status); _info("LSR: %02x\n", status);
break; break;
} }
@ -1192,7 +1192,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
default: default:
{ {
llerr("Unexpected IIR: %02x\n", status); _llerr("Unexpected IIR: %02x\n", status);
break; break;
} }
} }

12
arch/arm/src/armv6-m/up_dumpnvic.c
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@ -72,25 +72,25 @@ void up_dumpnvic(FAR const char *msg)
flags = enter_critical_section(); flags = enter_critical_section();
llinfo("NVIC: %s\n", msg); _llinfo("NVIC: %s\n", msg);
llinfo(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n", _llinfo(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER), getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER),
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR)); getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
for (i = 0 ; i < 8; i += 4) for (i = 0 ; i < 8; i += 4)
{ {
llinfo(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n", _llinfo(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n",
i, getreg32(ARMV6M_NVIC_IPR(i)), i, getreg32(ARMV6M_NVIC_IPR(i)),
i+1, getreg32(ARMV6M_NVIC_IPR(i+1)), i+1, getreg32(ARMV6M_NVIC_IPR(i+1)),
i+2, getreg32(ARMV6M_NVIC_IPR(i+2)), i+2, getreg32(ARMV6M_NVIC_IPR(i+2)),
i+3, getreg32(ARMV6M_NVIC_IPR(i+3))); i+3, getreg32(ARMV6M_NVIC_IPR(i+3)));
} }
llinfo("SYSCON:\n"); _llinfo("SYSCON:\n");
llinfo(" CPUID: %08x ICSR: %08x AIRCR: %08x SCR: %08x\n", _llinfo(" CPUID: %08x ICSR: %08x AIRCR: %08x SCR: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID), getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_CPUID), getreg32(ARMV6M_SYSCON_ICSR),
getreg32(ARMV6M_SYSCON_AIRCR), getreg32(ARMV6M_SYSCON_SCR)); getreg32(ARMV6M_SYSCON_AIRCR), getreg32(ARMV6M_SYSCON_SCR));
llinfo(" CCR: %08x SHPR2: %08x SHPR3: %08x\n", _llinfo(" CCR: %08x SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2),
getreg32(ARMV6M_SYSCON_SHPR3)); getreg32(ARMV6M_SYSCON_SHPR3));

16
arch/arm/src/armv6-m/up_hardfault.c
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@ -55,25 +55,13 @@
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_DEBUG_HARDFAULT #ifdef CONFIG_DEBUG_HARDFAULT
# define hferr(format, ...) llerr(format, ##__VA_ARGS__) # define hferr(format, ...) _llerr(format, ##__VA_ARGS__)
#else #else
# define hferr(x...) # define hferr(x...)
#endif #endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */ #define INSN_SVC0 0xdf00 /* insn: svc 0 */
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/
@ -149,7 +137,7 @@ int up_hardfault(int irq, FAR void *context)
#endif #endif
(void)up_irq_save(); (void)up_irq_save();
llerr("PANIC!!! Hard fault\n"); _llerr("PANIC!!! Hard fault\n");
PANIC(); PANIC();
return OK; /* Won't get here */ return OK; /* Won't get here */
} }

6
arch/arm/src/armv7-a/arm_cpustart.c
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@ -64,19 +64,19 @@ static inline void arm_registerdump(FAR struct tcb_s *tcb)
{ {
int regndx; int regndx;
llerr("CPU%d:\n", up_cpu_index()); _llerr("CPU%d:\n", up_cpu_index());
/* Dump the startup registers */ /* Dump the startup registers */
for (regndx = REG_R0; regndx <= REG_R15; regndx += 8) for (regndx = REG_R0; regndx <= REG_R15; regndx += 8)
{ {
uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx]; uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx];
llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", _llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regndx, ptr[0], ptr[1], ptr[2], ptr[3], regndx, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]); ptr[4], ptr[5], ptr[6], ptr[7]);
} }
llerr("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]); _llerr("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
} }
#else #else
# define arm_registerdump(tcb) # define arm_registerdump(tcb)

2
arch/arm/src/armv7-a/arm_l2cc_pl310.c
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@ -411,7 +411,7 @@ void up_l2ccinitialize(void)
putreg32(L2CC_CR_L2CEN, L2CC_CR); putreg32(L2CC_CR_L2CEN, L2CC_CR);
} }
llerr("(%d ways) * (%d bytes/way) = %d bytes\n", _llerr("(%d ways) * (%d bytes/way) = %d bytes\n",
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE); PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
} }

2
arch/arm/src/armv7-m/mpu.h
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@ -222,7 +222,7 @@ static inline void mpu_showtype(void)
#ifdef CONFIG_DEBUG_ERROR #ifdef CONFIG_DEBUG_ERROR
uint32_t regval = getreg32(MPU_TYPE); uint32_t regval = getreg32(MPU_TYPE);
err("%s MPU Regions: data=%d instr=%d\n", _err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified", (regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT, (regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT); (regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);

4
arch/arm/src/armv7-m/up_hardfault.c
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@ -60,7 +60,7 @@
*/ */
#ifdef CONFIG_DEBUG_HARDFAULT #ifdef CONFIG_DEBUG_HARDFAULT
# define hferr(format, ...) llerr(format, ##__VA_ARGS__) # define hferr(format, ...) _llerr(format, ##__VA_ARGS__)
#else #else
# define hferr(x...) # define hferr(x...)
#endif #endif
@ -179,7 +179,7 @@ int up_hardfault(int irq, FAR void *context)
#endif #endif
(void)up_irq_save(); (void)up_irq_save();
llerr("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS)); _llerr("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
PANIC(); PANIC();
return OK; return OK;
} }

6
arch/arm/src/armv7-m/up_memfault.c
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@ -55,7 +55,7 @@
#undef DEBUG_MEMFAULTS /* Define to debug memory management faults */ #undef DEBUG_MEMFAULTS /* Define to debug memory management faults */
#ifdef DEBUG_MEMFAULTS #ifdef DEBUG_MEMFAULTS
# define mferr(format, ...) llerr(format, ##__VA_ARGS__) # define mferr(format, ...) _llerr(format, ##__VA_ARGS__)
#else #else
# define mferr(x...) # define mferr(x...)
#endif #endif
@ -92,9 +92,9 @@ int up_memfault(int irq, FAR void *context)
/* Dump some memory management fault info */ /* Dump some memory management fault info */
(void)up_irq_save(); (void)up_irq_save();
llerr("PANIC!!! Memory Management Fault:\n"); _llerr("PANIC!!! Memory Management Fault:\n");
mferr(" IRQ: %d context: %p\n", irq, regs); mferr(" IRQ: %d context: %p\n", irq, regs);
llerr(" CFAULTS: %08x MMFAR: %08x\n", _llerr(" CFAULTS: %08x MMFAR: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR)); getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
mferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n", mferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol()); getbasepri(), getprimask(), getipsr(), getcontrol());

46
arch/arm/src/armv7-r/arm_assert.c
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@ -98,7 +98,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32) for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{ {
uint32_t *ptr = (uint32_t *)stack; uint32_t *ptr = (uint32_t *)stack;
llerr("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n", _llerr("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3], stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]); ptr[4], ptr[5], ptr[6], ptr[7]);
} }
@ -117,11 +117,11 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
/* Dump interesting properties of this task */ /* Dump interesting properties of this task */
#if CONFIG_TASK_NAME_SIZE > 0 #if CONFIG_TASK_NAME_SIZE > 0
llerr("%s: PID=%d Stack Used=%lu of %lu\n", _llerr("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb), tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size); (unsigned long)tcb->adj_stack_size);
#else #else
llerr("PID: %d Stack Used=%lu of %lu\n", _llerr("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb), tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size); (unsigned long)tcb->adj_stack_size);
#endif #endif
@ -161,12 +161,12 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8) for (regs = REG_R0; regs <= REG_R15; regs += 8)
{ {
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs]; uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", _llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3], regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]); ptr[4], ptr[5], ptr[6], ptr[7]);
} }
llerr("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]); _llerr("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
} }
} }
#else #else
@ -230,7 +230,7 @@ static void up_dumpstate(void)
ustacksize = (uint32_t)rtcb->adj_stack_size; ustacksize = (uint32_t)rtcb->adj_stack_size;
} }
llerr("Current sp: %08x\n", sp); _llerr("Current sp: %08x\n", sp);
#if CONFIG_ARCH_INTERRUPTSTACK > 3 #if CONFIG_ARCH_INTERRUPTSTACK > 3
/* Get the limits on the interrupt stack memory */ /* Get the limits on the interrupt stack memory */
@ -240,21 +240,21 @@ static void up_dumpstate(void)
/* Show interrupt stack info */ /* Show interrupt stack info */
llerr("Interrupt stack:\n"); _llerr("Interrupt stack:\n");
llerr(" base: %08x\n", istackbase); _llerr(" base: %08x\n", istackbase);
llerr(" size: %08x\n", istacksize); _llerr(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION #ifdef CONFIG_STACK_COLORATION
llerr(" used: %08x\n", up_check_intstack()); _llerr(" used: %08x\n", up_check_intstack());
#endif #endif
#endif #endif
/* Show user stack info */ /* Show user stack info */
llerr("User stack:\n"); _llerr("User stack:\n");
llerr(" base: %08x\n", ustackbase); _llerr(" base: %08x\n", ustackbase);
llerr(" size: %08x\n", ustacksize); _llerr(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION #ifdef CONFIG_STACK_COLORATION
llerr(" used: %08x\n", up_check_tcbstack(rtcb)); _llerr(" used: %08x\n", up_check_tcbstack(rtcb));
#endif #endif
#ifdef CONFIG_ARCH_KERNEL_STACK #ifdef CONFIG_ARCH_KERNEL_STACK
@ -264,9 +264,9 @@ static void up_dumpstate(void)
{ {
kstackbase = (uint32_t)rtcb->xcp.kstack + CONFIG_ARCH_KERNEL_STACKSIZE - 4; kstackbase = (uint32_t)rtcb->xcp.kstack + CONFIG_ARCH_KERNEL_STACKSIZE - 4;
llerr("Kernel stack:\n"); _llerr("Kernel stack:\n");
llerr(" base: %08x\n", kstackbase); _llerr(" base: %08x\n", kstackbase);
llerr(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE); _llerr(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
} }
#endif #endif
@ -277,7 +277,7 @@ static void up_dumpstate(void)
{ {
/* Yes.. dump the interrupt stack */ /* Yes.. dump the interrupt stack */
llerr("Interrupt Stack\n", sp); _llerr("Interrupt Stack\n", sp);
up_stackdump(sp, istackbase); up_stackdump(sp, istackbase);
/* Extract the user stack pointer which should lie /* Extract the user stack pointer which should lie
@ -285,7 +285,7 @@ static void up_dumpstate(void)
*/ */
sp = g_intstackbase; sp = g_intstackbase;
llerr("User sp: %08x\n", sp); _llerr("User sp: %08x\n", sp);
} }
#endif #endif
@ -295,7 +295,7 @@ static void up_dumpstate(void)
if (sp > ustackbase - ustacksize && sp < ustackbase) if (sp > ustackbase - ustacksize && sp < ustackbase)
{ {
llerr("User Stack\n", sp); _llerr("User Stack\n", sp);
up_stackdump(sp, ustackbase); up_stackdump(sp, ustackbase);
} }
@ -306,7 +306,7 @@ static void up_dumpstate(void)
if (sp >= (uint32_t)rtcb->xcp.kstack && sp < kstackbase) if (sp >= (uint32_t)rtcb->xcp.kstack && sp < kstackbase)
{ {
llerr("Kernel Stack\n", sp); _llerr("Kernel Stack\n", sp);
up_stackdump(sp, kstackbase); up_stackdump(sp, kstackbase);
} }
#endif #endif
@ -373,10 +373,10 @@ void up_assert(const uint8_t *filename, int lineno)
board_autoled_on(LED_ASSERTION); board_autoled_on(LED_ASSERTION);
#if CONFIG_TASK_NAME_SIZE > 0 #if CONFIG_TASK_NAME_SIZE > 0
llerr("Assertion failed at file:%s line: %d task: %s\n", _llerr("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name); filename, lineno, rtcb->name);
#else #else
llerr("Assertion failed at file:%s line: %d\n", _llerr("Assertion failed at file:%s line: %d\n",
filename, lineno); filename, lineno);
#endif #endif
up_dumpstate(); up_dumpstate();

2
arch/arm/src/armv7-r/arm_l2cc_pl310.c
View File

@ -411,7 +411,7 @@ void up_l2ccinitialize(void)
putreg32(L2CC_CR_L2CEN, L2CC_CR); putreg32(L2CC_CR_L2CEN, L2CC_CR);
} }
llerr("(%d ways) * (%d bytes/way) = %d bytes\n", _llerr("(%d ways) * (%d bytes/way) = %d bytes\n",
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE); PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
} }

2
arch/arm/src/armv7-r/mpu.h
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@ -361,7 +361,7 @@ static inline void mpu_showtype(void)
{ {
#ifdef CONFIG_DEBUG_FEATURES #ifdef CONFIG_DEBUG_FEATURES
uint32_t regval = mpu_get_mpuir(); uint32_t regval = mpu_get_mpuir();
err("%s MPU Regions: data=%d instr=%d\n", _err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPUIR_SEPARATE) != 0 ? "Separate" : "Unified", (regval & MPUIR_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPUIR_DREGION_MASK) >> MPUIR_DREGION_SHIFT, (regval & MPUIR_DREGION_MASK) >> MPUIR_DREGION_SHIFT,
(regval & MPUIR_IREGION_MASK) >> MPUIR_IREGION_SHIFT); (regval & MPUIR_IREGION_MASK) >> MPUIR_IREGION_SHIFT);

36
arch/arm/src/c5471/c5471_watchdog.c
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@ -155,7 +155,7 @@ static inline unsigned int wdt_prescaletoptv(unsigned int prescale)
} }
} }
err("prescale=%d -> ptv=%d\n", prescale, ptv); _err("prescale=%d -> ptv=%d\n", prescale, ptv);
return ptv; return ptv;
} }
@ -173,7 +173,7 @@ static int wdt_setusec(uint32_t usec)
uint32_t divisor = 1; uint32_t divisor = 1;
uint32_t mode; uint32_t mode;
err("usec=%d\n", usec); _err("usec=%d\n", usec);
/* Calculate a value of prescaler and divisor that will be able /* Calculate a value of prescaler and divisor that will be able
* to count to the usec. It may not be exact or the best * to count to the usec. It may not be exact or the best
@ -186,7 +186,7 @@ static int wdt_setusec(uint32_t usec)
do do
{ {
divisor = (CLOCK_MHZx2 * usec) / (prescaler * 2); divisor = (CLOCK_MHZx2 * usec) / (prescaler * 2);
err("divisor=0x%x prescaler=0x%x\n", divisor, prescaler); _err("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
if (divisor >= 0x10000) if (divisor >= 0x10000)
{ {
@ -194,7 +194,7 @@ static int wdt_setusec(uint32_t usec)
{ {
/* This is the max possible ~2.5 seconds. */ /* This is the max possible ~2.5 seconds. */
err("prescaler=0x%x too big!\n", prescaler); _err("prescaler=0x%x too big!\n", prescaler);
return ERROR; return ERROR;
} }
@ -207,19 +207,19 @@ static int wdt_setusec(uint32_t usec)
} }
while (divisor >= 0x10000); while (divisor >= 0x10000);
err("prescaler=0x%x divisor=0x%x\n", prescaler, divisor); _err("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
mode = wdt_prescaletoptv(prescaler); mode = wdt_prescaletoptv(prescaler);
mode &= ~C5471_TIMER_AUTORELOAD; /* One shot mode. */ mode &= ~C5471_TIMER_AUTORELOAD; /* One shot mode. */
mode |= divisor << 5; mode |= divisor << 5;
err("mode=0x%x\n", mode); _err("mode=0x%x\n", mode);
c5471_wdt_cntl = mode; c5471_wdt_cntl = mode;
/* Now start the watchdog */ /* Now start the watchdog */
c5471_wdt_cntl |= C5471_TIMER_STARTBIT; c5471_wdt_cntl |= C5471_TIMER_STARTBIT;
err("cntl_timer=0x%x\n", c5471_wdt_cntl); _err("cntl_timer=0x%x\n", c5471_wdt_cntl);
return 0; return 0;
} }
@ -234,17 +234,17 @@ static int wdt_setusec(uint32_t usec)
static int wdt_interrupt(int irq, void *context) static int wdt_interrupt(int irq, void *context)
{ {
err("expired\n"); _err("expired\n");
#if defined(CONFIG_SOFTWARE_REBOOT) #if defined(CONFIG_SOFTWARE_REBOOT)
# if defined(CONFIG_SOFTWARE_TEST) # if defined(CONFIG_SOFTWARE_TEST)
err(" Test only\n"); _err(" Test only\n");
# else # else
err(" Re-booting\n"); _err(" Re-booting\n");
# warning "Add logic to reset CPU here" # warning "Add logic to reset CPU here"
# endif # endif
#else #else
err(" No reboot\n"); _err(" No reboot\n");
#endif #endif
return OK; return OK;
} }
@ -259,7 +259,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
* not work if the user provides a buffer smaller than 18 bytes. * not work if the user provides a buffer smaller than 18 bytes.
*/ */
err("buflen=%d\n", buflen); _err("buflen=%d\n", buflen);
if (buflen >= 18) if (buflen >= 18)
{ {
sprintf(buffer, "%08x %08x\n", c5471_wdt_cntl, c5471_wdt_count); sprintf(buffer, "%08x %08x\n", c5471_wdt_cntl, c5471_wdt_count);
@ -274,7 +274,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen) static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
{ {
err("buflen=%d\n", buflen); _err("buflen=%d\n", buflen);
if (buflen) if (buflen)
{ {
/* Reset the timer to the maximum delay */ /* Reset the timer to the maximum delay */
@ -292,7 +292,7 @@ static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg) static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{ {
err("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg); _err("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
/* Process the IOCTL command (see arch/watchdog.h) */ /* Process the IOCTL command (see arch/watchdog.h) */
@ -315,7 +315,7 @@ static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
static int wdt_open(struct file *filep) static int wdt_open(struct file *filep)
{ {
err(""); _err("");
if (g_wdtopen) if (g_wdtopen)
{ {
@ -339,7 +339,7 @@ static int wdt_open(struct file *filep)
static int wdt_close(struct file *filep) static int wdt_close(struct file *filep)
{ {
err(""); _err("");
/* The task controlling the watchdog has terminated. Take the timer /* The task controlling the watchdog has terminated. Take the timer
* the * the
@ -367,7 +367,7 @@ int up_wdtinit(void)
{ {
int ret; int ret;
err("C547x Watchdog Driver\n"); _err("C547x Watchdog Driver\n");
/* Register as /dev/wdt */ /* Register as /dev/wdt */
@ -379,7 +379,7 @@ int up_wdtinit(void)
/* Register for an interrupt level callback through wdt_interrupt */ /* Register for an interrupt level callback through wdt_interrupt */
err("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG); _err("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
/* Make sure that the timer is stopped */ /* Make sure that the timer is stopped */

10
arch/arm/src/calypso/calypso_spi.c
View File

@ -216,7 +216,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
tmp <<= (32-bitlen); /* align to MSB */ tmp <<= (32-bitlen); /* align to MSB */
} }
err("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ", _err("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ",
dev_idx, bitlen, tmp); dev_idx, bitlen, tmp);
/* fill transmit registers */ /* fill transmit registers */
@ -236,14 +236,14 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
} }
putreg16(reg_ctrl, SPI_REG(REG_CTRL)); putreg16(reg_ctrl, SPI_REG(REG_CTRL));
err("reg_ctrl=0x%04x ", reg_ctrl); _err("reg_ctrl=0x%04x ", reg_ctrl);
/* wait until the transfer is complete */ /* wait until the transfer is complete */
while (1) while (1)
{ {
reg_status = getreg16(SPI_REG(REG_STATUS)); reg_status = getreg16(SPI_REG(REG_STATUS));
err("status=0x%04x ", reg_status); _err("status=0x%04x ", reg_status);
if (din && (reg_status & SPI_STATUS_RE)) if (din && (reg_status & SPI_STATUS_RE))
{ {
break; break;
@ -262,7 +262,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
{ {
tmp = getreg16(SPI_REG(REG_RX_MSB)) << 16; tmp = getreg16(SPI_REG(REG_RX_MSB)) << 16;
tmp |= getreg16(SPI_REG(REG_RX_LSB)); tmp |= getreg16(SPI_REG(REG_RX_LSB));
err("data_in=0x%08x ", tmp); _err("data_in=0x%08x ", tmp);
if (bitlen <= 8) if (bitlen <= 8)
{ {
@ -278,7 +278,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
} }
} }
err("\n"); _err("\n");
return 0; return 0;
} }

8
arch/arm/src/calypso/calypso_uwire.c
View File

@ -112,7 +112,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
/* FIXME uwire_init always selects CS0 for now */ /* FIXME uwire_init always selects CS0 for now */
err("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen); _err("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
/* select the chip */ /* select the chip */
@ -128,7 +128,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
tmp <<= 16 - bitlen; /* align to MSB */ tmp <<= 16 - bitlen; /* align to MSB */
putreg16(tmp, UWIRE_REG(REG_DATA)); putreg16(tmp, UWIRE_REG(REG_DATA));
err(", data_out=0x%04hx", tmp); _err(", data_out=0x%04hx", tmp);
} }
tmp = (dout ? UWIRE_CSR_BITS_WR(bitlen) : 0) | tmp = (dout ? UWIRE_CSR_BITS_WR(bitlen) : 0) |
@ -142,7 +142,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
_uwire_wait(UWIRE_CSR_RDRB, UWIRE_CSR_RDRB); _uwire_wait(UWIRE_CSR_RDRB, UWIRE_CSR_RDRB);
tmp = getreg16(UWIRE_REG(REG_DATA)); tmp = getreg16(UWIRE_REG(REG_DATA));
err(", data_in=0x%08x", tmp); _err(", data_in=0x%08x", tmp);
if (bitlen <= 8) if (bitlen <= 8)
*(uint8_t *)din = tmp & 0xff; *(uint8_t *)din = tmp & 0xff;
@ -155,7 +155,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
putreg16(UWIRE_CSR_IDX(0) | 0, UWIRE_REG(REG_CSR)); putreg16(UWIRE_CSR_IDX(0) | 0, UWIRE_REG(REG_CSR));
_uwire_wait(UWIRE_CSR_CSRB, 0); _uwire_wait(UWIRE_CSR_CSRB, 0);
err(")\n"); _err(")\n");
return 0; return 0;
} }

4
arch/arm/src/common/up_initialize.c
View File

@ -77,13 +77,13 @@ static void up_calibratedelay(void)
{ {
int i; int i;
llerr("Beginning 100s delay\n"); _llerr("Beginning 100s delay\n");
for (i = 0; i < 100; i++) for (i = 0; i < 100; i++)
{ {
up_mdelay(1000); up_mdelay(1000);
} }
llerr("End 100s delay\n"); _llerr("End 100s delay\n");
} }
#else #else
# define up_calibratedelay() # define up_calibratedelay()

24
arch/arm/src/dm320/dm320_usbdev.c
View File

@ -443,7 +443,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -460,7 +460,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -472,7 +472,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%02x\n", addr, val); _llerr("%08x->%02x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -506,7 +506,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -523,7 +523,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -535,7 +535,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%04x\n", addr, val); _llerr("%08x->%04x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -569,7 +569,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -586,7 +586,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -598,7 +598,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%08x\n", addr, val); _llerr("%08x->%08x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -616,7 +616,7 @@ static void dm320_putreg8(uint8_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%02x\n", addr, val); _llerr("%08x<-%02x\n", addr, val);
/* Write the value */ /* Write the value */
@ -637,7 +637,7 @@ static void dm320_putreg16(uint16_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%04x\n", addr, val); _llerr("%08x<-%04x\n", addr, val);
/* Write the value */ /* Write the value */
@ -658,7 +658,7 @@ static void dm320_putreg32(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", addr, val); _llerr("%08x<-%08x\n", addr, val);
/* Write the value */ /* Write the value */

2
arch/arm/src/efm32/efm32_idle.c
View File

@ -110,7 +110,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */ /* Perform board-specific, state-dependent logic here */
llinfo("newstate= %d oldstate=%d\n", newstate, oldstate); _llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */ /* Then force the global state change */

12
arch/arm/src/efm32/efm32_irq.c
View File

@ -170,7 +170,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
static int efm32_nmi(int irq, FAR void *context) static int efm32_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -178,7 +178,7 @@ static int efm32_nmi(int irq, FAR void *context)
static int efm32_busfault(int irq, FAR void *context) static int efm32_busfault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS)); _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC(); PANIC();
return 0; return 0;
} }
@ -186,7 +186,7 @@ static int efm32_busfault(int irq, FAR void *context)
static int efm32_usagefault(int irq, FAR void *context) static int efm32_usagefault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS)); _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC(); PANIC();
return 0; return 0;
} }
@ -194,7 +194,7 @@ static int efm32_usagefault(int irq, FAR void *context)
static int efm32_pendsv(int irq, FAR void *context) static int efm32_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -202,7 +202,7 @@ static int efm32_pendsv(int irq, FAR void *context)
static int efm32_errmonitor(int irq, FAR void *context) static int efm32_errmonitor(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Debug Monitor received\n"); _err("PANIC!!! Debug Monitor received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -210,7 +210,7 @@ static int efm32_errmonitor(int irq, FAR void *context)
static int efm32_reserved(int irq, FAR void *context) static int efm32_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

4
arch/arm/src/efm32/efm32_leserial.c
View File

@ -518,7 +518,7 @@ static int efm32_interrupt(struct uart_dev_s *dev)
* FERR - Framing Error Interrupt Enable * FERR - Framing Error Interrupt Enable
*/ */
llerr("RX ERROR: %08x\n", intflags); _llerr("RX ERROR: %08x\n", intflags);
} }
/* Check for transmit errors */ /* Check for transmit errors */
@ -527,7 +527,7 @@ static int efm32_interrupt(struct uart_dev_s *dev)
{ {
/* TXOF - TX Overflow Interrupt Enable */ /* TXOF - TX Overflow Interrupt Enable */
llerr("RX ERROR: %08x\n", intflags); _llerr("RX ERROR: %08x\n", intflags);
} }
#endif #endif

4
arch/arm/src/efm32/efm32_rmu.h
View File

@ -56,9 +56,9 @@
#endif #endif
#ifdef CONFIG_EFM32_RMU_DEBUG #ifdef CONFIG_EFM32_RMU_DEBUG
# define rmuerr llerr # define rmuerr _llerr
# ifdef CONFIG_DEBUG_INFO # ifdef CONFIG_DEBUG_INFO
# define rmuinfo llerr # define rmuinfo _llerr
# else # else
# define rmuinfo(x...) # define rmuinfo(x...)
# endif # endif

4
arch/arm/src/efm32/efm32_serial.c
View File

@ -780,7 +780,7 @@ static int efm32_rxinterrupt(struct uart_dev_s *dev)
* FERR - Framing Error Interrupt Enable * FERR - Framing Error Interrupt Enable
*/ */
llerr("RX ERROR: %08x\n", intflags); _llerr("RX ERROR: %08x\n", intflags);
} }
#endif #endif
@ -863,7 +863,7 @@ static int efm32_txinterrupt(struct uart_dev_s *dev)
{ {
/* TXOF - TX Overflow Interrupt Enable */ /* TXOF - TX Overflow Interrupt Enable */
llerr("RX ERROR: %08x\n", intflags); _llerr("RX ERROR: %08x\n", intflags);
} }
#endif #endif

8
arch/arm/src/efm32/efm32_usbdev.c
View File

@ -815,7 +815,7 @@ static uint32_t efm32_getreg(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -832,7 +832,7 @@ static uint32_t efm32_getreg(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -844,7 +844,7 @@ static uint32_t efm32_getreg(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%08x\n", addr, val); _llerr("%08x->%08x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -862,7 +862,7 @@ static void efm32_putreg(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", addr, val); _llerr("%08x<-%08x\n", addr, val);
/* Write the value */ /* Write the value */

4
arch/arm/src/efm32/efm32_usbhost.c
View File

@ -582,7 +582,7 @@ static const struct efm32_usbhost_trace_s g_trace2[TRACE2_NSTRINGS] =
#ifdef CONFIG_EFM32_USBHOST_REGDEBUG #ifdef CONFIG_EFM32_USBHOST_REGDEBUG
static void efm32_printreg(uint32_t addr, uint32_t val, bool iswrite) static void efm32_printreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); _llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
} }
#endif #endif
@ -632,7 +632,7 @@ static void efm32_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
/* No.. More than one. */ /* No.. More than one. */
llerr("[repeats %d more times]\n", count); _llerr("[repeats %d more times]\n", count);
} }
} }

12
arch/arm/src/kinetis/kinetis_irq.c
View File

@ -173,7 +173,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
static int kinetis_nmi(int irq, FAR void *context) static int kinetis_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -181,7 +181,7 @@ static int kinetis_nmi(int irq, FAR void *context)
static int kinetis_busfault(int irq, FAR void *context) static int kinetis_busfault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Bus fault recived\n"); _err("PANIC!!! Bus fault recived\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -189,7 +189,7 @@ static int kinetis_busfault(int irq, FAR void *context)
static int kinetis_usagefault(int irq, FAR void *context) static int kinetis_usagefault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Usage fault received\n"); _err("PANIC!!! Usage fault received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -197,7 +197,7 @@ static int kinetis_usagefault(int irq, FAR void *context)
static int kinetis_pendsv(int irq, FAR void *context) static int kinetis_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -205,7 +205,7 @@ static int kinetis_pendsv(int irq, FAR void *context)
static int kinetis_errmonitor(int irq, FAR void *context) static int kinetis_errmonitor(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Debug Monitor received\n"); _err("PANIC!!! Debug Monitor received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -213,7 +213,7 @@ static int kinetis_errmonitor(int irq, FAR void *context)
static int kinetis_reserved(int irq, FAR void *context) static int kinetis_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

2
arch/arm/src/kinetis/kinetis_serial.c
View File

@ -805,7 +805,7 @@ static int up_interrupt(int irq, void *context)
*/ */
regval = up_serialin(priv, KINETIS_UART_S1_OFFSET); regval = up_serialin(priv, KINETIS_UART_S1_OFFSET);
llerr("S1: %02x\n", regval); _llerr("S1: %02x\n", regval);
UNUSED(regval); UNUSED(regval);
regval = up_serialin(priv, KINETIS_UART_D_OFFSET); regval = up_serialin(priv, KINETIS_UART_D_OFFSET);

2
arch/arm/src/kinetis/kinetis_start.c
View File

@ -156,7 +156,7 @@ void __start(void)
/* Show reset status */ /* Show reset status */
err("Reset status: %02x:%02x\n", _err("Reset status: %02x:%02x\n",
getreg8(KINETIS_SMC_SRSH), getreg8(KINETIS_SMC_SRSL)); getreg8(KINETIS_SMC_SRSH), getreg8(KINETIS_SMC_SRSL));
/* Then start NuttX */ /* Then start NuttX */

16
arch/arm/src/kinetis/kinetis_usbdev.c
View File

@ -369,9 +369,9 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
# undef CONFIG_KHCI_USBDEV_BDTDEBUG # undef CONFIG_KHCI_USBDEV_BDTDEBUG
# define CONFIG_KHCI_USBDEV_BDTDEBUG 1 # define CONFIG_KHCI_USBDEV_BDTDEBUG 1
# define regerr llerr # define regerr _llerr
# ifdef CONFIG_DEBUG_INFO # ifdef CONFIG_DEBUG_INFO
# define reginfo llerr # define reginfo _llerr
# else # else
# define reginfo(x...) # define reginfo(x...)
# endif # endif
@ -389,9 +389,9 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
#ifdef CONFIG_KHCI_USBDEV_BDTDEBUG #ifdef CONFIG_KHCI_USBDEV_BDTDEBUG
# define bdterr llerr # define bdterr _llerr
# ifdef CONFIG_DEBUG_INFO # ifdef CONFIG_DEBUG_INFO
# define bdtinfo llerr # define bdtinfo _llerr
# else # else
# define bdtinfo(x...) # define bdtinfo(x...)
# endif # endif
@ -714,7 +714,7 @@ static uint16_t khci_getreg(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
} }
@ -730,7 +730,7 @@ static uint16_t khci_getreg(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -742,7 +742,7 @@ static uint16_t khci_getreg(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%04x\n", addr, val); _llerr("%08x->%04x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -756,7 +756,7 @@ static void khci_putreg(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%04x\n", addr, val); _llerr("%08x<-%04x\n", addr, val);
/* Write the value */ /* Write the value */

4
arch/arm/src/kl/kl_dumpgpio.c
View File

@ -118,9 +118,9 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg)
flags = enter_critical_section(); flags = enter_critical_section();
llinfo("GPIO%c pinset: %08x base: %08x -- %s\n", _llinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg); g_portchar[port], pinset, base, msg);
llinfo(" PDOR: %08x PDIR: %08x PDDR: %08x\n", _llinfo(" PDOR: %08x PDIR: %08x PDDR: %08x\n",
getreg32(base + KL_GPIO_PDOR_OFFSET), getreg32(base + KL_GPIO_PDOR_OFFSET),
getreg32(base + KL_GPIO_PDIR_OFFSET), getreg32(base + KL_GPIO_PDIR_OFFSET),
getreg32(base + KL_GPIO_PDDR_OFFSET)); getreg32(base + KL_GPIO_PDDR_OFFSET));

2
arch/arm/src/kl/kl_idle.c
View File

@ -103,7 +103,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */ /* Perform board-specific, state-dependent logic here */
llinfo("newstate= %d oldstate=%d\n", newstate, oldstate); _llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */ /* Then force the global state change */

6
arch/arm/src/kl/kl_irq.c
View File

@ -141,7 +141,7 @@ static void kl_dumpnvic(const char *msg, int irq)
static int kl_nmi(int irq, FAR void *context) static int kl_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -149,7 +149,7 @@ static int kl_nmi(int irq, FAR void *context)
static int kl_pendsv(int irq, FAR void *context) static int kl_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -157,7 +157,7 @@ static int kl_pendsv(int irq, FAR void *context)
static int kl_reserved(int irq, FAR void *context) static int kl_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

2
arch/arm/src/lpc11xx/lpc11_i2c.c
View File

@ -485,7 +485,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
if (port > 1) if (port > 1)
{ {
err("lpc I2C Only support 0,1\n"); _err("lpc I2C Only support 0,1\n");
return NULL; return NULL;
} }

6
arch/arm/src/lpc11xx/lpc11_irq.c
View File

@ -137,7 +137,7 @@ static void lpc11_dumpnvic(const char *msg, int irq)
static int lpc11_nmi(int irq, FAR void *context) static int lpc11_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -145,7 +145,7 @@ static int lpc11_nmi(int irq, FAR void *context)
static int lpc11_pendsv(int irq, FAR void *context) static int lpc11_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -153,7 +153,7 @@ static int lpc11_pendsv(int irq, FAR void *context)
static int lpc11_reserved(int irq, FAR void *context) static int lpc11_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

4
arch/arm/src/lpc11xx/lpc11_serial.c
View File

@ -630,7 +630,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */ /* Read the line status register (LSR) to clear */
status = up_serialin(priv, LPC11_UART_LSR_OFFSET); status = up_serialin(priv, LPC11_UART_LSR_OFFSET);
info("LSR: %02x\n", status); _info("LSR: %02x\n", status);
break; break;
} }
@ -638,7 +638,7 @@ static int up_interrupt(int irq, void *context)
default: default:
{ {
err("Unexpected IIR: %02x\n", status); _err("Unexpected IIR: %02x\n", status);
break; break;
} }
} }

14
arch/arm/src/lpc17xx/lpc17_can.c
View File

@ -308,7 +308,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return; return;
@ -325,7 +325,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -337,7 +337,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%08x\n", addr, value); _llerr("%08x->%08x\n", addr, value);
} }
#endif #endif
@ -398,7 +398,7 @@ static void can_putreg(struct up_dev_s *priv, int offset, uint32_t value)
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", addr, value); _llerr("%08x<-%08x\n", addr, value);
/* Write the value */ /* Write the value */
@ -458,7 +458,7 @@ static void can_putcommon(uint32_t addr, uint32_t value)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", addr, value); _llerr("%08x<-%08x\n", addr, value);
/* Write the value */ /* Write the value */
@ -681,7 +681,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg) static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
{ {
err("Fix me:Not Implemented\n"); _err("Fix me:Not Implemented\n");
return 0; return 0;
} }
@ -701,7 +701,7 @@ static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id) static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
{ {
err("Fix me:Not Implemented\n"); _err("Fix me:Not Implemented\n");
return 0; return 0;
} }

2
arch/arm/src/lpc17xx/lpc17_dac.c
View File

@ -172,7 +172,7 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg) static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
{ {
err("Fix me:Not Implemented\n"); _err("Fix me:Not Implemented\n");
return 0; return 0;
} }

18
arch/arm/src/lpc17xx/lpc17_ethernet.c
View File

@ -415,7 +415,7 @@ static void lpc17_ethreset(struct lpc17_driver_s *priv);
#ifdef CONFIG_NET_REGDEBUG #ifdef CONFIG_NET_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite) static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
err("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); _err("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
} }
#endif #endif
@ -465,7 +465,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
/* No.. More than one. */ /* No.. More than one. */
err("[repeats %d more times]\n", count); _err("[repeats %d more times]\n", count);
} }
} }
@ -2319,14 +2319,14 @@ static void lpc17_showpins(void)
#if defined(CONFIG_NET_REGDEBUG) && defined(LPC17_HAVE_PHY) #if defined(CONFIG_NET_REGDEBUG) && defined(LPC17_HAVE_PHY)
static void lpc17_showmii(uint8_t phyaddr, const char *msg) static void lpc17_showmii(uint8_t phyaddr, const char *msg)
{ {
err("PHY " LPC17_PHYNAME ": %s\n", msg); _err("PHY " LPC17_PHYNAME ": %s\n", msg);
err(" MCR: %04x\n", lpc17_phyread(phyaddr, MII_MCR)); _err(" MCR: %04x\n", lpc17_phyread(phyaddr, MII_MCR));
err(" MSR: %04x\n", lpc17_phyread(phyaddr, MII_MSR)); _err(" MSR: %04x\n", lpc17_phyread(phyaddr, MII_MSR));
err(" ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE)); _err(" ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE));
err(" LPA: %04x\n", lpc17_phyread(phyaddr, MII_LPA)); _err(" LPA: %04x\n", lpc17_phyread(phyaddr, MII_LPA));
err(" EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION)); _err(" EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION));
#ifdef CONFIG_ETH0_PHY_KS8721 #ifdef CONFIG_ETH0_PHY_KS8721
err(" 10BTCR: %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR)); _err(" 10BTCR: %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR));
#endif #endif
} }
#endif #endif

2
arch/arm/src/lpc17xx/lpc17_i2c.c
View File

@ -485,7 +485,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
if (port > 1) if (port > 1)
{ {
err("lpc I2C Only support 0,1\n"); _err("lpc I2C Only support 0,1\n");
return NULL; return NULL;
} }

12
arch/arm/src/lpc17xx/lpc17_irq.c
View File

@ -152,7 +152,7 @@ static void lpc17_dumpnvic(const char *msg, int irq)
static int lpc17_nmi(int irq, FAR void *context) static int lpc17_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -160,7 +160,7 @@ static int lpc17_nmi(int irq, FAR void *context)
static int lpc17_busfault(int irq, FAR void *context) static int lpc17_busfault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Bus fault recived\n"); _err("PANIC!!! Bus fault recived\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -168,7 +168,7 @@ static int lpc17_busfault(int irq, FAR void *context)
static int lpc17_usagefault(int irq, FAR void *context) static int lpc17_usagefault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Usage fault received\n"); _err("PANIC!!! Usage fault received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -176,7 +176,7 @@ static int lpc17_usagefault(int irq, FAR void *context)
static int lpc17_pendsv(int irq, FAR void *context) static int lpc17_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -184,7 +184,7 @@ static int lpc17_pendsv(int irq, FAR void *context)
static int lpc17_errmonitor(int irq, FAR void *context) static int lpc17_errmonitor(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Debug Monitor received\n"); _err("PANIC!!! Debug Monitor received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -192,7 +192,7 @@ static int lpc17_errmonitor(int irq, FAR void *context)
static int lpc17_reserved(int irq, FAR void *context) static int lpc17_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

6
arch/arm/src/lpc17xx/lpc17_serial.c
View File

@ -1134,7 +1134,7 @@ static int up_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */ /* Read the modem status register (MSR) to clear */
status = up_serialin(priv, LPC17_UART_MSR_OFFSET); status = up_serialin(priv, LPC17_UART_MSR_OFFSET);
info("MSR: %02x\n", status); _info("MSR: %02x\n", status);
break; break;
} }
@ -1145,7 +1145,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */ /* Read the line status register (LSR) to clear */
status = up_serialin(priv, LPC17_UART_LSR_OFFSET); status = up_serialin(priv, LPC17_UART_LSR_OFFSET);
info("LSR: %02x\n", status); _info("LSR: %02x\n", status);
break; break;
} }
@ -1153,7 +1153,7 @@ static int up_interrupt(int irq, void *context)
default: default:
{ {
err("Unexpected IIR: %02x\n", status); _err("Unexpected IIR: %02x\n", status);
break; break;
} }
} }

4
arch/arm/src/lpc17xx/lpc17_usbdev.c
View File

@ -531,7 +531,7 @@ static struct lpc17_dmadesc_s g_usbddesc[CONFIG_LPC17_USBDEV_NDMADESCRIPTORS];
#ifdef CONFIG_LPC17_USBDEV_REGDEBUG #ifdef CONFIG_LPC17_USBDEV_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite) static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); _llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
} }
#endif #endif
@ -581,7 +581,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
/* No.. More than one. */ /* No.. More than one. */
llerr("[repeats %d more times]\n", count); _llerr("[repeats %d more times]\n", count);
} }
} }

4
arch/arm/src/lpc17xx/lpc17_usbhost.c
View File

@ -456,7 +456,7 @@ static struct lpc17_xfrinfo_s g_xfrbuffers[CONFIG_LPC17_USBHOST_NPREALLOC];
#ifdef CONFIG_LPC17_USBHOST_REGDEBUG #ifdef CONFIG_LPC17_USBHOST_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite) static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); _llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
} }
#endif #endif
@ -506,7 +506,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
/* No.. More than one. */ /* No.. More than one. */
llerr("[repeats %d more times]\n", count); _llerr("[repeats %d more times]\n", count);
} }
} }

6
arch/arm/src/lpc214x/lpc214x_serial.c
View File

@ -530,7 +530,7 @@ static int up_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */ /* Read the modem status register (MSR) to clear */
status = up_serialin(priv, LPC214X_UART_MSR_OFFSET); status = up_serialin(priv, LPC214X_UART_MSR_OFFSET);
info("MSR: %02x\n", status); _info("MSR: %02x\n", status);
break; break;
} }
@ -541,7 +541,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */ /* Read the line status register (LSR) to clear */
status = up_serialin(priv, LPC214X_UART_LSR_OFFSET); status = up_serialin(priv, LPC214X_UART_LSR_OFFSET);
info("LSR: %02x\n", status); _info("LSR: %02x\n", status);
break; break;
} }
@ -549,7 +549,7 @@ static int up_interrupt(int irq, void *context)
default: default:
{ {
err("Unexpected IIR: %02x\n", status); _err("Unexpected IIR: %02x\n", status);
break; break;
} }
} }

8
arch/arm/src/lpc214x/lpc214x_usbdev.c
View File

@ -539,7 +539,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -556,7 +556,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -568,7 +568,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%08x\n", addr, val); _llerr("%08x->%08x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -586,7 +586,7 @@ static void lpc214x_putreg(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", addr, val); _llerr("%08x<-%08x\n", addr, val);
/* Write the value */ /* Write the value */

2
arch/arm/src/lpc2378/lpc23xx_i2c.c
View File

@ -490,7 +490,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
if (port > 1) if (port > 1)
{ {
err("lpc I2C Only support 0,1\n"); _err("lpc I2C Only support 0,1\n");
return NULL; return NULL;
} }

6
arch/arm/src/lpc2378/lpc23xx_serial.c
View File

@ -648,7 +648,7 @@ static int up_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */ /* Read the modem status register (MSR) to clear */
status = up_serialin(priv, UART_MSR_OFFSET); status = up_serialin(priv, UART_MSR_OFFSET);
info("MSR: %02x\n", status); _info("MSR: %02x\n", status);
break; break;
} }
@ -659,7 +659,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */ /* Read the line status register (LSR) to clear */
status = up_serialin(priv, UART_LSR_OFFSET); status = up_serialin(priv, UART_LSR_OFFSET);
info("LSR: %02x\n", status); _info("LSR: %02x\n", status);
break; break;
} }
@ -667,7 +667,7 @@ static int up_interrupt(int irq, void *context)
default: default:
{ {
err("Unexpected IIR: %02x\n", status); _err("Unexpected IIR: %02x\n", status);
break; break;
} }
} }

4
arch/arm/src/lpc31xx/lpc31_ehci.c
View File

@ -826,7 +826,7 @@ static uint32_t lpc31_swap32(uint32_t value)
static void lpc31_printreg(volatile uint32_t *regaddr, uint32_t regval, static void lpc31_printreg(volatile uint32_t *regaddr, uint32_t regval,
bool iswrite) bool iswrite)
{ {
llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval); _llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
} }
#endif #endif
@ -877,7 +877,7 @@ static void lpc31_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool isw
{ {
/* No.. More than one. */ /* No.. More than one. */
llerr("[repeats %d more times]\n", count); _llerr("[repeats %d more times]\n", count);
} }
} }

2
arch/arm/src/lpc31xx/lpc31_serial.c
View File

@ -560,7 +560,7 @@ static int up_interrupt(int irq, void *context)
default: default:
{ {
err("Unexpected IIR: %02x\n", status); _err("Unexpected IIR: %02x\n", status);
break; break;
} }
} }

8
arch/arm/src/lpc31xx/lpc31_spi.c
View File

@ -207,7 +207,7 @@ static bool spi_checkreg(bool wr, uint32_t value, uint32_t address)
{ {
if (g_ntimes > 0) if (g_ntimes > 0)
{ {
llerr("...[Repeats %d times]...\n", g_ntimes); _llerr("...[Repeats %d times]...\n", g_ntimes);
} }
g_wrlast = wr; g_wrlast = wr;
@ -239,7 +239,7 @@ static void spi_putreg(uint32_t value, uint32_t address)
{ {
if (spi_checkreg(true, value, address)) if (spi_checkreg(true, value, address))
{ {
llerr("%08x<-%08x\n", address, value); _llerr("%08x<-%08x\n", address, value);
} }
putreg32(value, address); putreg32(value, address);
} }
@ -265,7 +265,7 @@ static uint32_t spi_getreg(uint32_t address)
uint32_t value = getreg32(address); uint32_t value = getreg32(address);
if (spi_checkreg(false, value, address)) if (spi_checkreg(false, value, address))
{ {
llerr("%08x->%08x\n", address, value); _llerr("%08x->%08x\n", address, value);
} }
return value; return value;
} }
@ -921,7 +921,7 @@ FAR struct spi_dev_s *lpc31_spibus_initialize(int port)
*/ */
#ifdef CONFIG_LPC31_SPI_REGDEBUG #ifdef CONFIG_LPC31_SPI_REGDEBUG
llerr("PINS: %08x MODE0: %08x MODE1: %08x\n", _llerr("PINS: %08x MODE0: %08x MODE1: %08x\n",
spi_getreg(LPC31_IOCONFIG_SPI_PINS), spi_getreg(LPC31_IOCONFIG_SPI_PINS),
spi_getreg(LPC31_IOCONFIG_SPI_MODE0), spi_getreg(LPC31_IOCONFIG_SPI_MODE0),
spi_getreg(LPC31_IOCONFIG_SPI_MODE1)); spi_getreg(LPC31_IOCONFIG_SPI_MODE1));

8
arch/arm/src/lpc31xx/lpc31_usbdev.c
View File

@ -501,7 +501,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -518,7 +518,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -530,7 +530,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%08x\n", addr, val); _llerr("%08x->%08x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -548,7 +548,7 @@ static void lpc31_putreg(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", addr, val); _llerr("%08x<-%08x\n", addr, val);
/* Write the value */ /* Write the value */

2
arch/arm/src/lpc43xx/lpc43_dac.c
View File

@ -173,7 +173,7 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg) static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
{ {
err("Fix me:Not Implemented\n"); _err("Fix me:Not Implemented\n");
return 0; return 0;
} }

4
arch/arm/src/lpc43xx/lpc43_ehci.c
View File

@ -817,7 +817,7 @@ static uint32_t lpc43_swap32(uint32_t value)
static void lpc43_printreg(volatile uint32_t *regaddr, uint32_t regval, static void lpc43_printreg(volatile uint32_t *regaddr, uint32_t regval,
bool iswrite) bool iswrite)
{ {
llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval); _llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
} }
#endif #endif
@ -868,7 +868,7 @@ static void lpc43_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool isw
{ {
/* No.. More than one. */ /* No.. More than one. */
llerr("[repeats %d more times]\n", count); _llerr("[repeats %d more times]\n", count);
} }
} }

8
arch/arm/src/lpc43xx/lpc43_ethernet.c
View File

@ -704,7 +704,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -721,7 +721,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -733,7 +733,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%08x\n", addr, val); _llerr("%08x->%08x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -760,7 +760,7 @@ static void lpc43_putreg(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", addr, val); _llerr("%08x<-%08x\n", addr, val);
/* Write the value */ /* Write the value */

2
arch/arm/src/lpc43xx/lpc43_i2c.c
View File

@ -464,7 +464,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
if (port > 1) if (port > 1)
{ {
err("lpc I2C Only support 0,1\n"); _err("lpc I2C Only support 0,1\n");
return NULL; return NULL;
} }

2
arch/arm/src/lpc43xx/lpc43_idle.c
View File

@ -98,7 +98,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */ /* Perform board-specific, state-dependent logic here */
llinfo("newstate= %d oldstate=%d\n", newstate, oldstate); _llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */ /* Then force the global state change */

12
arch/arm/src/lpc43xx/lpc43_irq.c
View File

@ -161,7 +161,7 @@ static void lpc43_dumpnvic(const char *msg, int irq)
static int lpc43_nmi(int irq, FAR void *context) static int lpc43_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -169,7 +169,7 @@ static int lpc43_nmi(int irq, FAR void *context)
static int lpc43_busfault(int irq, FAR void *context) static int lpc43_busfault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Bus fault recived\n"); _err("PANIC!!! Bus fault recived\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -177,7 +177,7 @@ static int lpc43_busfault(int irq, FAR void *context)
static int lpc43_usagefault(int irq, FAR void *context) static int lpc43_usagefault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Usage fault received\n"); _err("PANIC!!! Usage fault received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -185,7 +185,7 @@ static int lpc43_usagefault(int irq, FAR void *context)
static int lpc43_pendsv(int irq, FAR void *context) static int lpc43_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -193,7 +193,7 @@ static int lpc43_pendsv(int irq, FAR void *context)
static int lpc43_errmonitor(int irq, FAR void *context) static int lpc43_errmonitor(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Debug Monitor received\n"); _err("PANIC!!! Debug Monitor received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -201,7 +201,7 @@ static int lpc43_errmonitor(int irq, FAR void *context)
static int lpc43_reserved(int irq, FAR void *context) static int lpc43_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

2
arch/arm/src/lpc43xx/lpc43_rit.c
View File

@ -201,7 +201,7 @@ void up_timer_initialize(void)
mask_bits++; mask_bits++;
} }
llerr("mask_bits = %d, mask = %X, ticks_per_int = %d\r\n", _llerr("mask_bits = %d, mask = %X, ticks_per_int = %d\r\n",
mask_bits, (0xffffffff << (32 - mask_bits)), ticks_per_int); mask_bits, (0xffffffff << (32 - mask_bits)), ticks_per_int);
/* Set the mask and compare value so we get interrupts every /* Set the mask and compare value so we get interrupts every

6
arch/arm/src/lpc43xx/lpc43_serial.c
View File

@ -854,7 +854,7 @@ static int up_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */ /* Read the modem status register (MSR) to clear */
status = up_serialin(priv, LPC43_UART_MSR_OFFSET); status = up_serialin(priv, LPC43_UART_MSR_OFFSET);
info("MSR: %02x\n", status); _info("MSR: %02x\n", status);
break; break;
} }
@ -865,7 +865,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */ /* Read the line status register (LSR) to clear */
status = up_serialin(priv, LPC43_UART_LSR_OFFSET); status = up_serialin(priv, LPC43_UART_LSR_OFFSET);
info("LSR: %02x\n", status); _info("LSR: %02x\n", status);
break; break;
} }
@ -873,7 +873,7 @@ static int up_interrupt(int irq, void *context)
default: default:
{ {
err("Unexpected IIR: %02x\n", status); _err("Unexpected IIR: %02x\n", status);
break; break;
} }
} }

8
arch/arm/src/lpc43xx/lpc43_usb0dev.c
View File

@ -522,7 +522,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -539,7 +539,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -551,7 +551,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%08x\n", addr, val); _llerr("%08x->%08x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -569,7 +569,7 @@ static void lpc43_putreg(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", addr, val); _llerr("%08x<-%08x\n", addr, val);
/* Write the value */ /* Write the value */

10
arch/arm/src/moxart/moxart_irq.c
View File

@ -145,15 +145,15 @@ void up_irqinitialize(void)
#if 1 #if 1
#define REG(x) (*(volatile uint32_t *)(x)) #define REG(x) (*(volatile uint32_t *)(x))
llerr("\n=============================================================\n"); _llerr("\n=============================================================\n");
llerr("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n", _llerr("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n",
REG(0x98400030), REG(0x98400034), REG(0x98400038), REG(0x98400004), REG(0x98400030), REG(0x98400034), REG(0x98400038), REG(0x98400004),
REG(0x98400000), REG(0x98400008)); REG(0x98400000), REG(0x98400008));
llerr("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n", _llerr("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
REG(0x98800014), REG(0x98800004), REG(0x9880000C), REG(0x98800010)); REG(0x98800014), REG(0x98800004), REG(0x9880000C), REG(0x98800010));
llerr("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n", _llerr("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
REG(0x98800034), REG(0x98800024), REG(0x9880002C), REG(0x98800020)); REG(0x98800034), REG(0x98800024), REG(0x9880002C), REG(0x98800020));
llerr("=============================================================\n"); _llerr("=============================================================\n");
#endif #endif
#ifndef CONFIG_SUPPRESS_INTERRUPTS #ifndef CONFIG_SUPPRESS_INTERRUPTS

8
arch/arm/src/nuc1xx/nuc_dumpgpio.c
View File

@ -124,19 +124,19 @@ void nuc_dumpgpio(gpio_cfgset_t pinset, const char *msg)
flags = enter_critical_section(); flags = enter_critical_section();
llerr("GPIO%c pinset: %08x base: %08x -- %s\n", _llerr("GPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg); g_portchar[port], pinset, base, msg);
llerr(" PMD: %08x OFFD: %08x DOUT: %08x DMASK: %08x\n", _llerr(" PMD: %08x OFFD: %08x DOUT: %08x DMASK: %08x\n",
getreg32(base + NUC_GPIO_PMD_OFFSET), getreg32(base + NUC_GPIO_PMD_OFFSET),
getreg32(base + NUC_GPIO_OFFD_OFFSET), getreg32(base + NUC_GPIO_OFFD_OFFSET),
getreg32(base + NUC_GPIO_DOUT_OFFSET), getreg32(base + NUC_GPIO_DOUT_OFFSET),
getreg32(base + NUC_GPIO_DMASK_OFFSET)); getreg32(base + NUC_GPIO_DMASK_OFFSET));
llerr(" PIN: %08x DBEN: %08x IMD: %08x IEN: %08x\n", _llerr(" PIN: %08x DBEN: %08x IMD: %08x IEN: %08x\n",
getreg32(base + NUC_GPIO_PIN_OFFSET), getreg32(base + NUC_GPIO_PIN_OFFSET),
getreg32(base + NUC_GPIO_DBEN_OFFSET), getreg32(base + NUC_GPIO_DBEN_OFFSET),
getreg32(base + NUC_GPIO_IMD_OFFSET), getreg32(base + NUC_GPIO_IMD_OFFSET),
getreg32(base + NUC_GPIO_IEN_OFFSET)); getreg32(base + NUC_GPIO_IEN_OFFSET));
llerr(" ISRC: %08x\n", _llerr(" ISRC: %08x\n",
getreg32(base + NUC_GPIO_ISRC_OFFSET)); getreg32(base + NUC_GPIO_ISRC_OFFSET));
leave_critical_section(flags); leave_critical_section(flags);

2
arch/arm/src/nuc1xx/nuc_idle.c
View File

@ -99,7 +99,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */ /* Perform board-specific, state-dependent logic here */
llinfo("newstate= %d oldstate=%d\n", newstate, oldstate); _llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */ /* Then force the global state change */

6
arch/arm/src/nuc1xx/nuc_irq.c
View File

@ -141,7 +141,7 @@ static void nuc_dumpnvic(const char *msg, int irq)
static int nuc_nmi(int irq, FAR void *context) static int nuc_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -149,7 +149,7 @@ static int nuc_nmi(int irq, FAR void *context)
static int nuc_pendsv(int irq, FAR void *context) static int nuc_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -157,7 +157,7 @@ static int nuc_pendsv(int irq, FAR void *context)
static int nuc_reserved(int irq, FAR void *context) static int nuc_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

18
arch/arm/src/sam34/sam4cm_tc.c
View File

@ -390,20 +390,20 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg)
uintptr_t base; uintptr_t base;
base = chan->base; base = chan->base;
llerr("TC%d [%08x]: %s\n", chan->chan, (int)base, msg); _llerr("TC%d [%08x]: %s\n", chan->chan, (int)base, msg);
llerr(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n", _llerr(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET), getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET)); getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
base = chan->base; base = chan->base;
llerr("TC%d Channel %d [%08x]: %s\n", chan->chan, chan->chan, (int)base, msg); _llerr("TC%d Channel %d [%08x]: %s\n", chan->chan, chan->chan, (int)base, msg);
llerr(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n", _llerr(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n",
getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET), getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET)); getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
llerr(" RA: %08x RB: %08x RC: %08x SR: %08x\n", _llerr(" RA: %08x RB: %08x RC: %08x SR: %08x\n",
getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET), getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_SR_OFFSET)); getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_SR_OFFSET));
llerr(" IMR: %08x\n", _llerr(" IMR: %08x\n",
getreg32(base+SAM_TC_IMR_OFFSET)); getreg32(base+SAM_TC_IMR_OFFSET));
} }
#endif #endif
@ -447,7 +447,7 @@ static bool sam_checkreg(struct sam_chan_s *chan, bool wr, uint32_t regaddr,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", chan->ntimes); _llerr("...[Repeats %d times]...\n", chan->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -481,7 +481,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
#ifdef CONFIG_SAM34_TC_REGDEBUG #ifdef CONFIG_SAM34_TC_REGDEBUG
if (sam_checkreg(chan, false, regaddr, regval)) if (sam_checkreg(chan, false, regaddr, regval))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -504,7 +504,7 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan, unsigned int offset,
#ifdef CONFIG_SAM34_TC_REGDEBUG #ifdef CONFIG_SAM34_TC_REGDEBUG
if (sam_checkreg(chan, true, regaddr, regval)) if (sam_checkreg(chan, true, regaddr, regval))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif

6
arch/arm/src/sam34/sam_emac.c
View File

@ -490,7 +490,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -522,7 +522,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t address)
if (sam_checkreg(priv, false, regval, address)) if (sam_checkreg(priv, false, regval, address))
{ {
llerr("%08x->%08x\n", address, regval); _llerr("%08x->%08x\n", address, regval);
} }
return regval; return regval;
@ -543,7 +543,7 @@ static void sam_putreg(struct sam_emac_s *priv, uintptr_t address,
{ {
if (sam_checkreg(priv, true, regval, address)) if (sam_checkreg(priv, true, regval, address))
{ {
llerr("%08x<-%08x\n", address, regval); _llerr("%08x<-%08x\n", address, regval);
} }
putreg32(regval, address); putreg32(regval, address);

12
arch/arm/src/sam34/sam_irq.c
View File

@ -177,7 +177,7 @@ static void sam_dumpnvic(const char *msg, int irq)
static int sam_nmi(int irq, FAR void *context) static int sam_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -185,7 +185,7 @@ static int sam_nmi(int irq, FAR void *context)
static int sam_busfault(int irq, FAR void *context) static int sam_busfault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS)); _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC(); PANIC();
return 0; return 0;
} }
@ -193,7 +193,7 @@ static int sam_busfault(int irq, FAR void *context)
static int sam_usagefault(int irq, FAR void *context) static int sam_usagefault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS)); _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC(); PANIC();
return 0; return 0;
} }
@ -201,7 +201,7 @@ static int sam_usagefault(int irq, FAR void *context)
static int sam_pendsv(int irq, FAR void *context) static int sam_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -209,7 +209,7 @@ static int sam_pendsv(int irq, FAR void *context)
static int sam_errmonitor(int irq, FAR void *context) static int sam_errmonitor(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Debug Monitor received\n"); _err("PANIC!!! Debug Monitor received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -217,7 +217,7 @@ static int sam_errmonitor(int irq, FAR void *context)
static int sam_reserved(int irq, FAR void *context) static int sam_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

12
arch/arm/src/sam34/sam_rtt.c
View File

@ -81,8 +81,8 @@
*/ */
#ifdef CONFIG_DEBUG_RTT #ifdef CONFIG_DEBUG_RTT
# define rtterr llerr # define rtterr _llerr
# define rttinfo llinfo # define rttinfo _llinfo
#else #else
# define rtterr(x...) # define rtterr(x...)
# define rttinfo(x...) # define rttinfo(x...)
@ -214,7 +214,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -231,7 +231,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -243,7 +243,7 @@ static uint32_t sam34_getreg(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08lx->%08lx\n", addr, val); _llerr("%08lx->%08lx\n", addr, val);
return val; return val;
} }
#endif #endif
@ -261,7 +261,7 @@ static void sam34_putreg(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08lx<-%08lx\n", addr, val); _llerr("%08lx<-%08lx\n", addr, val);
/* Write the value */ /* Write the value */

6
arch/arm/src/sam34/sam_spi.c
View File

@ -420,7 +420,7 @@ static bool spi_checkreg(struct sam_spidev_s *spi, bool wr, uint32_t value,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", spi->ntimes); _llerr("...[Repeats %d times]...\n", spi->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -454,7 +454,7 @@ static inline uint32_t spi_getreg(struct sam_spidev_s *spi,
#ifdef CONFIG_SAM34_SPI_REGDEBUG #ifdef CONFIG_SAM34_SPI_REGDEBUG
if (spi_checkreg(spi, false, value, address)) if (spi_checkreg(spi, false, value, address))
{ {
llerr("%08x->%08x\n", address, value); _llerr("%08x->%08x\n", address, value);
} }
#endif #endif
@ -477,7 +477,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
#ifdef CONFIG_SAM34_SPI_REGDEBUG #ifdef CONFIG_SAM34_SPI_REGDEBUG
if (spi_checkreg(spi, true, value, address)) if (spi_checkreg(spi, true, value, address))
{ {
llerr("%08x<-%08x\n", address, value); _llerr("%08x<-%08x\n", address, value);
} }
#endif #endif

8
arch/arm/src/sam34/sam_tc.c
View File

@ -179,7 +179,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -196,7 +196,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -208,7 +208,7 @@ static uint32_t sam34_getreg(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08lx->%08lx\n", addr, val); _llerr("%08lx->%08lx\n", addr, val);
return val; return val;
} }
#endif #endif
@ -226,7 +226,7 @@ static void sam34_putreg(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08lx<-%08lx\n", addr, val); _llerr("%08lx<-%08lx\n", addr, val);
/* Write the value */ /* Write the value */

6
arch/arm/src/sam34/sam_twi.c
View File

@ -273,7 +273,7 @@ static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -305,7 +305,7 @@ static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address)
if (twi_checkreg(priv, false, value, address)) if (twi_checkreg(priv, false, value, address))
{ {
llerr("%08x->%08x\n", address, value); _llerr("%08x->%08x\n", address, value);
} }
return value; return value;
@ -326,7 +326,7 @@ static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
{ {
if (twi_checkreg(priv, true, value, address)) if (twi_checkreg(priv, true, value, address))
{ {
llerr("%08x<-%08x\n", address, value); _llerr("%08x<-%08x\n", address, value);
} }
putreg32(value, address); putreg32(value, address);

22
arch/arm/src/sam34/sam_udp.c
View File

@ -606,7 +606,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
#ifdef CONFIG_SAM34_UDP_REGDEBUG #ifdef CONFIG_SAM34_UDP_REGDEBUG
static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite) static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{ {
llinfo("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval); _llinfo("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
} }
#endif #endif
@ -657,7 +657,7 @@ static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{ {
/* No.. More than one. */ /* No.. More than one. */
llinfo("[repeats %d more times]\n", count); _llinfo("[repeats %d more times]\n", count);
} }
} }
@ -737,15 +737,15 @@ static void sam_dumpep(struct sam_usbdev_s *priv, uint8_t epno)
{ {
/* Global Registers */ /* Global Registers */
llinfo("Global Registers:\n"); _llinfo("Global Registers:\n");
llinfo(" FRMNUM: %08x\n", sam_getreg(SAM_UDP_FRMNUM)); _llinfo(" FRMNUM: %08x\n", sam_getreg(SAM_UDP_FRMNUM));
llinfo("GLBSTAT: %08x\n", sam_getreg(SAM_UDP_GLBSTAT)); _llinfo("GLBSTAT: %08x\n", sam_getreg(SAM_UDP_GLBSTAT));
llinfo(" FADDR: %08x\n", sam_getreg(SAM_UDP_FADDR)); _llinfo(" FADDR: %08x\n", sam_getreg(SAM_UDP_FADDR));
llinfo(" IMR: %08x\n", sam_getreg(SAM_UDP_IMR)); _llinfo(" IMR: %08x\n", sam_getreg(SAM_UDP_IMR));
llinfo(" ISR: %08x\n", sam_getreg(SAM_UDP_ISR)); _llinfo(" ISR: %08x\n", sam_getreg(SAM_UDP_ISR));
llinfo(" RSTEP: %08x\n", sam_getreg(SAM_UDP_RSTEP)); _llinfo(" RSTEP: %08x\n", sam_getreg(SAM_UDP_RSTEP));
llinfo(" TXVC: %08x\n", sam_getreg(SAM_UDP_TXVC)); _llinfo(" TXVC: %08x\n", sam_getreg(SAM_UDP_TXVC));
llinfo(" CSR[%d]: %08x\n", epno, sam_getreg(SAM_UDPEP_CSR(epno))); _llinfo(" CSR[%d]: %08x\n", epno, sam_getreg(SAM_UDPEP_CSR(epno)));
} }
#endif #endif

8
arch/arm/src/sam34/sam_wdt.c
View File

@ -183,7 +183,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return val; return val;
@ -200,7 +200,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -212,7 +212,7 @@ static uint32_t sam34_getreg(uint32_t addr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%08x\n", addr, val); _llerr("%08x->%08x\n", addr, val);
return val; return val;
} }
#endif #endif
@ -230,7 +230,7 @@ static void sam34_putreg(uint32_t val, uint32_t addr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", addr, val); _llerr("%08x<-%08x\n", addr, val);
/* Write the value */ /* Write the value */

6
arch/arm/src/sama5/sam_adc.c
View File

@ -544,7 +544,7 @@ static bool sam_adc_checkreg(struct sam_adc_s *priv, bool wr,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -2187,7 +2187,7 @@ uint32_t sam_adc_getreg(struct sam_adc_s *priv, uintptr_t address)
if (sam_adc_checkreg(priv, false, regval, address)) if (sam_adc_checkreg(priv, false, regval, address))
{ {
llerr("%08x->%08x\n", address, regval); _llerr("%08x->%08x\n", address, regval);
} }
return regval; return regval;
@ -2207,7 +2207,7 @@ void sam_adc_putreg(struct sam_adc_s *priv, uintptr_t address, uint32_t regval)
{ {
if (sam_adc_checkreg(priv, true, regval, address)) if (sam_adc_checkreg(priv, true, regval, address))
{ {
llerr("%08x<-%08x\n", address, regval); _llerr("%08x<-%08x\n", address, regval);
} }
putreg32(regval, address); putreg32(regval, address);

24
arch/arm/src/sama5/sam_allocateheap.c
View File

@ -312,9 +312,9 @@ void up_addregion(void)
} }
else else
{ {
llerr("ERROR: SDRAM memory not added to heap. CONFIG_MM_NREGIONS=%d\n", _llerr("ERROR: SDRAM memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS); CONFIG_MM_REGIONS);
llerr(" Increase the size of CONFIG_MM_NREGIONS\n"); _llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
} }
#endif #endif
@ -331,9 +331,9 @@ void up_addregion(void)
} }
else else
{ {
llerr("ERROR: CS0 memory not added to heap. CONFIG_MM_NREGIONS=%d\n", _llerr("ERROR: CS0 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS); CONFIG_MM_REGIONS);
llerr(" Increase the size of CONFIG_MM_NREGIONS\n"); _llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
} }
#endif #endif
@ -350,9 +350,9 @@ void up_addregion(void)
} }
else else
{ {
llerr("ERROR: CS1 memory not added to heap. CONFIG_MM_NREGIONS=%d\n", _llerr("ERROR: CS1 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS); CONFIG_MM_REGIONS);
llerr(" Increase the size of CONFIG_MM_NREGIONS\n"); _llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
} }
#endif #endif
@ -369,9 +369,9 @@ void up_addregion(void)
} }
else else
{ {
llerr("ERROR: CS2 memory not added to heap. CONFIG_MM_NREGIONS=%d\n", _llerr("ERROR: CS2 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS); CONFIG_MM_REGIONS);
llerr(" Increase the size of CONFIG_MM_NREGIONS\n"); _llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
} }
#endif #endif
@ -388,9 +388,9 @@ void up_addregion(void)
} }
else else
{ {
llerr("ERROR: CS3 memory not added to heap. CONFIG_MM_NREGIONS=%d\n", _llerr("ERROR: CS3 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS); CONFIG_MM_REGIONS);
llerr(" Increase the size of CONFIG_MM_NREGIONS\n"); _llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
} }
#endif #endif
@ -398,9 +398,9 @@ void up_addregion(void)
if (nregions > 0) if (nregions > 0)
{ {
llerr("ERROR: Not all regions added to heap: %d added, but CONFIG_MM_NREGIONS=%d\n", _llerr("ERROR: Not all regions added to heap: %d added, but CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS - nregions, CONFIG_MM_REGIONS); CONFIG_MM_REGIONS - nregions, CONFIG_MM_REGIONS);
llerr(" Decrease the size of CONFIG_MM_NREGIONS\n"); _llerr(" Decrease the size of CONFIG_MM_NREGIONS\n");
} }
} }
#endif #endif

20
arch/arm/src/sama5/sam_can.c
View File

@ -371,7 +371,7 @@ static uint32_t can_getreg(FAR struct sam_can_s *priv, int offset)
{ {
if (priv->count == 4) if (priv->count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return regval; return regval;
@ -388,7 +388,7 @@ static uint32_t can_getreg(FAR struct sam_can_s *priv, int offset)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", priv->count - 3); _llerr("[repeats %d more times]\n", priv->count - 3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -400,7 +400,7 @@ static uint32_t can_getreg(FAR struct sam_can_s *priv, int offset)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
return regval; return regval;
} }
@ -437,7 +437,7 @@ static void can_putreg(FAR struct sam_can_s *priv, int offset, uint32_t regval)
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
/* Write the value */ /* Write the value */
@ -483,17 +483,17 @@ static void can_dumpctrlregs(FAR struct sam_can_s *priv, FAR const char *msg)
/* CAN control and status registers */ /* CAN control and status registers */
llerr(" MR: %08x IMR: %08x SR: %08x\n", _llerr(" MR: %08x IMR: %08x SR: %08x\n",
getreg32(config->base + SAM_CAN_MR_OFFSET), getreg32(config->base + SAM_CAN_MR_OFFSET),
getreg32(config->base + SAM_CAN_IMR_OFFSET), getreg32(config->base + SAM_CAN_IMR_OFFSET),
getreg32(config->base + SAM_CAN_SR_OFFSET)); getreg32(config->base + SAM_CAN_SR_OFFSET));
llerr(" BR: %08x TIM: %08x TIMESTP: %08x\n", _llerr(" BR: %08x TIM: %08x TIMESTP: %08x\n",
getreg32(config->base + SAM_CAN_BR_OFFSET), getreg32(config->base + SAM_CAN_BR_OFFSET),
getreg32(config->base + SAM_CAN_TIM_OFFSET), getreg32(config->base + SAM_CAN_TIM_OFFSET),
getreg32(config->base + SAM_CAN_TIMESTP_OFFSET)); getreg32(config->base + SAM_CAN_TIMESTP_OFFSET));
llerr(" ECR: %08x WPMR: %08x WPSR: %08x\n", _llerr(" ECR: %08x WPMR: %08x WPSR: %08x\n",
getreg32(config->base + SAM_CAN_ECR_OFFSET), getreg32(config->base + SAM_CAN_ECR_OFFSET),
getreg32(config->base + SAM_CAN_TCR_OFFSET), getreg32(config->base + SAM_CAN_TCR_OFFSET),
getreg32(config->base + SAM_CAN_ACR_OFFSET)); getreg32(config->base + SAM_CAN_ACR_OFFSET));
@ -533,17 +533,17 @@ static void can_dumpmbregs(FAR struct sam_can_s *priv, FAR const char *msg)
for (i = 0; i < SAM_CAN_NMAILBOXES; i++) for (i = 0; i < SAM_CAN_NMAILBOXES; i++)
{ {
mbbase = config->base + SAM_CAN_MBn_OFFSET(i); mbbase = config->base + SAM_CAN_MBn_OFFSET(i);
llerr(" MB%d:\n", i); _llerr(" MB%d:\n", i);
/* CAN mailbox registers */ /* CAN mailbox registers */
llerr(" MMR: %08x MAM: %08x MID: %08x MFID: %08x\n", _llerr(" MMR: %08x MAM: %08x MID: %08x MFID: %08x\n",
getreg32(mbbase + SAM_CAN_MMR_OFFSET), getreg32(mbbase + SAM_CAN_MMR_OFFSET),
getreg32(mbbase + SAM_CAN_MAM_OFFSET), getreg32(mbbase + SAM_CAN_MAM_OFFSET),
getreg32(mbbase + SAM_CAN_MID_OFFSET), getreg32(mbbase + SAM_CAN_MID_OFFSET),
getreg32(mbbase + SAM_CAN_MFID_OFFSET)); getreg32(mbbase + SAM_CAN_MFID_OFFSET));
llerr(" MSR: %08x MDL: %08x MDH: %08x\n", _llerr(" MSR: %08x MDL: %08x MDH: %08x\n",
getreg32(mbbase + SAM_CAN_MSR_OFFSET), getreg32(mbbase + SAM_CAN_MSR_OFFSET),
getreg32(mbbase + SAM_CAN_MDL_OFFSET), getreg32(mbbase + SAM_CAN_MDL_OFFSET),
getreg32(mbbase + SAM_CAN_MDH_OFFSET)); getreg32(mbbase + SAM_CAN_MDH_OFFSET));

4
arch/arm/src/sama5/sam_ehci.c
View File

@ -628,7 +628,7 @@ static uint32_t sam_swap32(uint32_t value)
static void sam_printreg(volatile uint32_t *regaddr, uint32_t regval, static void sam_printreg(volatile uint32_t *regaddr, uint32_t regval,
bool iswrite) bool iswrite)
{ {
llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval); _llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
} }
#endif #endif
@ -679,7 +679,7 @@ static void sam_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool iswri
{ {
/* No.. More than one. */ /* No.. More than one. */
llerr("[repeats %d more times]\n", count); _llerr("[repeats %d more times]\n", count);
} }
} }

6
arch/arm/src/sama5/sam_emaca.c
View File

@ -461,7 +461,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -493,7 +493,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t address)
if (sam_checkreg(priv, false, regval, address)) if (sam_checkreg(priv, false, regval, address))
{ {
llerr("%08x->%08x\n", address, regval); _llerr("%08x->%08x\n", address, regval);
} }
return regval; return regval;
@ -514,7 +514,7 @@ static void sam_putreg(struct sam_emac_s *priv, uintptr_t address,
{ {
if (sam_checkreg(priv, true, regval, address)) if (sam_checkreg(priv, true, regval, address))
{ {
llerr("%08x<-%08x\n", address, regval); _llerr("%08x<-%08x\n", address, regval);
} }
putreg32(regval, address); putreg32(regval, address);

6
arch/arm/src/sama5/sam_emacb.c
View File

@ -820,7 +820,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -853,7 +853,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uint16_t offset)
#ifdef CONFIG_SAMA5_EMACB_REGDEBUG #ifdef CONFIG_SAMA5_EMACB_REGDEBUG
if (sam_checkreg(priv, false, regval, regaddr)) if (sam_checkreg(priv, false, regval, regaddr))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -877,7 +877,7 @@ static void sam_putreg(struct sam_emac_s *priv, uint16_t offset,
#ifdef CONFIG_SAMA5_EMACB_REGDEBUG #ifdef CONFIG_SAMA5_EMACB_REGDEBUG
if (sam_checkreg(priv, true, regval, regaddr)) if (sam_checkreg(priv, true, regval, regaddr))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif

6
arch/arm/src/sama5/sam_gmac.c
View File

@ -392,7 +392,7 @@ static bool sam_checkreg(struct sam_gmac_s *priv, bool wr, uint32_t regval,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -424,7 +424,7 @@ static uint32_t sam_getreg(struct sam_gmac_s *priv, uintptr_t address)
if (sam_checkreg(priv, false, regval, address)) if (sam_checkreg(priv, false, regval, address))
{ {
llerr("%08x->%08x\n", address, regval); _llerr("%08x->%08x\n", address, regval);
} }
return regval; return regval;
@ -445,7 +445,7 @@ static void sam_putreg(struct sam_gmac_s *priv, uintptr_t address,
{ {
if (sam_checkreg(priv, true, regval, address)) if (sam_checkreg(priv, true, regval, address))
{ {
llerr("%08x<-%08x\n", address, regval); _llerr("%08x<-%08x\n", address, regval);
} }
putreg32(regval, address); putreg32(regval, address);

6
arch/arm/src/sama5/sam_hsmci.c
View File

@ -725,7 +725,7 @@ static bool sam_checkreg(struct sam_dev_s *priv, bool wr, uint32_t value,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -758,7 +758,7 @@ static inline uint32_t sam_getreg(struct sam_dev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMA5_HSMCI_REGDEBUG #ifdef CONFIG_SAMA5_HSMCI_REGDEBUG
if (sam_checkreg(priv, false, value, address)) if (sam_checkreg(priv, false, value, address))
{ {
llerr("%08x->%08x\n", address, value); _llerr("%08x->%08x\n", address, value);
} }
#endif #endif
@ -781,7 +781,7 @@ static inline void sam_putreg(struct sam_dev_s *priv, uint32_t value,
#ifdef CONFIG_SAMA5_HSMCI_REGDEBUG #ifdef CONFIG_SAMA5_HSMCI_REGDEBUG
if (sam_checkreg(priv, true, value, address)) if (sam_checkreg(priv, true, value, address))
{ {
llerr("%08x<-%08x\n", address, value); _llerr("%08x<-%08x\n", address, value);
} }
#endif #endif

6
arch/arm/src/sama5/sam_lcd.c
View File

@ -1021,7 +1021,7 @@ static bool sam_checkreg(bool wr, uint32_t regval, uintptr_t address)
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", g_lcdc.ntimes); _llerr("...[Repeats %d times]...\n", g_lcdc.ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -1053,7 +1053,7 @@ static uint32_t sam_getreg(uintptr_t address)
if (sam_checkreg(false, regval, address)) if (sam_checkreg(false, regval, address))
{ {
llerr("%08x->%08x\n", address, regval); _llerr("%08x->%08x\n", address, regval);
} }
return regval; return regval;
@ -1073,7 +1073,7 @@ static void sam_putreg(uintptr_t address, uint32_t regval)
{ {
if (sam_checkreg(true, regval, address)) if (sam_checkreg(true, regval, address))
{ {
llerr("%08x<-%08x\n", address, regval); _llerr("%08x<-%08x\n", address, regval);
} }
putreg32(regval, address); putreg32(regval, address);

6
arch/arm/src/sama5/sam_memories.c
View File

@ -766,7 +766,7 @@ uintptr_t sam_physregaddr(uintptr_t virtregaddr)
* address * address
*/ */
err("Bad virtual address: %08lx\n", virtregaddr); _err("Bad virtual address: %08lx\n", virtregaddr);
DEBUGPANIC(); DEBUGPANIC();
return virtregaddr; return virtregaddr;
} }
@ -925,7 +925,7 @@ uintptr_t sam_physramaddr(uintptr_t virtramaddr)
if (virtramaddr != 0) if (virtramaddr != 0)
{ {
err("Bad virtual address: %08lx\n", virtramaddr); _err("Bad virtual address: %08lx\n", virtramaddr);
DEBUGPANIC(); DEBUGPANIC();
} }
@ -1058,7 +1058,7 @@ uintptr_t sam_virtramaddr(uintptr_t physramaddr)
if (physramaddr != 0) if (physramaddr != 0)
{ {
err("Bad physical address: %08lx\n|", physramaddr); _err("Bad physical address: %08lx\n|", physramaddr);
DEBUGPANIC(); DEBUGPANIC();
} }

4
arch/arm/src/sama5/sam_nand.c
View File

@ -1163,7 +1163,7 @@ static void nand_dma_sampleinit(struct sam_nandcs_s *priv)
#ifdef CONFIG_SAMA5_NAND_DMADEBUG #ifdef CONFIG_SAMA5_NAND_DMADEBUG
static void nand_dma_sampledone(struct sam_nandcs_s *priv, int result) static void nand_dma_sampledone(struct sam_nandcs_s *priv, int result)
{ {
llerr("result: %d\n", result); _llerr("result: %d\n", result);
/* Sample the final registers */ /* Sample the final registers */
@ -3088,7 +3088,7 @@ bool nand_checkreg(bool wr, uintptr_t regaddr, uint32_t regval)
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", g_nand.ntimes); _llerr("...[Repeats %d times]...\n", g_nand.ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */

4
arch/arm/src/sama5/sam_nand.h
View File

@ -518,7 +518,7 @@ static inline uint32_t nand_getreg(uintptr_t regaddr)
#ifdef CONFIG_SAMA5_NAND_REGDEBUG #ifdef CONFIG_SAMA5_NAND_REGDEBUG
if (nand_checkreg(false, regaddr, regval)) if (nand_checkreg(false, regaddr, regval))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -538,7 +538,7 @@ static inline void nand_putreg(uintptr_t regaddr, uint32_t regval)
#ifdef CONFIG_SAMA5_NAND_REGDEBUG #ifdef CONFIG_SAMA5_NAND_REGDEBUG
if (nand_checkreg(true, regaddr, regval)) if (nand_checkreg(true, regaddr, regval))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif

4
arch/arm/src/sama5/sam_ohci.c
View File

@ -524,7 +524,7 @@ static uint8_t g_bufalloc[SAM_BUFALLOC]
#ifdef CONFIG_SAMA5_OHCI_REGDEBUG #ifdef CONFIG_SAMA5_OHCI_REGDEBUG
static void sam_printreg(uint32_t addr, uint32_t val, bool iswrite) static void sam_printreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); _llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
} }
#endif #endif
@ -574,7 +574,7 @@ static void sam_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{ {
/* No.. More than one. */ /* No.. More than one. */
llerr("[repeats %d more times]\n", count); _llerr("[repeats %d more times]\n", count);
} }
} }

2
arch/arm/src/sama5/sam_pck.c
View File

@ -151,7 +151,7 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc,
break; break;
default: default:
err("ERROR: Unknown clock source\n"); _err("ERROR: Unknown clock source\n");
return 0; return 0;
} }

14
arch/arm/src/sama5/sam_pwm.c
View File

@ -689,7 +689,7 @@ static bool pwm_checkreg(FAR struct sam_pwm_s *pwm, bool wr, uint32_t regval,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", pwm->count); _llerr("...[Repeats %d times]...\n", pwm->count);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -733,7 +733,7 @@ static uint32_t pwm_getreg(struct sam_pwm_chan_s *chan, int offset)
#ifdef CONFIG_SAMA5_PWM_REGDEBUG #ifdef CONFIG_SAMA5_PWM_REGDEBUG
if (pwm_checkreg(&g_pwm, false, regval, regaddr)) if (pwm_checkreg(&g_pwm, false, regval, regaddr))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -750,7 +750,7 @@ static uint32_t pwm_getreg(struct sam_pwm_chan_s *chan, int offset)
#ifdef CONFIG_SAMA5_PWM_REGDEBUG #ifdef CONFIG_SAMA5_PWM_REGDEBUG
if (pwm_checkreg(pwm, false, regval, regaddr)) if (pwm_checkreg(pwm, false, regval, regaddr))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -789,7 +789,7 @@ static uint32_t pwm_chan_getreg(struct sam_pwm_chan_s *chan, int offset)
if (pwm_checkreg(chan->pwm, false, regval, regaddr)) if (pwm_checkreg(chan->pwm, false, regval, regaddr))
#endif #endif
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -820,7 +820,7 @@ static void pwm_putreg(struct sam_pwm_chan_s *chan, int offset,
#ifdef CONFIG_SAMA5_PWM_REGDEBUG #ifdef CONFIG_SAMA5_PWM_REGDEBUG
if (pwm_checkreg(&g_pwm, true, regval, regaddr)) if (pwm_checkreg(&g_pwm, true, regval, regaddr))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif
@ -833,7 +833,7 @@ static void pwm_putreg(struct sam_pwm_chan_s *chan, int offset,
#ifdef CONFIG_SAMA5_PWM_REGDEBUG #ifdef CONFIG_SAMA5_PWM_REGDEBUG
if (pwm_checkreg(pwm, true, regval, regaddr)) if (pwm_checkreg(pwm, true, regval, regaddr))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif
@ -869,7 +869,7 @@ static void pwm_chan_putreg(struct sam_pwm_chan_s *chan, int offset,
if (pwm_checkreg(chan->pwm, true, regval, regaddr)) if (pwm_checkreg(chan->pwm, true, regval, regaddr))
#endif #endif
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif

6
arch/arm/src/sama5/sam_spi.c
View File

@ -409,7 +409,7 @@ static bool spi_checkreg(struct sam_spidev_s *spi, bool wr, uint32_t value,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", spi->ntimes); _llerr("...[Repeats %d times]...\n", spi->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -443,7 +443,7 @@ static inline uint32_t spi_getreg(struct sam_spidev_s *spi,
#ifdef CONFIG_SAMA5_SPI_REGDEBUG #ifdef CONFIG_SAMA5_SPI_REGDEBUG
if (spi_checkreg(spi, false, value, address)) if (spi_checkreg(spi, false, value, address))
{ {
llerr("%08x->%08x\n", address, value); _llerr("%08x->%08x\n", address, value);
} }
#endif #endif
@ -466,7 +466,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
#ifdef CONFIG_SAMA5_SPI_REGDEBUG #ifdef CONFIG_SAMA5_SPI_REGDEBUG
if (spi_checkreg(spi, true, value, address)) if (spi_checkreg(spi, true, value, address))
{ {
llerr("%08x<-%08x\n", address, value); _llerr("%08x<-%08x\n", address, value);
} }
#endif #endif

10
arch/arm/src/sama5/sam_ssc.c
View File

@ -703,7 +703,7 @@ static bool ssc_checkreg(struct sam_ssc_s *priv, bool wr, uint32_t regval,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->count); _llerr("...[Repeats %d times]...\n", priv->count);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -737,7 +737,7 @@ static inline uint32_t ssc_getreg(struct sam_ssc_s *priv,
#ifdef CONFIG_SAMA5_SSC_REGDEBUG #ifdef CONFIG_SAMA5_SSC_REGDEBUG
if (ssc_checkreg(priv, false, regval, regaddr)) if (ssc_checkreg(priv, false, regval, regaddr))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -760,7 +760,7 @@ static inline void ssc_putreg(struct sam_ssc_s *priv, unsigned int offset,
#ifdef CONFIG_SAMA5_SSC_REGDEBUG #ifdef CONFIG_SAMA5_SSC_REGDEBUG
if (ssc_checkreg(priv, true, regval, regaddr)) if (ssc_checkreg(priv, true, regval, regaddr))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif
@ -1090,7 +1090,7 @@ static void ssc_dma_sampleinit(struct sam_ssc_s *priv,
#if defined(CONFIG_SAMA5_SSC_DMADEBUG) && defined(SSC_HAVE_RX) #if defined(CONFIG_SAMA5_SSC_DMADEBUG) && defined(SSC_HAVE_RX)
static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result) static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
{ {
llerr("result: %d\n", result); _llerr("result: %d\n", result);
/* Sample the final registers */ /* Sample the final registers */
@ -1155,7 +1155,7 @@ static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
#if defined(CONFIG_SAMA5_SSC_DMADEBUG) && defined(SSC_HAVE_TX) #if defined(CONFIG_SAMA5_SSC_DMADEBUG) && defined(SSC_HAVE_TX)
static void ssc_txdma_sampledone(struct sam_ssc_s *priv, int result) static void ssc_txdma_sampledone(struct sam_ssc_s *priv, int result)
{ {
llerr("result: %d\n", result); _llerr("result: %d\n", result);
/* Sample the final registers */ /* Sample the final registers */

22
arch/arm/src/sama5/sam_tc.c
View File

@ -501,20 +501,20 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg)
uintptr_t base; uintptr_t base;
base = tc->base; base = tc->base;
llerr("TC%d [%08x]: %s\n", tc->tc, (int)base, msg); _llerr("TC%d [%08x]: %s\n", tc->tc, (int)base, msg);
llerr(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n", _llerr(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET), getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET)); getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
base = chan->base; base = chan->base;
llerr("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg); _llerr("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg);
llerr(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n", _llerr(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n",
getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET), getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET)); getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
llerr(" RA: %08x RB: %08x RC: %08x SR: %08x\n", _llerr(" RA: %08x RB: %08x RC: %08x SR: %08x\n",
getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET), getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_SR_OFFSET)); getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_SR_OFFSET));
llerr(" IMR: %08x\n", _llerr(" IMR: %08x\n",
getreg32(base+SAM_TC_IMR_OFFSET)); getreg32(base+SAM_TC_IMR_OFFSET));
} }
#endif #endif
@ -558,7 +558,7 @@ static bool sam_checkreg(struct sam_tc_s *tc, bool wr, uint32_t regaddr,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", tc->ntimes); _llerr("...[Repeats %d times]...\n", tc->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -593,7 +593,7 @@ static inline uint32_t sam_tc_getreg(struct sam_chan_s *chan,
#ifdef CONFIG_SAMA5_TC_REGDEBUG #ifdef CONFIG_SAMA5_TC_REGDEBUG
if (sam_checkreg(tc, false, regaddr, regval)) if (sam_checkreg(tc, false, regaddr, regval))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -617,7 +617,7 @@ static inline void sam_tc_putreg(struct sam_chan_s *chan, uint32_t regval,
#ifdef CONFIG_SAMA5_TC_REGDEBUG #ifdef CONFIG_SAMA5_TC_REGDEBUG
if (sam_checkreg(tc, true, regaddr, regval)) if (sam_checkreg(tc, true, regaddr, regval))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif
@ -641,7 +641,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
#ifdef CONFIG_SAMA5_TC_REGDEBUG #ifdef CONFIG_SAMA5_TC_REGDEBUG
if (sam_checkreg(chan->tc, false, regaddr, regval)) if (sam_checkreg(chan->tc, false, regaddr, regval))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -664,7 +664,7 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan, unsigned int offset,
#ifdef CONFIG_SAMA5_TC_REGDEBUG #ifdef CONFIG_SAMA5_TC_REGDEBUG
if (sam_checkreg(chan->tc, true, regaddr, regval)) if (sam_checkreg(chan->tc, true, regaddr, regval))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif

6
arch/arm/src/sama5/sam_twi.c
View File

@ -369,7 +369,7 @@ static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -401,7 +401,7 @@ static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address)
if (twi_checkreg(priv, false, value, address)) if (twi_checkreg(priv, false, value, address))
{ {
llerr("%08x->%08x\n", address, value); _llerr("%08x->%08x\n", address, value);
} }
return value; return value;
@ -422,7 +422,7 @@ static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
{ {
if (twi_checkreg(priv, true, value, address)) if (twi_checkreg(priv, true, value, address))
{ {
llerr("%08x<-%08x\n", address, value); _llerr("%08x<-%08x\n", address, value);
} }
putreg32(value, address); putreg32(value, address);

36
arch/arm/src/sama5/sam_udphs.c
View File

@ -671,7 +671,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
#ifdef CONFIG_SAMA5_UDPHS_REGDEBUG #ifdef CONFIG_SAMA5_UDPHS_REGDEBUG
static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite) static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{ {
llerr("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval); _llerr("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
} }
#endif #endif
@ -722,7 +722,7 @@ static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{ {
/* No.. More than one. */ /* No.. More than one. */
llerr("[repeats %d more times]\n", count); _llerr("[repeats %d more times]\n", count);
} }
} }
@ -802,31 +802,31 @@ static void sam_dumpep(struct sam_usbdev_s *priv, int epno)
{ {
/* Global Registers */ /* Global Registers */
llerr("Global Register:\n"); _llerr("Global Register:\n");
llerr(" CTRL: %04x\n", sam_getreg(SAM_UDPHS_CTRL)); _llerr(" CTRL: %04x\n", sam_getreg(SAM_UDPHS_CTRL));
llerr(" FNUM: %04x\n", sam_getreg(SAM_UDPHS_FNUM)); _llerr(" FNUM: %04x\n", sam_getreg(SAM_UDPHS_FNUM));
llerr(" IEN: %04x\n", sam_getreg(SAM_UDPHS_IEN)); _llerr(" IEN: %04x\n", sam_getreg(SAM_UDPHS_IEN));
llerr(" INSTA: %04x\n", sam_getreg(SAM_UDPHS_INTSTA)); _llerr(" INSTA: %04x\n", sam_getreg(SAM_UDPHS_INTSTA));
llerr(" TST: %04x\n", sam_getreg(SAM_UDPHS_TST)); _llerr(" TST: %04x\n", sam_getreg(SAM_UDPHS_TST));
/* Endpoint registers */ /* Endpoint registers */
llerr("Endpoint %d Register:\n", epno); _llerr("Endpoint %d Register:\n", epno);
llerr(" CFG: %04x\n", sam_getreg(SAM_UDPHS_EPTCFG(epno))); _llerr(" CFG: %04x\n", sam_getreg(SAM_UDPHS_EPTCFG(epno)));
llerr(" CTL: %04x\n", sam_getreg(SAM_UDPHS_EPTCTL(epno))); _llerr(" CTL: %04x\n", sam_getreg(SAM_UDPHS_EPTCTL(epno)));
llerr(" STA: %04x\n", sam_getreg(SAM_UDPHS_EPTSTA(epno))); _llerr(" STA: %04x\n", sam_getreg(SAM_UDPHS_EPTSTA(epno)));
llerr("DMA %d Register:\n", epno); _llerr("DMA %d Register:\n", epno);
if ((SAM_EPSET_DMA & SAM_EP_BIT(epno)) != 0) if ((SAM_EPSET_DMA & SAM_EP_BIT(epno)) != 0)
{ {
llerr(" NXTDSC: %04x\n", sam_getreg(SAM_UDPHS_DMANXTDSC(epno))); _llerr(" NXTDSC: %04x\n", sam_getreg(SAM_UDPHS_DMANXTDSC(epno)));
llerr(" ADDRESS: %04x\n", sam_getreg(SAM_UDPHS_DMAADDRESS(epno))); _llerr(" ADDRESS: %04x\n", sam_getreg(SAM_UDPHS_DMAADDRESS(epno)));
llerr(" CONTROL: %04x\n", sam_getreg(SAM_UDPHS_DMACONTROL(epno))); _llerr(" CONTROL: %04x\n", sam_getreg(SAM_UDPHS_DMACONTROL(epno)));
llerr(" STATUS: %04x\n", sam_getreg(SAM_UDPHS_DMASTATUS(epno))); _llerr(" STATUS: %04x\n", sam_getreg(SAM_UDPHS_DMASTATUS(epno)));
} }
else else
{ {
llerr(" None\n"); _llerr(" None\n");
} }
} }
#endif #endif

8
arch/arm/src/sama5/sam_wdt.c
View File

@ -185,7 +185,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
{ {
if (count == 4) if (count == 4)
{ {
llerr("...\n"); _llerr("...\n");
} }
return regval; return regval;
@ -202,7 +202,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
{ {
/* Yes.. then show how many times the value repeated */ /* Yes.. then show how many times the value repeated */
llerr("[repeats %d more times]\n", count-3); _llerr("[repeats %d more times]\n", count-3);
} }
/* Save the new address, value, and count */ /* Save the new address, value, and count */
@ -214,7 +214,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
/* Show the register value read */ /* Show the register value read */
llerr("%08x->%048\n", regaddr, regval); _llerr("%08x->%048\n", regaddr, regval);
return regval; return regval;
} }
#endif #endif
@ -232,7 +232,7 @@ static void sam_putreg(uint32_t regval, uintptr_t regaddr)
{ {
/* Show the register value being written */ /* Show the register value being written */
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
/* Write the value */ /* Write the value */

2
arch/arm/src/samdl/sam_idle.c
View File

@ -99,7 +99,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */ /* Perform board-specific, state-dependent logic here */
llinfo("newstate= %d oldstate=%d\n", newstate, oldstate); _llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */ /* Then force the global state change */

6
arch/arm/src/samdl/sam_irq.c
View File

@ -97,7 +97,7 @@ volatile uint32_t *g_current_regs[1];
static int sam_nmi(int irq, FAR void *context) static int sam_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -105,7 +105,7 @@ static int sam_nmi(int irq, FAR void *context)
static int sam_pendsv(int irq, FAR void *context) static int sam_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -113,7 +113,7 @@ static int sam_pendsv(int irq, FAR void *context)
static int sam_reserved(int irq, FAR void *context) static int sam_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

8
arch/arm/src/samdl/sam_port.c
View File

@ -538,16 +538,16 @@ int sam_dumpport(uint32_t pinset, const char *msg)
/* The following requires exclusive access to the PORT registers */ /* The following requires exclusive access to the PORT registers */
flags = enter_critical_section(); flags = enter_critical_section();
llerr("PORT%c pin: %d pinset: %08x base: %08x -- %s\n", _llerr("PORT%c pin: %d pinset: %08x base: %08x -- %s\n",
g_portchar[port], pin, pinset, base, msg); g_portchar[port], pin, pinset, base, msg);
llerr(" DIR: %08x OUT: %08x IN: %08x\n", _llerr(" DIR: %08x OUT: %08x IN: %08x\n",
getreg32(base + SAM_PORT_DIR_OFFSET), getreg32(base + SAM_PORT_DIR_OFFSET),
getreg32(base + SAM_PORT_OUT_OFFSET), getreg32(base + SAM_PORT_OUT_OFFSET),
getreg32(base + SAM_PORT_IN_OFFSET)); getreg32(base + SAM_PORT_IN_OFFSET));
llerr(" CTRL: %08x WRCONFIG: %08x\n", _llerr(" CTRL: %08x WRCONFIG: %08x\n",
getreg32(base + SAM_PORT_CTRL_OFFSET), getreg32(base + SAM_PORT_CTRL_OFFSET),
getreg32(base + SAM_PORT_WRCONFIG_OFFSET)); getreg32(base + SAM_PORT_WRCONFIG_OFFSET));
llerr(" PMUX[%08x]: %02x PINCFG[%08x]: %02x\n", _llerr(" PMUX[%08x]: %02x PINCFG[%08x]: %02x\n",
base + SAM_PORT_PMUX_OFFSET(pin), base + SAM_PORT_PMUX_OFFSET(pin),
getreg8(base + SAM_PORT_PMUX_OFFSET(pin)), getreg8(base + SAM_PORT_PMUX_OFFSET(pin)),
base + SAM_PORT_PINCFG_OFFSET(pin), base + SAM_PORT_PINCFG_OFFSET(pin),

14
arch/arm/src/samdl/sam_spi.c
View File

@ -540,7 +540,7 @@ static bool spi_checkreg(struct sam_spidev_s *priv, bool wr, uint32_t regval,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -573,7 +573,7 @@ static uint8_t spi_getreg8(struct sam_spidev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMDL_SPI_REGDEBUG #ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, false, (uint32_t)regval, regaddr)) if (spi_checkreg(priv, false, (uint32_t)regval, regaddr))
{ {
llerr("%08x->%02x\n", regaddr, regval); _llerr("%08x->%02x\n", regaddr, regval);
} }
#endif #endif
@ -596,7 +596,7 @@ static void spi_putreg8(struct sam_spidev_s *priv, uint8_t regval,
#ifdef CONFIG_SAMDL_SPI_REGDEBUG #ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, true, (uint32_t)regval, regaddr)) if (spi_checkreg(priv, true, (uint32_t)regval, regaddr))
{ {
llerr("%08x<-%02x\n", regaddr, regval); _llerr("%08x<-%02x\n", regaddr, regval);
} }
#endif #endif
@ -619,7 +619,7 @@ static uint16_t spi_getreg16(struct sam_spidev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMDL_SPI_REGDEBUG #ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, false, (uint32_t)regval, regaddr)) if (spi_checkreg(priv, false, (uint32_t)regval, regaddr))
{ {
llerr("%08x->%04x\n", regaddr, regval); _llerr("%08x->%04x\n", regaddr, regval);
} }
#endif #endif
@ -642,7 +642,7 @@ static void spi_putreg16(struct sam_spidev_s *priv, uint16_t regval,
#ifdef CONFIG_SAMDL_SPI_REGDEBUG #ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, true, (uint32_t)regval, regaddr)) if (spi_checkreg(priv, true, (uint32_t)regval, regaddr))
{ {
llerr("%08x<-%04x\n", regaddr, regval); _llerr("%08x<-%04x\n", regaddr, regval);
} }
#endif #endif
@ -665,7 +665,7 @@ static uint32_t spi_getreg32(struct sam_spidev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMDL_SPI_REGDEBUG #ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, false, regval, regaddr)) if (spi_checkreg(priv, false, regval, regaddr))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -688,7 +688,7 @@ static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
#ifdef CONFIG_SAMDL_SPI_REGDEBUG #ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, true, regval, regaddr)) if (spi_checkreg(priv, true, regval, regaddr))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif

6
arch/arm/src/samv7/sam_emac.c
View File

@ -966,7 +966,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -999,7 +999,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uint16_t offset)
#ifdef CONFIG_SAMV7_EMAC_REGDEBUG #ifdef CONFIG_SAMV7_EMAC_REGDEBUG
if (sam_checkreg(priv, false, regval, regaddr)) if (sam_checkreg(priv, false, regval, regaddr))
{ {
llerr("%08x->%08x\n", regaddr, regval); _llerr("%08x->%08x\n", regaddr, regval);
} }
#endif #endif
@ -1023,7 +1023,7 @@ static void sam_putreg(struct sam_emac_s *priv, uint16_t offset,
#ifdef CONFIG_SAMV7_EMAC_REGDEBUG #ifdef CONFIG_SAMV7_EMAC_REGDEBUG
if (sam_checkreg(priv, true, regval, regaddr)) if (sam_checkreg(priv, true, regval, regaddr))
{ {
llerr("%08x<-%08x\n", regaddr, regval); _llerr("%08x<-%08x\n", regaddr, regval);
} }
#endif #endif

6
arch/arm/src/samv7/sam_hsmci.c
View File

@ -653,7 +653,7 @@ static bool sam_checkreg(struct sam_dev_s *priv, bool wr, uint32_t value,
{ {
/* Yes... show how many times we did it */ /* Yes... show how many times we did it */
llerr("...[Repeats %d times]...\n", priv->ntimes); _llerr("...[Repeats %d times]...\n", priv->ntimes);
} }
/* Save information about the new access */ /* Save information about the new access */
@ -686,7 +686,7 @@ static inline uint32_t sam_getreg(struct sam_dev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMV7_HSMCI_REGDEBUG #ifdef CONFIG_SAMV7_HSMCI_REGDEBUG
if (sam_checkreg(priv, false, value, address)) if (sam_checkreg(priv, false, value, address))
{ {
llerr("%08x->%08x\n", address, value); _llerr("%08x->%08x\n", address, value);
} }
#endif #endif
@ -709,7 +709,7 @@ static inline void sam_putreg(struct sam_dev_s *priv, uint32_t value,
#ifdef CONFIG_SAMV7_HSMCI_REGDEBUG #ifdef CONFIG_SAMV7_HSMCI_REGDEBUG
if (sam_checkreg(priv, true, value, address)) if (sam_checkreg(priv, true, value, address))
{ {
llerr("%08x<-%08x\n", address, value); _llerr("%08x<-%08x\n", address, value);
} }
#endif #endif

12
arch/arm/src/samv7/sam_irq.c
View File

@ -177,7 +177,7 @@ static void sam_dumpnvic(const char *msg, int irq)
static int sam_nmi(int irq, FAR void *context) static int sam_nmi(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! NMI received\n"); _err("PANIC!!! NMI received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -185,7 +185,7 @@ static int sam_nmi(int irq, FAR void *context)
static int sam_busfault(int irq, FAR void *context) static int sam_busfault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS)); _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC(); PANIC();
return 0; return 0;
} }
@ -193,7 +193,7 @@ static int sam_busfault(int irq, FAR void *context)
static int sam_usagefault(int irq, FAR void *context) static int sam_usagefault(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS)); _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC(); PANIC();
return 0; return 0;
} }
@ -201,7 +201,7 @@ static int sam_usagefault(int irq, FAR void *context)
static int sam_pendsv(int irq, FAR void *context) static int sam_pendsv(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! PendSV received\n"); _err("PANIC!!! PendSV received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -209,7 +209,7 @@ static int sam_pendsv(int irq, FAR void *context)
static int sam_errmonitor(int irq, FAR void *context) static int sam_errmonitor(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Debug Monitor received\n"); _err("PANIC!!! Debug Monitor received\n");
PANIC(); PANIC();
return 0; return 0;
} }
@ -217,7 +217,7 @@ static int sam_errmonitor(int irq, FAR void *context)
static int sam_reserved(int irq, FAR void *context) static int sam_reserved(int irq, FAR void *context)
{ {
(void)up_irq_save(); (void)up_irq_save();
err("PANIC!!! Reserved interrupt\n"); _err("PANIC!!! Reserved interrupt\n");
PANIC(); PANIC();
return 0; return 0;
} }

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