Update M25P driver per feedback from Mohammed Elwakeel
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4207 42af7a65-404d-4744-a932-0658087f49c3
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@ -2283,5 +2283,8 @@
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by Laurent Latil. Theses changes also include support for the STM32F103VCT6.
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* arch/configs/stm3240g-eval/src/up_pwm.c: Add hooks needed to use the new
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apps/examples/pwm test of the STM32 PWM driver.
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* drivers/mtd/mp25x.c: Add ability to use different SPI modes and different
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manufacturers codes. Fix a error in the wait for not busy (submitted by
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Mohammad Elwakeel.
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@ -724,7 +724,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
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cr2 = pwm_getreg(priv, STM32_GTIM_CR2_OFFSET);
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ccmr1 = pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET);
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ccmr2 = pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET);
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ccmr2 = pwm_getreg(priv, STM32_GTIM_CCMR2_OFFSET);
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/* Reset the Output Compare Mode Bits and set the select output compare mode */
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@ -176,6 +176,11 @@ CONFIG_UART_BITS=8
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CONFIG_UART_PARITY=0
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CONFIG_UART_2STOP=0
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#
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# MP25x Configuration
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#
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CONFIG_MP25P_SPIMODE=3
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#
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# General build options
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#
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@ -207,9 +207,10 @@ events as follows:
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PWM
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===
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The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
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a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this
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purpose:
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The STM3240G-Eval has no real on-board PWM devices, but the board can be
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configured to output a pulse train using TIM4 CH2. This pin is used by
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FSMC is but is also connected to the Motor Control Connector (CN5) just
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for this purpose:
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PD13 FSMC_A18 / MC_TIM4_CH2 pin 33 (EnB)
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@ -217,7 +218,7 @@ FSMC must be disabled in this case! PD13 is available at:
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Daughterboard Extension Connector, CN3, pin 32 - available
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TFT LCD Connector, CN19, pin 17 -- not available without removing the LCD.
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Motor Control Connector CN15, pin 33 -- no available unless to connect SB14.
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Motor Control Connector CN15, pin 33 -- not available unless you bridge SB14.
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STM3240G-EVAL-specific Configuration Options
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============================================
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@ -285,8 +285,9 @@
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/* PWM
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*
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* The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
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* a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this
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* The STM3240G-Eval has no real on-board PWM devices, but the board can be
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* configured to output a pulse train using TIM4 CH2. This pin is used by FSMC is
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* but is also connected to the Motor Control Connector (CN5) just for this
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* purpose:
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*
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* PD13 FSMC_A18 / MC_TIM4_CH2 pin 33 (EnB)
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@ -295,7 +296,7 @@
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*
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* Daughterboard Extension Connector, CN3, pin 32 - available
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* TFT LCD Connector, CN19, pin 17 -- not available without removing the LCD.
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* Motor Control Connector CN15, pin 33 -- no available unless to connect SB14.
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* Motor Control Connector CN15, pin 33 -- not available unless you bridge SB14.
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*/
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#define GPIO_TIM4_CH2 GPIO_TIM4_CH2_2
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@ -86,8 +86,9 @@
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/* PWM
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*
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* The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
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* a pulse train using TIM4 CH2. This pin is used by FSMC is connect to CN5 just for this
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* The STM3240G-Eval has no real on-board PWM devices, but the board can be
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* configured to output a pulse train using TIM4 CH2. This pin is used by FSMC is
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* but is also connected to the Motor Control Connector (CN5) just for this
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* purpose:
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*
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* PD13 FSMC_A18 / MC_TIM4_CH2 pin 33 (EnB)
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@ -96,7 +97,7 @@
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*
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* Daughterboard Extension Connector, CN3, pin 32 - available
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* TFT LCD Connector, CN19, pin 17 -- not available without removing the LCD.
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* Motor Control Connector CN15, pin 33 -- no available unless to connect SB14.
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* Motor Control Connector CN15, pin 33 -- not available unless you bridge SB14.
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*/
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#define STM3240G_EVAL_PWMTIMER 4
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@ -55,10 +55,28 @@
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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/* Per the data sheet, MP25P10 parts can be driven with either SPI mode 0 (CPOL=0 and
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* CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices can
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* operated in mode 0 or 1. So you may need to specify CONFIG_MP25P_SPIMODE to
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* select the best mode for your device. If CONFIG_MP25P_SPIMODE is not defined,
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* mode 0 will be used.
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*/
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#ifndef CONFIG_MP25P_SPIMODE
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# define CONFIG_MP25P_SPIMODE SPIDEV_MODE0
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#endif
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/* Various manufacturers may have produced the parts */
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#ifndef CONFIG_MP25P_MANUFACTURER
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# define CONFIG_MP25P_MANUFACTURER 0x20
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#endif
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/* M25P Registers *******************************************************************/
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/* Indentification register values */
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#define M25P_MANUFACTURER 0x20
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#define M25P_MANUFACTURER CONFIG_MP25P_MANUFACTURER
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#define M25P_MEMORY_TYPE 0x20
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#define M25P_M25P1_CAPACITY 0x11 /* 1 M-bit */
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#define M25P_M25P64_CAPACITY 0x17 /* 64 M-bit */
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@ -204,7 +222,7 @@ static void m25p_lock(FAR struct spi_dev_s *dev)
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* state.
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*/
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SPI_SETMODE(dev, SPIDEV_MODE3);
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SPI_SETMODE(dev, CONFIG_MP25P_SPIMODE);
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SPI_SETBITS(dev, 8);
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(void)SPI_SETFREQUENCY(dev, 20000000);
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}
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@ -299,27 +317,35 @@ static void m25p_waitwritecomplete(struct m25p_dev_s *priv)
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{
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uint8_t status;
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
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/* Send "Read Status Register (RDSR)" command */
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(void)SPI_SEND(priv->dev, M25P_RDSR);
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/* Loop as long as the memory is busy with a write cycle */
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do
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{
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
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/* Send "Read Status Register (RDSR)" command */
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(void)SPI_SEND(priv->dev, M25P_RDSR);
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/* Send a dummy byte to generate the clock needed to shift out the status */
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status = SPI_SEND(priv->dev, M25P_DUMMY);
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
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if ((status & M25P_SR_WIP) != 0)
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{
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m25p_unlock(priv->dev);
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usleep(1000);
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m25p_lock(priv->dev);
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}
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}
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while ((status & M25P_SR_WIP) != 0);
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
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fvdbg("Complete\n");
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}
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