diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs
index bd4eed0648..a484a8fe4e 100644
--- a/arch/arm/src/kinetis/Make.defs
+++ b/arch/arm/src/kinetis/Make.defs
@@ -162,6 +162,10 @@ ifeq ($(CONFIG_I2C),y)
 CHIP_CSRCS += kinetis_i2c.c
 endif
 
+ifeq ($(CONFIG_KINETIS_LPUART),y)
+CHIP_CSRCS += kinetis_lpserial.c
+endif
+
 ifeq ($(CONFIG_RTC),y)
 CHIP_CSRCS += kinetis_rtc.c
 ifeq ($(CONFIG_RTC_DRIVER),y)
diff --git a/configs/freedom-k66f/include/board.h b/configs/freedom-k66f/include/board.h
index 97d3bf4122..7e5cbf50b5 100644
--- a/configs/freedom-k66f/include/board.h
+++ b/configs/freedom-k66f/include/board.h
@@ -42,11 +42,12 @@
  ************************************************************************************/
 
 #include <nuttx/config.h>
-
 #ifndef __ASSEMBLY__
 #  include <stdint.h>
 #endif
 
+#include "chip.h"
+
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
@@ -62,7 +63,7 @@
  *
  */
 
-#define BOARD_EXTAL_LP		 1
+#define BOARD_EXTAL_LP       1
 #define BOARD_EXTAL_FREQ     12000000       /* 12MHz Oscillator */
 #define BOARD_XTAL32_FREQ    32768          /* 32KHz RTC Oscillator */
 
@@ -103,6 +104,46 @@
 #define BOARD_FLEXBUS_FREQ  (BOARD_MCG_FREQ / BOARD_OUTDIV3)
 #define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
 
+/* Use BOARD_MCG_FREQ as the output SIM_SOPT2 MUX selected by
+ * SIM_SOPT2[PLLFLLSEL]
+ */
+
+#define BOARD_SOPT2_PLLFLLSEL   SIM_SOPT2_PLLFLLSEL_MCGPLLCLK
+#define BOARD_SOPT2_FREQ        BOARD_MCG_FREQ
+
+/* N.B. The above BOARD_SOPT2_FREQ precludes use of USB with a 12 Mhz Xtal
+ * Divider output clock = Divider input clock × [ (USBFRAC+1) / (USBDIV+1) ]
+ *     SIM_CLKDIV2_FREQ = BOARD_SOPT2_FREQ × [ (USBFRAC+1) / (USBDIV+1) ]
+ *                48Mhz = 168Mhz X [(1 + 1) / (6 + 1)]
+ *                48Mhz = 168Mhz / (6 + 1) * (1 + 1)
+ */
+
+#if (BOARD_MCG_FREQ == 168000000L)
+#  define BOARD_SIM_CLKDIV2_USBFRAC     2
+#  define BOARD_SIM_CLKDIV2_USBDIV      7
+#  define BOARD_SIM_CLKDIV2_FREQ        (BOARD_SOPT2_FREQ / \
+                                         BOARD_SIM_CLKDIV2_USBDIV * \
+                                         BOARD_SIM_CLKDIV2_USBFRAC)
+#endif
+
+/* Divider output clock = Divider input clock * ((PLLFLLFRAC+1)/(PLLFLLDIV+1))
+ *  SIM_CLKDIV3_FREQ = BOARD_SOPT2_FREQ × [ (PLLFLLFRAC+1) / (PLLFLLDIV+1)]
+ *            90 Mhz = 180 Mhz X [(0 + 1) / (1 + 1)]
+ *            90 Mhz = 180 Mhz / (1 + 1) * (0 + 1)
+ */
+
+#define BOARD_SIM_CLKDIV3_PLLFLLFRAC  1
+#define BOARD_SIM_CLKDIV3_PLLFLLDIV   2
+#define BOARD_SIM_CLKDIV3_FREQ        (BOARD_SOPT2_FREQ / \
+                                       BOARD_SIM_CLKDIV3_PLLFLLDIV * \
+                                       BOARD_SIM_CLKDIV3_PLLFLLFRAC)
+
+#define BOARD_LPUART0_CLKSRC  SIM_SOPT2_LPUARTSRC_MCGCLK
+#define BOARD_LPUART0_FREQ    BOARD_SIM_CLKDIV3_FREQ
+
+#define BOARD_TPM_CLKSRC      SIM_SOPT2_TPMSRC_MCGCLK
+#define BOARD_TPM_FREQ        BOARD_SIM_CLKDIV3_FREQ
+
 /* SDHC clocking ********************************************************************/
 
 /* SDCLK configurations corresponding to various modes of operation.   Formula is:
@@ -276,6 +317,18 @@
 #define PIN_UART4_RX      PIN_UART4_RX_1
 #define PIN_UART4_TX      PIN_UART4_TX_1
 
+/* LPUART
+ *
+ *  J1 Pin     Name        K66   Name
+ *  -------- ------------ ------ ---------
+ *      7    I2S_RX_BCLK  PTE9 LPUART0_RX
+ *      11   I2S_RX_FS    PTE8 LPUART0_TX
+ *  -------- ----- ------ ---------
+ */
+
+#define PIN_LPUART0_RX      PIN_LPUART0_RX_1
+#define PIN_LPUART0_TX      PIN_LPUART0_TX_1
+
 /* I2C INERTIAL SENSOR (Gyroscope)
  *
  *  Pin Name   K66   Name