sergiotarxz/nuttx
sergiotarxz/nuttx
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Merged nuttx/arch/master into atmega2560

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This commit is contained in:
Dimitry Kloper 2016-01-07 21:59:42 +02:00
commit 0d684a42e4
11 changed files with 184 additions and 178 deletions

1
arch/avr/include/at90usb/irq.h

@ -94,6 +94,7 @@
#define AT90USB_IRQ_SPMRDY 36 /* 0x004a Store Program Memory Ready */
#define NR_IRQS 37
#define AVR_PC_SIZE 16
#define XCPTCONTEXT_REGS 37 /* Size of the register state save array (in bytes) */
/****************************************************************************

6
arch/avr/include/atmega/irq.h

@ -93,7 +93,7 @@
# define ATMEGA_IRQ_SPMRDY 33 /* 0x0044 Store Program Memory Ready */
# define NR_IRQS 34
# define ATMEGA_PC_SIZE 16
# define AVR_PC_SIZE 16
# define XCPTCONTEXT_REGS 37 /* Size of the register state save array (in bytes) */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA1284P)
@ -134,7 +134,7 @@
# define ATMEGA_IRQ_T3OVF 33 /* 0x0044 TIMER3 OVF Timer/Counter3 Overflow */
# define NR_IRQS 34
# define ATMEGA_PC_SIZE 16
# define AVR_PC_SIZE 16
# define XCPTCONTEXT_REGS 37 /* Size of the register state save array (in bytes) */
#elif defined(CONFIG_ARCH_CHIP_ATMEGA2560)
@ -197,7 +197,7 @@
# define ATMEGA_IRQ_USART3_TXC 57 /* 0x0070 USART3 TX USART3 Tx Complete */
# define NR_IRQS 58
# define ATMEGA_PC_SIZE 24
# define AVR_PC_SIZE 24
# define XCPTCONTEXT_REGS 38 /* Size of the register state save array (in bytes) */
#else

4
arch/avr/include/avr/irq.h

@ -34,7 +34,7 @@
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
* through nuttx/irq.h.
*/
#ifndef __ARCH_AVR_INCLUDE_AVR_IRQ_H
@ -93,7 +93,7 @@
#define REG_PC0 35 /* PC */
#define REG_PC1 36
#if ATMEGA_PC_SIZE > 16
#if AVR_PC_SIZE > 16
# define REG_PC2 37
#endif

1
arch/avr/include/xmega/xmegac_irq.h

@ -86,6 +86,7 @@
#define XMEGA_IRQ_USB xx /* 0x00fa USB on port D Interrupt base */
#define NR_IRQS xx
#define AVR_PC_SIZE xx
/****************************************************************************
* Public Types

2
arch/avr/src/atmega/Kconfig

@ -39,7 +39,7 @@ config AVR_USART1
endmenu # ATMega Peripheral Selections
menu "Low level UART driver options"
menu "Low level USART driver options"
depends on AVR_USART0 || AVR_USART1
config SERIAL_TERMIOS

36
arch/avr/src/atmega/atmega_lowconsole.c

@ -77,41 +77,43 @@
* AVR_DBLSPEED_UBRR1 = 104 (rounded), actual baud = 9615
*/
#undef UART0_DOUBLE_SPEED
#undef USART0_DOUBLE_SPEED
#ifdef CONFIG_AVR_USART0
# if BOARD_CPU_CLOCK <= 4000000
# if CONFIG_USART0_BAUD <= 9600
# define AVR_UBRR0 AVR_NORMAL_UBRR0
# else
# define AVR_UBRR0 AVR_DBLSPEED_UBRR0
# define UART0_DOUBLE_SPEED 1
# define USART0_DOUBLE_SPEED 1
# endif
# elif BOARD_CPU_CLOCK <= 8000000
# if CONFIG_USART0_BAUD <= 19200
# define AVR_UBRR0 AVR_NORMAL_UBRR0
# else
# define AVR_UBRR0 AVR_DBLSPEED_UBRR0
# define UART0_DOUBLE_SPEED 1
# define USART0_DOUBLE_SPEED 1
# endif
# elif BOARD_CPU_CLOCK <= 12000000
# if CONFIG_USART0_BAUD <= 28800
# define AVR_UBRR0 AVR_NORMAL_UBRR0
# else
# define AVR_UBRR0 AVR_DBLSPEED_UBRR0
# define UART0_DOUBLE_SPEED 1
# define USART0_DOUBLE_SPEED 1
# endif
# elif BOARD_CPU_CLOCK <= 16000000
# if CONFIG_USART0_BAUD <= 38400
# define AVR_UBRR0 AVR_NORMAL_UBRR0
# else
# define AVR_UBRR0 AVR_DBLSPEED_UBRR0
# define UART0_DOUBLE_SPEED 1
# define USART0_DOUBLE_SPEED 1
# endif
# else
# if CONFIG_USART0_BAUD <= 57600
# define AVR_UBRR0 AVR_NORMAL_UBRR0
# else
# define AVR_UBRR0 AVR_DBLSPEED_UBRR0
# define UART0_DOUBLE_SPEED 1
# define USART0_DOUBLE_SPEED 1
# endif
# endif
#endif
@ -137,41 +139,43 @@
* AVR_DBLSPEED_UBRR1 = 104 (rounded), actual baud = 9615
*/
#undef UART1_DOUBLE_SPEED
#undef USART1_DOUBLE_SPEED
#ifdef CONFIG_AVR_USART1
# if BOARD_CPU_CLOCK <= 4000000
# if CONFIG_USART1_BAUD <= 9600
# define AVR_UBRR1 AVR_NORMAL_UBRR1
# else
# define AVR_UBRR1 AVR_DBLSPEED_UBRR1
# define UART1_DOUBLE_SPEED 1
# define USART1_DOUBLE_SPEED 1
# endif
# elif BOARD_CPU_CLOCK <= 8000000
# if CONFIG_USART1_BAUD <= 19200
# define AVR_UBRR1 AVR_NORMAL_UBRR1
# else
# define AVR_UBRR1 AVR_DBLSPEED_UBRR1
# define UART1_DOUBLE_SPEED 1
# define USART1_DOUBLE_SPEED 1
# endif
# elif BOARD_CPU_CLOCK <= 12000000
# if CONFIG_USART1_BAUD <= 28800
# define AVR_UBRR1 AVR_NORMAL_UBRR1
# else
# define AVR_UBRR1 AVR_DBLSPEED_UBRR1
# define UART1_DOUBLE_SPEED 1
# define USART1_DOUBLE_SPEED 1
# endif
# elif BOARD_CPU_CLOCK <= 16000000
# if CONFIG_USART1_BAUD <= 38400
# define AVR_UBRR1 AVR_NORMAL_UBRR1
# else
# define AVR_UBRR1 AVR_DBLSPEED_UBRR1
# define UART1_DOUBLE_SPEED 1
# define USART1_DOUBLE_SPEED 1
# endif
# else
# if CONFIG_USART1_BAUD <= 57600
# define AVR_UBRR1 AVR_NORMAL_UBRR1
# else
# define AVR_UBRR1 AVR_DBLSPEED_UBRR1
# define UART1_DOUBLE_SPEED 1
# define USART1_DOUBLE_SPEED 1
# endif
# endif
#endif
@ -270,7 +274,7 @@ void usart0_configure(void)
/* Select normal or double speed. */
#ifdef UART0_DOUBLE_SPEED
#ifdef USART0_DOUBLE_SPEED
UCSR0A = (1 << U2X0);
#else
UCSR0A = 0;
@ -324,7 +328,7 @@ void usart0_configure(void)
* USART0 forces this pin to be an input, a logical one in PORTD0 will
* turn on the internal pull-up.
*
* Port D, Bit 1: TXD0, UART0 Transmit pin.
* Port D, Bit 1: TXD0, USART0 Transmit pin.
*/
DDRD |= (1 << 1); /* Force Port D pin 1 to be an output -- should not be necessary */
@ -340,7 +344,7 @@ void usart0_configure(void)
* USART0 forces this pin to be an input, a logical one in PORTE0 will
* turn on the internal pull-up.
*
* Port E, Bit 1: TXD0, UART0 Transmit pin.
* Port E, Bit 1: TXD0, USART0 Transmit pin.
*
* REVISIT: According to table 41, TXD0 is also automatically configured.
* However, this is not explicitly stated in the text.
@ -365,7 +369,7 @@ void usart1_configure(void)
/* Select normal or double speed. */
#ifdef UART1_DOUBLE_SPEED
#ifdef USART1_DOUBLE_SPEED
UCSR1A = (1 << U2X1);
#else
UCSR1A = 0;

12
arch/avr/src/avr/excptmacros.h

@ -335,9 +335,9 @@
/* Pop the return address from the stack (PC0 then PC1). R18:19 are Call-used */
#if ATMEGA_PC_SIZE > 16
#if AVR_PC_SIZE > 16
pop r20
#endif /* ATMEGA_PC_SIZE */
#endif /* AVR_PC_SIZE */
pop r19
pop r18
@ -402,9 +402,9 @@
/* Save the return address that we have saved in r18:19*/
#if ATMEGA_PC_SIZE > 16
#if AVR_PC_SIZE > 16
st x+, r20
#endif /* ATMEGA_PC_SIZE */
#endif /* AVR_PC_SIZE */
st x+, r19
st x+, r18
.endm
@ -435,7 +435,7 @@
*/
movw r28, r26 /* Get a pointer to the PC0/PC1 storage location */
#if ATMEGA_PC_SIZE <= 16
#if AVR_PC_SIZE <= 16
adiw r28, REG_PC0
#else
adiw r28, REG_PC2
@ -457,7 +457,7 @@
* --- <- SP
*/
#if ATMEGA_PC_SIZE <= 16
#if AVR_PC_SIZE <= 16
ld r25, y+ /* Load PC0 (r25) then PC1 (r24) */
ld r24, y+
push r24 /* Push PC0 and PC1 on the stack (PC1 then PC0) */

12
arch/mips/src/pic32mx/excptmacros.h

@ -72,7 +72,7 @@
* my_exception:
* EXCPT_PROLOGUE t0 - Save registers on stack, enable nested interrupts
* move a0, sp - Pass register save structure as the parameter 1
* USE_INTSTACK t0, t1, t2 - Switch to the interrupt stack
* USE_INTSTACK t0, t1, t2, t3 - Switch to the interrupt stack
* jal handler - Handle the exception IN=old regs OUT=new regs
* di - Disable interrupts
* RESTORE_STACK t0, t1 - Undo the operations of USE_STACK
@ -368,7 +368,7 @@
*
* On Entry:
* sp - Current value of the user stack pointer
* tmp1, tmp2, and tmp3 are registers that can be used temporarily.
* tmp1, tmp2, tmp3, and tmp4 are registers that can be used temporarily.
* All interrupts should still be disabled.
*
* At completion:
@ -378,7 +378,7 @@
*
********************************************************************************************/
.macro USE_INTSTACK, tmp1, tmp2, tmp3
.macro USE_INTSTACK, tmp1, tmp2, tmp3, tmp4
#if CONFIG_ARCH_INTERRUPTSTACK > 3
#ifdef CONFIG_PIC32MX_NESTED_INTERRUPTS
@ -398,9 +398,9 @@
*/
la \tmp3, g_intstackbase
lw \tmp, (\tmp3)
sw sp, (\tmp3)
move sp, \tmp3
lw \tmp4, (\tmp3)
sw sp, (\tmp4)
move sp, \tmp4
#ifdef CONFIG_PIC32MX_NESTED_INTERRUPTS
1:

6
arch/mips/src/pic32mx/pic32mx-head.S

@ -490,7 +490,7 @@ __start:
_exception_handler:
EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
move a0, sp /* Pass register save structure as the parameter 1 */
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
USE_INTSTACK t0, t1, t2, t3 /* Switch to the interrupt stack */
la t0, pic32mx_exception /* Call pic32mx_exception(regs) */
jalr ra, t0
nop
@ -515,7 +515,7 @@ _exception_handler:
_int_handler:
EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
move a0, sp /* Pass register save structure as the parameter 1 */
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
USE_INTSTACK t0, t1, t2, t3 /* Switch to the interrupt stack */
la t0, pic32mx_decodeirq /* Call pic32mx_decodeirq(regs) */
jalr ra, t0
nop
@ -541,7 +541,7 @@ _int_handler:
_nmi_handler:
EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
move a0, sp /* Pass register save structure as the parameter 1 */
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
USE_INTSTACK t0, t1, t2, t3 /* Switch to the interrupt stack */
la t0, pic32mx_donmi /* Call up_donmi(regs) */
jalr ra, t0
nop

12
arch/mips/src/pic32mz/pic32mz-excptmacros.h

@ -72,7 +72,7 @@
* my_exception:
* EXCPT_PROLOGUE t0 - Save registers on stack, enable nested interrupts
* move a0, sp - Pass register save structure as the parameter 1
* USE_INTSTACK t0, t1, t2 - Switch to the interrupt stack
* USE_INTSTACK t0, t1, t2, t3 - Switch to the interrupt stack
* jal handler - Handle the exception IN=old regs OUT=new regs
* di - Disable interrupts
* RESTORE_STACK t0, t1 - Undo the operations of USE_STACK
@ -368,7 +368,7 @@
*
* On Entry:
* sp - Current value of the user stack pointer
* tmp1, tmp2, and tmp3 are registers that can be used temporarily.
* tmp1, tmp2, tmp3, and tmp4 are registers that can be used temporarily.
* All interrupts should still be disabled.
*
* At completion:
@ -378,7 +378,7 @@
*
********************************************************************************************/
.macro USE_INTSTACK, tmp1, tmp2, tmp3
.macro USE_INTSTACK, tmp1, tmp2, tmp3, tmp4
#if CONFIG_ARCH_INTERRUPTSTACK > 3
#ifdef CONFIG_PIC32MZ_NESTED_INTERRUPTS
@ -398,9 +398,9 @@
*/
la \tmp3, g_intstackbase
lw \tmp, (\tmp3)
sw sp, (\tmp3)
move sp, \tmp3
lw \tmp4, (\tmp3)
sw sp, (\tmp4)
move sp, \tmp4
#ifdef CONFIG_PIC32MZ_NESTED_INTERRUPTS
1:

6
arch/mips/src/pic32mz/pic32mz-head.S

@ -561,7 +561,7 @@ __start:
_exception_handler:
EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
move a0, sp /* Pass register save structure as the parameter 1 */
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
USE_INTSTACK t0, t1, t2, t3 /* Switch to the interrupt stack */
la t0, pic32mz_exception /* Call pic32mz_exception(regs) */
jalr ra, t0
nop
@ -590,7 +590,7 @@ _exception_handler:
_int_handler:
EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
move a0, sp /* Pass register save structure as the parameter 1 */
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
USE_INTSTACK t0, t1, t2, t3 /* Switch to the interrupt stack */
la t0, pic32mz_decodeirq /* Call pic32mz_decodeirq(regs) */
jalr ra, t0
nop
@ -620,7 +620,7 @@ _int_handler:
_nmi_handler:
EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
move a0, sp /* Pass register save structure as the parameter 1 */
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
USE_INTSTACK t0, t1, t2, t3 /* Switch to the interrupt stack */
la t0, pic32mz_donmi /* Call up_donmi(regs) */
jalr ra, t0
nop