DisruptiveNL <disruptivesolutionsnl@gmail.com>
This commit is contained in:
parent
ba07978c2a
commit
0e142aeee1
@ -1,7 +1,7 @@
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/************************************************************************************
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/************************************************************************************
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* configs/nucleo-l476rg/include/board.h
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* configs/nucleo-l476rg/include/board.h
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*
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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@ -81,6 +81,18 @@
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/* Alternate function pin selections ************************************************/
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/* Alternate function pin selections ************************************************/
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/* CAN1: (added 31-03 -- Ben vd Veen (DisruptiveNL)
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* RXD: PA11
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* PB8
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* PD0
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* TXD: PA12
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* PB9
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* PD1
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*/
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#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PA11 - AF9 */
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#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PA12 - AF9 */
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/* USART1:
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/* USART1:
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* RXD: PA10 CN9 pin 3, CN10 pin 33
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* RXD: PA10 CN9 pin 3, CN10 pin 33
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* PB7 CN7 pin 21
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* PB7 CN7 pin 21
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@ -59,6 +59,16 @@ CSRCS += stm32_ajoystick.c
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endif
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endif
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endif
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endif
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# Ben vd Veen (DisruptiveNL) -- 31-03-2018
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ifeq ($(CONFIG_DEV_GPIO),y)
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CSRCS += stm32_gpio.c
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endif
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# Ben vd Veen (DisruptiveNL) -- 31-03-2018
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ifeq ($(CONFIG_CAN),y)
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CSRCS += stm32_can.c
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endif
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ifeq ($(CONFIG_SENSORS_QENCODER),y)
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ifeq ($(CONFIG_SENSORS_QENCODER),y)
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CSRCS += stm32_qencoder.c
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CSRCS += stm32_qencoder.c
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endif
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endif
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@ -50,6 +50,7 @@
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/************************************************************************************
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/************************************************************************************
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* Pre-processor Definitions
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* Pre-processor Definitions
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************************************************************************************/
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************************************************************************************/
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/* Configuration ********************************************************************/
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/* Configuration ********************************************************************/
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#define HAVE_PROC 1
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#define HAVE_PROC 1
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@ -119,7 +120,6 @@
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* D7=PA_8 I2C1_SCL=D15=PB_8 WIFI Probe
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* D7=PA_8 I2C1_SCL=D15=PB_8 WIFI Probe
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*
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*
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* mostly from: https://mbed.org/platforms/ST-Nucleo-F401RE/
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* mostly from: https://mbed.org/platforms/ST-Nucleo-F401RE/
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*
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*/
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*/
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/* SPI1 off */
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/* SPI1 off */
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@ -243,6 +243,26 @@
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#define GPIO_FIRE GPIO_BUTTON_2
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#define GPIO_FIRE GPIO_BUTTON_2
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#define GPIO_JUMP GPIO_BUTTON_3
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#define GPIO_JUMP GPIO_BUTTON_3
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/* GPIO pins used by the GPIO Subsystem
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* Added by: Ben vd Veen (DisruptiveNL) -- www.nuttx.nl
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*/
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#define BOARD_NGPIOIN 1 /* Amount of GPIO Input pins */
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#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */
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#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
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/* This was really something to find out! But the GPIOA Port was causing
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* conflicts with the nsh console. So thats why I have chosen GPIOB
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*
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* Author: Ben vd Veen (DisruptiveNL) -- www.nuttx.nl
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* https://www.youtube.com/watch?v=VXsTLzI6idA -- Original video GPIO
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*/
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#define GPIO_IN1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN0)
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#define GPIO_OUT1 (GPIO_OUTPUT | GPIO_OUTPUT | GPIO_SPEED_50MHz | \
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GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN1)
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#define GPIO_INT1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN2)
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/************************************************************************************
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/************************************************************************************
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* Public Data
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* Public Data
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************************************************************************************/
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************************************************************************************/
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@ -283,6 +303,32 @@ void stm32l4_spiinitialize(void);
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void stm32l4_usbinitialize(void);
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void stm32l4_usbinitialize(void);
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/****************************************************************************
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* Name: stm32_gpio_initialize
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*
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* Description:
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* Initialize GPIO drivers for use with /apps/examples/gpio
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* Added by: Ben vd Veen (DisruptiveNL) -- www.nuttx.nl
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*
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****************************************************************************/
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#ifdef CONFIG_DEV_GPIO
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int stm32l4_gpio_initialize(void);
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#endif
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/************************************************************************************
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* Name: stm32l4_can_setup -- DisruptiveNL
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*
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* Description:
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* Initialize CAN and register the CAN device.
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* Added by: Ben vd Veen (DisruptiveNL) -- www.nuttx.nl
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*
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************************************************************************************/
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#ifdef CONFIG_CAN
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int stm32l4_can_setup(void);
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#endif
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/************************************************************************************
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/************************************************************************************
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* Name: stm32l4_pwm_setup
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* Name: stm32l4_pwm_setup
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*
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*
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@ -1,7 +1,7 @@
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/****************************************************************************
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/****************************************************************************
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* configs/nucleo-l476rg/src/stm32l4_appinit.c
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* configs/nucleo-l476rg/src/stm32l4_appinit.c
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*
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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@ -196,6 +196,19 @@ int board_app_initialize(uintptr_t arg)
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}
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}
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#endif
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#endif
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/* Initialize CAN and register the CAN driver.
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* Added by: Ben vd Veen (DisruptiveNL) -- www.nuttx.nl
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*/
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#ifdef CONFIG_CAN
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ret = stm32l4_can_setup();
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if (ret < 0)
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{
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syslog(LOG_ERR, "ERROR: stm32l4_can_setup failed: %d\n", ret);
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return ret;
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}
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#endif
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#ifdef CONFIG_AJOYSTICK
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#ifdef CONFIG_AJOYSTICK
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/* Initialize and register the joystick driver */
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/* Initialize and register the joystick driver */
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@ -300,6 +313,19 @@ int board_app_initialize(uintptr_t arg)
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#endif
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#endif
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#endif /* CONFIG_SENSORS_QENCODER */
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#endif /* CONFIG_SENSORS_QENCODER */
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/* Initialize CAN and register the CAN driver.
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* Added by: Ben vd Veen (DisruptiveNL) -- www.nuttx.nl
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*/
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#ifdef CONFIG_DEV_GPIO
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ret = stm32l4_gpio_initialize();
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if (ret < 0)
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{
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syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
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return ret;
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}
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#endif
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#ifdef CONFIG_WL_CC1101
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#ifdef CONFIG_WL_CC1101
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/* Initialize and register the cc1101 radio */
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/* Initialize and register the cc1101 radio */
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109
configs/nucleo-l476rg/src/stm32_can.c
Normal file
109
configs/nucleo-l476rg/src/stm32_can.c
Normal file
@ -0,0 +1,109 @@
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/************************************************************************************
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* configs/stm3220g-eval/src/stm32_can.c
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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||||||
|
* notice, this list of conditions and the following disclaimer.
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|
* 2. Redistributions in binary form must reproduce the above copyright
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|
* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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||||||
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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||||||
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/* Added by: Ben vd Veen (DisruptiveNL) -- www.nuttx.nl */
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/can/can.h>
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#include "stm32l4_can.h"
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#include "nucleo-l476rg.h"
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#ifdef CONFIG_CAN
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#if defined(CONFIG_STM32L4_CAN1)
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# warning "Both CAN1 and CAN2 are enabled. Only CAN1 is connected."
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#endif
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#ifdef CONFIG_STM32L4_CAN1
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# define CAN_PORT 1
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_can_setup
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*
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* Description:
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* Initialize CAN and register the CAN device
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*
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****************************************************************************/
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int stm32l4_can_setup(void)
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{
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#ifdef CONFIG_STM32L4_CAN1
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struct can_dev_s *can;
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int ret;
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/* Call stm32_caninitialize() to get an instance of the CAN interface */
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can = stm32l4can_initialize(CAN_PORT);
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if (can == NULL)
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{
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canerr("ERROR: Failed to get CAN interface\n");
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return -ENODEV;
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}
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/* Register the CAN driver at "/dev/can0" */
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ret = can_register("/dev/can0", can);
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if (ret < 0)
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{
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canerr("ERROR: can_register failed: %d\n", ret);
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return ret;
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}
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return OK;
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#else
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return -ENODEV;
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#endif
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}
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#endif /* CONFIG_CAN */
|
336
configs/nucleo-l476rg/src/stm32_gpio.c
Normal file
336
configs/nucleo-l476rg/src/stm32_gpio.c
Normal file
@ -0,0 +1,336 @@
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/****************************************************************************
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* configs/nucleo-l476rg/src/stm32_gpio.c
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*
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* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
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* Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved.
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* Author: Alan Carvalho de Assis <acassis@gmail.com>
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*
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* Based on: configs/sim/src/sim_gpio.c
|
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* Author: Gregory Nutt <gnutt@nuttx.org>
|
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|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* Added by: Ben vd Veen (DisruptiveNL) -- www.nuttx.nl */
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||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
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|
|
||||||
|
#include <stdbool.h>
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|
#include <assert.h>
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|
#include <debug.h>
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|
|
||||||
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#include <nuttx/clock.h>
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|
#include <nuttx/wdog.h>
|
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|
#include <nuttx/ioexpander/gpio.h>
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||||||
|
|
||||||
|
#include <arch/board/board.h>
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|
||||||
|
#include "chip.h"
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|
|
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#include <stm32l4.h>
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#include "nucleo-l476rg.h"
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||||||
|
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||||||
|
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
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||||||
|
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||||||
|
/****************************************************************************
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||||||
|
* Private Types
|
||||||
|
****************************************************************************/
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|
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||||||
|
struct stm32gpio_dev_s
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||||||
|
{
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|
struct gpio_dev_s gpio;
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|
uint8_t id;
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||||||
|
};
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||||||
|
|
||||||
|
struct stm32gpint_dev_s
|
||||||
|
{
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||||||
|
struct stm32gpio_dev_s stm32gpio;
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||||||
|
pin_interrupt_t callback;
|
||||||
|
};
|
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|
|
||||||
|
/****************************************************************************
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||||||
|
* Private Function Prototypes
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value);
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||||||
|
static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value);
|
||||||
|
static int gpout_write(FAR struct gpio_dev_s *dev, bool value);
|
||||||
|
static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value);
|
||||||
|
static int gpint_attach(FAR struct gpio_dev_s *dev,
|
||||||
|
pin_interrupt_t callback);
|
||||||
|
static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable);
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Private Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static const struct gpio_operations_s gpin_ops =
|
||||||
|
{
|
||||||
|
.go_read = gpin_read,
|
||||||
|
.go_write = NULL,
|
||||||
|
.go_attach = NULL,
|
||||||
|
.go_enable = NULL,
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct gpio_operations_s gpout_ops =
|
||||||
|
{
|
||||||
|
.go_read = gpout_read,
|
||||||
|
.go_write = gpout_write,
|
||||||
|
.go_attach = NULL,
|
||||||
|
.go_enable = NULL,
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct gpio_operations_s gpint_ops =
|
||||||
|
{
|
||||||
|
.go_read = gpint_read,
|
||||||
|
.go_write = NULL,
|
||||||
|
.go_attach = gpint_attach,
|
||||||
|
.go_enable = gpint_enable,
|
||||||
|
};
|
||||||
|
|
||||||
|
#if BOARD_NGPIOIN > 0
|
||||||
|
/* This array maps the GPIO pins used as INPUT */
|
||||||
|
|
||||||
|
static const uint32_t g_gpioinputs[BOARD_NGPIOIN] =
|
||||||
|
{
|
||||||
|
GPIO_IN1,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct stm32gpio_dev_s g_gpin[BOARD_NGPIOIN];
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if BOARD_NGPIOOUT
|
||||||
|
/* This array maps the GPIO pins used as OUTPUT */
|
||||||
|
|
||||||
|
static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
|
||||||
|
{
|
||||||
|
GPIO_OUT1,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct stm32gpio_dev_s g_gpout[BOARD_NGPIOOUT];
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if BOARD_NGPIOINT > 0
|
||||||
|
/* This array maps the GPIO pins used as INTERRUPT INPUTS */
|
||||||
|
|
||||||
|
static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] =
|
||||||
|
{
|
||||||
|
GPIO_INT1,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct stm32gpint_dev_s g_gpint[BOARD_NGPIOINT];
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Private Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static int stm32gpio_interrupt(int irq, void *context, void *arg)
|
||||||
|
{
|
||||||
|
FAR struct stm32gpint_dev_s *stm32gpint = (FAR struct stm32gpint_dev_s *)arg;
|
||||||
|
|
||||||
|
DEBUGASSERT(stm32gpint != NULL && stm32gpint->callback != NULL);
|
||||||
|
gpioinfo("Interrupt! callback=%p\n", stm32gpint->callback);
|
||||||
|
|
||||||
|
stm32gpint->callback(&stm32gpint->stm32gpio.gpio);
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value)
|
||||||
|
{
|
||||||
|
FAR struct stm32gpio_dev_s *stm32gpio = (FAR struct stm32gpio_dev_s *)dev;
|
||||||
|
|
||||||
|
DEBUGASSERT(stm32gpio != NULL && value != NULL);
|
||||||
|
DEBUGASSERT(stm32gpio->id < BOARD_NGPIOIN);
|
||||||
|
gpioinfo("Reading...\n");
|
||||||
|
|
||||||
|
*value = stm32l4_gpioread(g_gpioinputs[stm32gpio->id]);
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value)
|
||||||
|
{
|
||||||
|
FAR struct stm32gpio_dev_s *stm32gpio = (FAR struct stm32gpio_dev_s *)dev;
|
||||||
|
|
||||||
|
DEBUGASSERT(stm32gpio != NULL && value != NULL);
|
||||||
|
DEBUGASSERT(stm32gpio->id < BOARD_NGPIOOUT);
|
||||||
|
gpioinfo("Reading...\n");
|
||||||
|
|
||||||
|
*value = stm32l4_gpioread(g_gpiooutputs[stm32gpio->id]);
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
|
||||||
|
{
|
||||||
|
FAR struct stm32gpio_dev_s *stm32gpio = (FAR struct stm32gpio_dev_s *)dev;
|
||||||
|
|
||||||
|
DEBUGASSERT(stm32gpio != NULL);
|
||||||
|
DEBUGASSERT(stm32gpio->id < BOARD_NGPIOOUT);
|
||||||
|
gpioinfo("Writing %d\n", (int)value);
|
||||||
|
|
||||||
|
stm32l4_gpiowrite(g_gpiooutputs[stm32gpio->id], value);
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value)
|
||||||
|
{
|
||||||
|
FAR struct stm32gpint_dev_s *stm32gpint = (FAR struct stm32gpint_dev_s *)dev;
|
||||||
|
|
||||||
|
DEBUGASSERT(stm32gpint != NULL && value != NULL);
|
||||||
|
DEBUGASSERT(stm32gpint->stm32gpio && stm32gpint->stm32gpio.id < BOARD_NGPIOINT);
|
||||||
|
gpioinfo("Reading int pin...\n");
|
||||||
|
|
||||||
|
*value = stm32l4_gpioread(g_gpiointinputs[stm32gpint->stm32gpio.id]);
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int gpint_attach(FAR struct gpio_dev_s *dev,
|
||||||
|
pin_interrupt_t callback)
|
||||||
|
{
|
||||||
|
FAR struct stm32gpint_dev_s *stm32gpint = (FAR struct stm32gpint_dev_s *)dev;
|
||||||
|
|
||||||
|
gpioinfo("Attaching the callback\n");
|
||||||
|
|
||||||
|
/* Make sure the interrupt is disabled */
|
||||||
|
|
||||||
|
(void)stm32l4_gpiosetevent(g_gpiointinputs[stm32gpint->stm32gpio.id], false,
|
||||||
|
false, false, NULL, NULL);
|
||||||
|
|
||||||
|
gpioinfo("Attach %p\n", callback);
|
||||||
|
stm32gpint->callback = callback;
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable)
|
||||||
|
{
|
||||||
|
FAR struct stm32gpint_dev_s *stm32gpint = (FAR struct stm32gpint_dev_s *)dev;
|
||||||
|
|
||||||
|
if (enable)
|
||||||
|
{
|
||||||
|
if (stm32gpint->callback != NULL)
|
||||||
|
{
|
||||||
|
gpioinfo("Enabling the interrupt\n");
|
||||||
|
|
||||||
|
/* Configure the interrupt for rising edge */
|
||||||
|
|
||||||
|
(void)stm32l4_gpiosetevent(g_gpiointinputs[stm32gpint->stm32gpio.id],
|
||||||
|
true, false, false, stm32gpio_interrupt,
|
||||||
|
&g_gpint[stm32gpint->stm32gpio.id]);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
gpioinfo("Disable the interrupt\n");
|
||||||
|
|
||||||
|
(void)stm32l4_gpiosetevent(g_gpiointinputs[stm32gpint->stm32gpio.id],
|
||||||
|
false, false, false, NULL, NULL);
|
||||||
|
}
|
||||||
|
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: stm32_gpio_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Initialize GPIO drivers for use with /apps/examples/gpio
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
int stm32l4_gpio_initialize(void)
|
||||||
|
{
|
||||||
|
int pincount = 0;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
#if BOARD_NGPIOIN > 0
|
||||||
|
for (i = 0; i < BOARD_NGPIOIN; i++)
|
||||||
|
{
|
||||||
|
/* Setup and register the GPIO pin */
|
||||||
|
|
||||||
|
g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN;
|
||||||
|
g_gpin[i].gpio.gp_ops = &gpin_ops;
|
||||||
|
g_gpin[i].id = i;
|
||||||
|
(void)gpio_pin_register(&g_gpin[i].gpio, pincount);
|
||||||
|
|
||||||
|
/* Configure the pin that will be used as input */
|
||||||
|
|
||||||
|
stm32l4_configgpio(g_gpioinputs[i]);
|
||||||
|
|
||||||
|
pincount++;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if BOARD_NGPIOOUT > 0
|
||||||
|
for (i = 0; i < BOARD_NGPIOOUT; i++)
|
||||||
|
{
|
||||||
|
/* Setup and register the GPIO pin */
|
||||||
|
|
||||||
|
g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
|
||||||
|
g_gpout[i].gpio.gp_ops = &gpout_ops;
|
||||||
|
g_gpout[i].id = i;
|
||||||
|
(void)gpio_pin_register(&g_gpout[i].gpio, pincount);
|
||||||
|
|
||||||
|
/* Configure the pin that will be used as output */
|
||||||
|
|
||||||
|
stm32l4_gpiowrite(g_gpiooutputs[i], 0);
|
||||||
|
stm32l4_configgpio(g_gpiooutputs[i]);
|
||||||
|
|
||||||
|
pincount++;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if BOARD_NGPIOINT > 0
|
||||||
|
for (i = 0; i < BOARD_NGPIOINT; i++)
|
||||||
|
{
|
||||||
|
/* Setup and register the GPIO pin */
|
||||||
|
|
||||||
|
g_gpint[i].stm32gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN;
|
||||||
|
g_gpint[i].stm32gpio.gpio.gp_ops = &gpint_ops;
|
||||||
|
g_gpint[i].stm32gpio.id = i;
|
||||||
|
(void)gpio_pin_register(&g_gpint[i].stm32gpio.gpio, pincount);
|
||||||
|
|
||||||
|
/* Configure the pin that will be used as interrupt input */
|
||||||
|
|
||||||
|
stm32l4_configgpio(g_gpiointinputs[i]);
|
||||||
|
|
||||||
|
pincount++;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
|
Loading…
Reference in New Issue
Block a user