From 0e54839bf776859df5f6dffbc52ded5b17e1a4b0 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 8 Dec 2013 11:49:39 -0600 Subject: [PATCH] Add A10 interrupt numbers --- arch/arm/include/a1x/a10_irq.h | 97 ++++++++++++++++++++++++++++++++-- 1 file changed, 93 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/a1x/a10_irq.h b/arch/arm/include/a1x/a10_irq.h index 22da13e6ed..1d13952fbd 100644 --- a/arch/arm/include/a1x/a10_irq.h +++ b/arch/arm/include/a1x/a10_irq.h @@ -48,16 +48,105 @@ * Pre-Processor Definitions ****************************************************************************************/ -/* External interrupts numbers */ -#warning Missing logic +/* External interrupts numbers */ + +#define A1X_IRQ_NMI 0 /* External Non-Mask Interrupt */ +# define A1X_IRQ_POWER 0 /* Power module */ +# define A1X_IRQ_BATTERY 0 /* Brownout detect */ +# define A1X_IRQ_BROWNOUT 0 /* Brownout */ +#define A1X_IRQ_UART0 1 /* UART 0 interrupt */ +#define A1X_IRQ_UART1 2 /* UART 1 interrupt */ +#define A1X_IRQ_UART2 3 /* UART 2 interrupt */ +#define A1X_IRQ_UART3 4 /* UART 3 interrupt */ +#define A1X_IRQ_IR0 5 /* IR 0 interrupt */ +#define A1X_IRQ_IR1 6 /* IR 1 interrupt */ +#define A1X_IRQ_TWI0 7 /* TWI 0 interrupt */ +#define A1X_IRQ_TWI1 8 /* TWI 1 interrupt */ +#define A1X_IRQ_TWI2 9 /* TWI 2 interrupt */ +#define A1X_IRQ_SPI0 10 /* SPI 0 interrupt */ +#define A1X_IRQ_SPI1 11 /* SPI 1 interrupt */ +#define A1X_IRQ_SPI2 12 /* SPI 2 interrupt */ +#define A1X_IRQ_NC 13 /* NC */ +#define A1X_IRQ_AC97 14 /* AC97 interrupt */ +#define A1X_IRQ_TS 15 /* TS interrupt */ +#define A1X_IRQ_IIS 16 /* Digital Audio Controller interrupt */ +#define A1X_IRQ_UART4 17 /* UART 4 interrupt */ +#define A1X_IRQ_UART5 18 /* UART 5 interrupt */ +#define A1X_IRQ_UART6 19 /* UART 6 interrupt */ +#define A1X_IRQ_UART7 20 /* UART 7 interrupt */ +#define A1X_IRQ_Keypad 21 /* Keypad interrupt */ +#define A1X_IRQ_Timer0 22 /* Timer port 0 */ +#define A1X_IRQ_Timer1 23 /* Timer port 1 */ +#define A1X_IRQ_Timer2 24 /* Timer 2 */ +# define A1X_IRQ_Alarm 24 /* Alarm */ +# define A1X_IRQ_WD 24 /* Watchdog */ +#define A1X_IRQ_Timer3 25 /* Timer 3 interrupt */ +#define A1X_IRQ_CAN 26 /* CAN Bus controller interrupt */ +#define A1X_IRQ_DMA 27 /* DMA channel interrupt */ +#define A1X_IRQ_PIO 28 /* PIO interrupt */ +#define A1X_IRQ_TOUCH 29 /* Touch Panel interrupt */ +#define A1X_IRQ_AUDIO 30 /* Analog Aduio Codec interrupt */ +#define A1X_IRQ_LRADC 31 /* LRADC interrupt */ +#define A1X_IRQ_SDMMC0 32 /* SD/MMC Host Controller 0 interrupt */ +#define A1X_IRQ_SDMMC1 33 /* SD/MMC Host Controller 1 interrupt */ +#define A1X_IRQ_SDMMC2 34 /* SD/MMC Host Controller 2 interrupt */ +#define A1X_IRQ_SDMMC3 35 /* SD/MMC Host Controller 3 interrupt */ +#define A1X_IRQ_RESERVED36 36 +#define A1X_IRQ_NAND 37 /* NAND Flash Controller (NFC) interrupt */ +#define A1X_IRQ_USB0 38 /* USB 0 wakeup, connect, disconnect interrupt */ +#define A1X_IRQ_USB1 39 /* USB 1 wakeup, connect, disconnect interrupt */ +#define A1X_IRQ_USB2 40 /* USB 2 wakeup, connect, disconnect interrupt */ +#define A1X_IRQ_SCR 41 /* SCR interrupt */ +#define A1X_IRQ_CSI0 42 /* CSI 0 interrupt */ +#define A1X_IRQ_CSI1 43 /* CSI 1 interrupt */ +#define A1X_IRQ_LCDC0 44 /* LCD Controller 0 interrupt */ +#define A1X_IRQ_LCDC1 45 /* LCD Controller 1 interrupt */ +#define A1X_IRQ_MP 46 /* MP interrupt */ +#define A1X_IRQ_DEFE0 47 /* DE-FE0 interrupt */ +# define A1X_IRQ_DEBE0 47 /* DE-BE0 interrupt */ +#define A1X_IRQ_DEFE1 48 /* DE-FE1 interrupt */ +# define A1X_IRQ_DEBE1 48 /* DE-BE1 interrupt */ +#define A1X_IRQ_PMU 49 /* PMU interrupt */ +#define A1X_IRQ_SPI3 50 /* SPI3 interrupt */ +#define A1X_IRQ_TZASC 51 /* TZASC interrupt */ +#define A1X_IRQ_PATA 52 /* PATA interrupt */ +#define A1X_IRQ_VE 53 /* VE interrupt */ +#define A1X_IRQ_SS 54 /* Security System interrupt */ +#define A1X_IRQ_EMAC 55 /* EMAC interrupt */ +#define A1X_IRQ_RESERVED56 56 +#define A1X_IRQ_RESERVED57 57 +#define A1X_IRQ_HDMI 58 /* HDMI interrupt */ +#define A1X_IRQ_TVE 59 /* TV encoder 0/1 interrupt */ +#define A1X_IRQ_ACE 60 /* ACE interrupt */ +#define A1X_IRQ_TVD 61 /* TV decoder interrupt */ +#define A1X_IRQ_PS20 62 /* PS2-0 interrupt */ +#define A1X_IRQ_PS21 63 /* PS2-1 interrupt */ +#define A1X_IRQ_USB3 64 /* USB 3 wakeup, connect, disconnect interrupt */ +#define A1X_IRQ_USB4 65 /* USB 4 wakeup, connect, disconnect interrupt */ +#define A1X_IRQ_PLE 66 /* PLE interrupts */ +# define A1X_IRQ_PERFMU 66 /* Performance monitor interrupt */ +#define A1X_IRQ_Timer4 67 /* Timer 4 interrupt */ +#define A1X_IRQ_Timer5 68 /* Timer 5 interrupt */ +#define A1X_IRQ_GPU_GP 69 +#define A1X_IRQ_GPU_GPMMU 70 +#define A1X_IRQ_GPU_PP0 71 +#define A1X_IRQ_GPU_PPMMU0 72 +#define A1X_IRQ_GPU_PMU 73 +#define A1X_IRQ_GPU_RSV0 74 +#define A1X_IRQ_GPU_RSV1 75 +#define A1X_IRQ_GPU_RSV2 76 +#define A1X_IRQ_GPU_RSV3 77 +#define A1X_IRQ_GPU_RSV4 78 +#define A1X_IRQ_GPU_RSV5 79 +#define A1X_IRQ_GPU_RSV6 80 /* Total number of interrupts */ -#define A1X_IRQ_NINT 0 +#define A1X_IRQ_NINT 81 /* Total number of IRQ numbers */ -#define NR_IRQS 0 +#define NR_IRQS 81 /**************************************************************************************** * Public Types