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Fix some UART initialization problems

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1771 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-05-12 13:01:01 +00:00
parent 9814eb12ba
commit 0e835cd897
4 changed files with 49 additions and 24 deletions
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26
arch/arm/src/lm3s/chip.h
View File

@ -60,8 +60,28 @@
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/* Defined in lm3s_lowputc.c */
EXTERN void up_lowsetup(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LM3S_CHIP_H */

31
arch/arm/src/lm3s/lm3s_lowputc.c
View File

@ -219,8 +219,9 @@ void up_lowputc(char ch)
void up_lowsetup(void)
{
uint32 rcgc1;
#ifdef HAVE_CONSOLE
uint16 ctl;
uint32 ctl;
/* Enable the selected console device */
/* 1. Disable the UART by clearing the UARTEN bit in the UART CTL register */
@ -247,18 +248,34 @@ void up_lowsetup(void)
putreg32(ctl, LM3S_CONSOLE_BASE+LM3S_UART_CTL_OFFSET);
#endif
/* Configure GPIO pins to enable all UARTs in the configuration
* (the serial driver later depends on this configuration)
/* Peripheral clocking to the selected UART modules and to the GPIO
* modules used for the pin configuration. NOTE: this function is
* called very early in the boot sequence so we do not need to be
* concerned about exclusive access to registers.
*/
rcgc1 = getreg32(LM3S_SYSCON_RCGC1);
#if !defined(CONFIG_UART0_DISABLE) && !defined(CONFIG_UART1_DISABLE)
rcgc1 |= (SYSCON_RCGC1_UART0|SYSCON_RCGC2_GPIOA|SYSCON_RCGC1_UART1|SYSCON_RCGC2_GPIOD);
#elif !defined(CONFIG_UART0_DISABLE)
rcgc1 |= (SYSCON_RCGC1_UART0|SYSCON_RCGC2_GPIOA);
#elif !defined(CONFIG_UART1_DISABLE)
rcgc1 |= (SYSCON_RCGC1_UART1|SYSCON_RCGC2_GPIOD);
#endif
putreg32(rcgc1, LM3S_SYSCON_RCGC1);
/* Then configure GPIO pins to enable the selected UARTs. NOTE: The
* serial driver later depends on this pin configuration.
*/
#ifndef CONFIG_UART0_DISABLE
lm3x_configgpio(GPIO_UART0_RX);
lm3x_configgpio(GPIO_UART0_TX);
lm3s_configgpio(GPIO_UART0_RX);
lm3s_configgpio(GPIO_UART0_TX);
#endif
#ifndef CONFIG_UART1_DISABLE
lm3x_configgpio(GPIO_UART1_RX);
lm3x_configgpio(GPIO_UART1_TX);
lm3s_configgpio(GPIO_UART1_RX);
lm3s_configgpio(GPIO_UART1_TX);
#endif
}

14
arch/arm/src/lm3s/lm3s_start.c
View File

@ -87,19 +87,6 @@ extern uint32 _ebss; /* End+1 of .bss */
# define showprogress(c)
#endif
/****************************************************************************
* Name: up_lowsetup
*
* Description:
* Set up initial clocking
*
****************************************************************************/
static inline void up_lowsetup(void)
{
up_clockconfig();
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -119,6 +106,7 @@ void _start(void)
/* Configure the uart so that we can get debug output as soon as possible */
up_clockconfig();
up_lowsetup();
showprogress('A');

2
arch/arm/src/str71x/str71x_serial.c
View File

@ -154,7 +154,7 @@
# elif CONFIG_STR71X_UART3
# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
# endif
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
# ifndef CONFIG_STR71X_UART3
# error "UART3 not selected, cannot be console"
# endif