riscv/riscv_fpu: Clear the full FPU status/control register on boot

Instead of clearing the fields individually, just wipe the whole register.
This can be done because flags and rm are just parts of the fcsr.

31             8        5           0
+--------------+--------+-----------+
|              |        |           |
|   RESERVED   |  FRM   |  FSTATUS  |
|              |        |           |
+--------------+--------+-----------+
                FCSR
This commit is contained in:
Ville Juven 2023-07-27 11:05:19 +03:00 committed by Xiang Xiao
parent b409d72e9d
commit 0ea9debfce

View File

@ -69,8 +69,7 @@ riscv_fpuconfig:
li a0, MSTATUS_FS_INIT
csrs CSR_STATUS, a0
fsflags zero
fsrm zero
fscsr zero
fence.i
ret