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nuttx: fix typos in comments

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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
Petro Karashchenko 2022-05-13 14:32:18 +02:00 committed by Xiang Xiao
parent be9fc59b07
commit 0fee5a2b84
40 changed files with 55 additions and 47 deletions
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2
arch/arm/src/cxd56xx/cxd56_start.c
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@ -111,7 +111,7 @@ extern uint32_t _vectors[];
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/efm32/efm32_start.c
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@ -99,7 +99,7 @@ const uintptr_t g_idle_topstack = HEAP_BASE;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/eoss3/eoss3_start.c
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@ -97,7 +97,7 @@ void __start(void) noinstrument_function;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/imxrt/imxrt_start.c
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@ -126,7 +126,7 @@ static inline void imxrt_tcmenable(void)
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/kinetis/kinetis_start.c
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@ -93,7 +93,7 @@ void __start(void) noinstrument_function;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/kl/kl_start.c
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@ -87,7 +87,7 @@ const uintptr_t g_idle_topstack = IDLE_STACK;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/lc823450/lc823450_start.c
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@ -127,7 +127,7 @@ extern uint32_t _svect;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/lpc17xx_40xx/lpc17_40_start.c
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@ -97,7 +97,7 @@ void __start(void) noinstrument_function;
#endif
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/lpc43xx/lpc43_start.c
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@ -158,7 +158,7 @@ static inline void lpc43_enabuffering(void)
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/lpc54xx/lpc54_start.c
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@ -85,7 +85,7 @@ static const struct pll_setup_s g_initial_pll_setup =
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/max326xx/common/max326_start.c
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@ -85,7 +85,7 @@ const uintptr_t g_idle_topstack = IDLE_STACK;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/nrf52/nrf52_start.c
View File

@ -76,7 +76,7 @@ void __start(void) noinstrument_function;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/nuc1xx/nuc_start.c
View File

@ -84,7 +84,7 @@ const uintptr_t g_idle_topstack = IDLE_STACK;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/phy62xx/start.c
View File

@ -83,7 +83,7 @@ const uintptr_t g_idle_topstack = IDLE_STACK;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: c_start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/rp2040/rp2040_start.c
View File

@ -72,7 +72,7 @@ const uintptr_t g_idle_topstack = IDLE_STACK;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/s32k1xx/s32k1xx_start.c
View File

@ -175,7 +175,7 @@ static inline void s32k1xx_mpu_config(void)
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/sam34/sam_start.c
View File

@ -100,7 +100,7 @@ void __start(void) noinstrument_function;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/samd2l2/sam_start.c
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@ -84,7 +84,7 @@ const uintptr_t g_idle_topstack = IDLE_STACK;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/samd5e5/sam_start.c
View File

@ -106,7 +106,7 @@ void __start(void) noinstrument_function;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/samv7/hardware/sam_chipid.h
View File

@ -49,7 +49,7 @@
#define CHIPID_CIDR_VERSION_MASK (0x1f << CHIPID_CIDR_VERSION_SHIFT)
#define CHIPID_CIDR_EPROC_SHIFT (5) /* Bits 5-7: Embedded Processor */
#define CHIPID_CIDR_EPROC_MASK (7 << CHIPID_CIDR_EPROC_SHIFT)
# define CHIPID_CIDR_EPROC_CORTEXM7 (0 << CHIPID_CIDR_EPROC_SHIFT) /* Cortex-M7*/
# define CHIPID_CIDR_EPROC_CORTEXM7 (0 << CHIPID_CIDR_EPROC_SHIFT) /* Cortex-M7 */
# define CHIPID_CIDR_EPROC_ARM946ES (1 << CHIPID_CIDR_EPROC_SHIFT) /* ARM946E-S */
# define CHIPID_CIDR_EPROC_ARM7TDMI (2 << CHIPID_CIDR_EPROC_SHIFT) /* ARM7TDMI */
# define CHIPID_CIDR_EPROC_CORTEXM3 (3 << CHIPID_CIDR_EPROC_SHIFT) /* Cortex-M3 */

4
arch/arm/src/samv7/hardware/sam_mcan.h
View File

@ -180,7 +180,7 @@
#define MCAN_CCCR_FDBS (1 << 13) /* Bit 13: CAN FD Bit Rate Switching */
#define MCAN_CCCR_EFBI (1 << 13) /* Bit 13: Edge Filtering during Bus Integration */
#define MCAN_CCCR_TXP (1 << 14) /* Bit 14: Transmit Pause */
#define MCAN_CCCR_NISO (1 << 15) /* Bit 15: Non-ISO Operation (Bosch FD)*/
#define MCAN_CCCR_NISO (1 << 15) /* Bit 15: Non-ISO Operation (Bosch FD) */
/* Bit Timing and Prescaler Register (rev A) */
@ -341,7 +341,7 @@
#define MCAN_INT_STE (1 << 31) /* Bit 31: Stuff Error (rev A) */
#define MCAN_REVA_INT_ALL (0xffcfffff)
#define MCAN_REVB_INT_ALL (0x3fcfffff)
#define MCAN_REVB_INT_ALL (0x3fcfffff)
/* Interrupt Line Enable Register */

12
arch/arm/src/samv7/hardware/sam_pwm.h
View File

@ -95,10 +95,10 @@
#define CLK_DIVA_SHIFT (0) /* Bits: 0-7 CLKA Divide Factor */
#define CLK_DIVA_MASK (0xff << CLK_DIVA_SHIFT)
# define CLK_DIVA_SEL(n) ((uint32_t)(n) << CLK_DIVA_SHIFT)
# define CLK_DIVA_CLKA_POFF (0 << CLK_DIVA_SHIFT) /* CLKA clock is trned off */
# define CLK_DIVA_CLKA_POFF (0 << CLK_DIVA_SHIFT) /* CLKA clock is turned off */
# define CLK_DIVA_PREA (1 << CLK_DIVA_SHIFT) /* CLKA clock is selected by PREA */
#define CLK_PREA_SHIFT (8) /* Bits: 8-11 CLKA Souce Clock Selection */
#define CLK_PREA_SHIFT (8) /* Bits: 8-11 CLKA Source Clock Selection */
#define CLK_PREA_MASK (0x7 << CLK_PREA_SHIFT)
# define CLK_PREA_SEL(n) ((uint32_t)(n) << CLK_PREA_SHIFT)
# define CLK_PREA_CLK (0 << CLK_PREA_SHIFT) /* Peripheral Clock */
@ -116,10 +116,10 @@
#define CLK_DIVB_SHIFT (16) /* Bits: 16-23 CLKB Divide Factor */
#define CLK_DIVB_MASK (0xff << CLK_DIVB_SHIFT)
# define CLK_DIVB_SEL(n) ((uint32_t)(n) << CLK_DIVB_SHIFT)
# define CLK_DIVB_CLKB_POFF (0 << CLK_DIVB_SHIFT) /* CLKB clock is trned off */
# define CLK_DIVB_CLKB_POFF (0 << CLK_DIVB_SHIFT) /* CLKB clock is turned off */
# define CLK_DIVB_PREB (1 << CLK_DIVB_SHIFT) /* CLKB clock is selected by PREB */
#define CLK_PREB_SHIFT (24) /* Bits: 24-27 CLKA Souce Clock Selection */
#define CLK_PREB_SHIFT (24) /* Bits: 24-27 CLKA Source Clock Selection */
#define CLK_PREB_MASK (0x7 << CLK_PREB_SHIFT)
# define CLK_PREB_CLK (0 << CLK_PREB_SHIFT) /* Peripheral Clock */
# define CLK_PREB_CLK_DIV2 (1 << CLK_PREB_SHIFT) /* Peripheral Clock/2 */
@ -267,7 +267,7 @@
/* Event Line Mode Register */
#define ELMR_CSEL_SHIFT (0) /* Bits: 0-7 Comparision Selecrion */
#define ELMR_CSEL_SHIFT (0) /* Bits: 0-7 Comparison Selection */
#define ELMR_CSEL_MASK (0xff << ELMR_CSEL_SHIFT)
# define ELMR_CSEL_SEL(n) ((uint32_t)(n) << ELMR_CSEL_SHIFT)
@ -382,7 +382,7 @@
#define CMR_UPDS (1 << 11) /* Bit 11: Update Selection */
#define CMR_DPOLI (1 << 12) /* Bit 12: Disable Polarity Inverted */
#define CMR_TCTS (1 << 13) /* Bit 13: Timer Counter Trigger Selection */
#define CMR_DTE (1 << 16) /* Bit 16: Dead Time Generaton Enable */
#define CMR_DTE (1 << 16) /* Bit 16: Dead Time Generation Enable */
#define CMR_DTHI (1 << 17) /* Bit 17: Dead Time PWMH output Inverted */
#define CMR_DTLI (1 << 18) /* Bit 18: Dead Time PWML output Inverted */
#define CMR_PPM (1 << 19) /* Bit 19: Push Pull Mode */

6
arch/arm/src/samv7/hardware/sam_uart.h
View File

@ -334,7 +334,7 @@
#define UART_INT_RXBRK (1 << 2) /* Bit 2: Break Received/End of Break (USART, UART mode only) */
#define UART_INT_OVRE (1 << 5) /* Bit 5: Overrun Error Interrupt (Common) */
#define UART_INT_FRAME (1 << 6) /* Bit 6: Framing Error Interrupt (Common, UART mode) */
#define UART_INT_LSF (1 << 6) /* Bit 6: LON Short Frame Error Interrupt Enablee (USART, LON mode only) */
#define UART_INT_LSF (1 << 6) /* Bit 6: LON Short Frame Error Interrupt Enablee (USART, LON mode only) */
#define UART_INT_PARE (1 << 7) /* Bit 7: Parity Error Interrupt (Common, UART mode) */
#define UART_INT_LCRCE (1 << 7) /* Bit 7: LON CRC Error Interrupt Enablee (USART, LON mode only) */
#define UART_INT_TIMEOUT (1 << 8) /* Bit 8: Time-out Interrupt (USART, UART mode only) */
@ -377,7 +377,7 @@
#endif
#define UART_THR_TXCHR_SHIFT (0) /* Bits 0-8: Character to be Transmitted (USART only) */
#define UART_THR_TXCHR_MASK (0x1ff << UART_THR_TXCHR_SHIFT)
#define UART_THR_TXSYNH (1 << 15) /* Bit 15: Sync Field to be tran (USART only) */
#define UART_THR_TXSYNH (1 << 15) /* Bit 15: Sync Field to be Transmitted (USART only) */
/* UART Baud Rate Generator Register */
@ -488,7 +488,7 @@
#define UART_LONMR_TCOL (1 << 2) /* Bit 2: Terminate Frame upon Collision Notification */
#define UART_LONMR_CDTAIL (1 << 3) /* Bit 3: LON Collision Detection on Frame Tail */
#define UART_LONMR_DMAM (1 << 4) /* Bit 4: LON DMA Mode */
#define UART_LONMR_LCDS (1 << 5) /* Bit 5: LON Collision Detection Source */
#define UART_LONMR_LCDS (1 << 5) /* Bit 5: LON Collision Detection Source */
#define UART_LONMR_EOFS_SHIFT (16) /* Bits 16-23: End of Frame Condition Size */
#define UART_LONMR_EOFS_MASK (0xff << UART_LONMR_EOFS_SHIFT)
# define UART_LONMR_EOFS(n) ((uint32_t)(n) << UART_LONMR_EOFS_SHIFT)

2
arch/arm/src/samv7/sam_start.c
View File

@ -142,7 +142,7 @@ static inline void sam_tcmenable(void)
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/stm32/stm32_start.c
View File

@ -100,7 +100,7 @@ void __start(void) noinstrument_function;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/stm32f0l0g0/stm32_start.c
View File

@ -71,7 +71,7 @@ const uintptr_t g_idle_topstack = IDLE_STACK;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/stm32f7/stm32_start.c
View File

@ -144,7 +144,7 @@ static inline void stm32_tcmenable(void)
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/stm32h7/stm32_start.c
View File

@ -163,7 +163,7 @@ static inline void stm32_tcmenable(void)
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/stm32l4/stm32l4_start.c
View File

@ -108,7 +108,7 @@ void __start(void) noinstrument_function;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/stm32l5/stm32l5_start.c
View File

@ -110,7 +110,7 @@ void __start(void) noinstrument_function;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/stm32u5/stm32_start.c
View File

@ -110,7 +110,7 @@ void __start(void) noinstrument_function;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/tiva/cc13xx/cc13xx_start.c
View File

@ -101,7 +101,7 @@ void cc13xx_trim_device(void);
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/arm/src/tiva/common/lmxx_tm4c_start.c
View File

@ -92,7 +92,7 @@ const uintptr_t g_idle_topstack = HEAP_BASE;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

8
arch/arm/src/tlsr82/tlsr82_start.c
View File

@ -67,6 +67,14 @@ const uintptr_t g_idle_topstack = (uintptr_t)(&_ebss) +
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: ____tc32_start
*
* Description:
* This is the reset entry point.
*
****************************************************************************/
void __tc32_start(void)
{
tlsr82_cpu_wakeup_init(LDO_MODE, EXTERNAL_XTAL_24M);

2
arch/arm/src/xmc4/xmc4_start.c
View File

@ -156,7 +156,7 @@ static inline void xmc4_flash_waitstates(void)
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/or1k/src/mor1kx/mor1kx_start.c
View File

@ -73,7 +73,7 @@ const uint32_t g_idle_topstack = IDLE_STACK;
****************************************************************************/
/****************************************************************************
* Name: _start
* Name: __start
*
* Description:
* This is the reset entry point.

2
arch/risc-v/src/fe310/fe310_start.c
View File

@ -64,7 +64,7 @@ uintptr_t g_idle_topstack = FE310_IDLESTACK_TOP;
****************************************************************************/
/****************************************************************************
* Name: fe310_start
* Name: __fe310_start
****************************************************************************/
void __fe310_start(void)

2
arch/risc-v/src/k210/k210_start.c
View File

@ -59,7 +59,7 @@ uintptr_t g_idle_topstack = K210_IDLESTACK0_TOP;
****************************************************************************/
/****************************************************************************
* Name: k210_start
* Name: __k210_start
****************************************************************************/
void __k210_start(uint32_t mhartid)

2
arch/risc-v/src/litex/litex_start.c
View File

@ -64,7 +64,7 @@ uintptr_t g_idle_topstack = LITEX_IDLESTACK_TOP;
****************************************************************************/
/****************************************************************************
* Name: litex_start
* Name: __litex_start
****************************************************************************/
void __litex_start(void)

2
drivers/can/mcp2515.c
View File

@ -298,7 +298,7 @@ static const struct can_ops_s g_mcp2515ops =
mcp2515_remoterequest, /* co_remoterequest */
mcp2515_send, /* co_send */
mcp2515_txready, /* co_txready */
mcp2515_txempty, /* co_txempty */
mcp2515_txempty /* co_txempty */
};
/****************************************************************************