From 10069067c16de1d8114cb5b76688fe4799ce2db2 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 3 Aug 2018 08:51:55 -0600 Subject: [PATCH] include/nuttx/i2c/i2c_master.h: Rename I2C_M_NORESTART to I2C_M_NOSTART since it may be used in other contexts than a repeated start. Add comments to clarilfy setup for repeated start. --- arch/arm/src/efm32/efm32_i2c.c | 2 +- arch/arm/src/kinetis/kinetis_i2c.c | 4 ++-- arch/arm/src/lc823450/lc823450_i2c.c | 2 +- arch/arm/src/lc823450/lc823450_ipl2.c | 6 +++--- arch/arm/src/lpc54xx/lpc54_i2c_master.c | 4 ++-- arch/arm/src/samv7/sam_twihs.c | 6 +++--- arch/arm/src/stm32/stm32_i2c.c | 2 +- arch/arm/src/stm32/stm32_i2c_alt.c | 2 +- arch/arm/src/stm32/stm32f30xxx_i2c.c | 2 +- arch/arm/src/stm32/stm32f40xxx_i2c.c | 10 +++++----- arch/arm/src/stm32f0/stm32f0_i2c.c | 2 +- arch/arm/src/stm32f7/stm32_i2c.c | 12 ++++++------ arch/arm/src/stm32l4/stm32l4_i2c.c | 14 +++++++------- arch/arm/src/tiva/tiva_i2c.c | 2 +- arch/z80/src/ez80/ez80_i2c.c | 4 ++-- arch/z80/src/z8/z8_i2c.c | 4 ++-- drivers/eeprom/i2c_xx24xx.c | 2 +- drivers/i2c/i2c_writeread.c | 11 ++++++----- drivers/input/cypress_mbr3108.c | 2 +- drivers/input/mxt.c | 2 +- drivers/lcd/ssd1306_i2c.c | 2 +- drivers/sensors/hts221.c | 2 +- drivers/sensors/lis2dh.c | 2 +- drivers/sensors/lis331dl.c | 2 +- drivers/sensors/lps25h.c | 2 +- drivers/sensors/max44009.c | 2 +- drivers/sensors/sht21.c | 2 +- drivers/timers/cs2100-cp.c | 2 +- include/nuttx/i2c/i2c_master.h | 24 ++++++++++++++++++++---- 29 files changed, 76 insertions(+), 59 deletions(-) diff --git a/arch/arm/src/efm32/efm32_i2c.c b/arch/arm/src/efm32/efm32_i2c.c index 4b44f239b4..29a3c56b38 100644 --- a/arch/arm/src/efm32/efm32_i2c.c +++ b/arch/arm/src/efm32/efm32_i2c.c @@ -1155,7 +1155,7 @@ static int efm32_i2c_isr_process(struct efm32_i2c_priv_s *priv) /* Send byte continue with/without restart ? */ - if (!(priv->flags & I2C_M_NORESTART)) + if (!(priv->flags & I2C_M_NOSTART)) { priv->i2c_state = I2CSTATE_RSTARTADDRSEND; continue; diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index 1a7af792a8..5e3c51932f 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -1159,7 +1159,7 @@ static int kinetis_i2c_transfer(struct i2c_master_s *dev, * the same type as the current one, we can avoid the restart */ - if ((nextmsg->flags & I2C_M_NORESTART) && + if ((nextmsg->flags & I2C_M_NOSTART) && nextmsg->addr == priv->msgs->addr && nextmsg->frequency == priv->msgs->frequency && (nextmsg->flags & I2C_M_READ) == (priv->msgs->flags & I2C_M_READ)) @@ -1174,7 +1174,7 @@ static int kinetis_i2c_transfer(struct i2c_master_s *dev, * be correctly used here). */ - if (!(priv->msgs->flags & I2C_M_NORESTART)) + if (!(priv->msgs->flags & I2C_M_NOSTART)) { /* Initiate the transfer, in case restart is required */ diff --git a/arch/arm/src/lc823450/lc823450_i2c.c b/arch/arm/src/lc823450/lc823450_i2c.c index 517280f7f3..9d1c130791 100644 --- a/arch/arm/src/lc823450/lc823450_i2c.c +++ b/arch/arm/src/lc823450/lc823450_i2c.c @@ -739,7 +739,7 @@ static int lc823450_i2c_poll(FAR struct lc823450_i2c_priv_s *priv) i2cinfo("other message remaining (msgc=%d)\n", priv->msgc); - if (priv->msgv->flags & I2C_M_NORESTART) + if (priv->msgv->flags & I2C_M_NOSTART) { /* In this case, we don't have to restart using START condition. */ diff --git a/arch/arm/src/lc823450/lc823450_ipl2.c b/arch/arm/src/lc823450/lc823450_ipl2.c index 0ba8268e92..09168bf818 100644 --- a/arch/arm/src/lc823450/lc823450_ipl2.c +++ b/arch/arm/src/lc823450/lc823450_ipl2.c @@ -476,14 +476,14 @@ static void chg_disable(void) struct i2c_msg_s msg[2] = { { - .addr = R2A20056BM_ADDR, + .addr = R2A20056BM_ADDR, .flags = 0, .buffer = (uint8_t *)&addr, .length = 1, }, { - .addr = R2A20056BM_ADDR, - .flags = I2C_M_NORESTART, + .addr = R2A20056BM_ADDR, + .flags = I2C_M_NOSTART, .buffer = (uint8_t *)&data, .length = 1, } diff --git a/arch/arm/src/lpc54xx/lpc54_i2c_master.c b/arch/arm/src/lpc54xx/lpc54_i2c_master.c index 05d171a597..7de42790c6 100644 --- a/arch/arm/src/lpc54xx/lpc54_i2c_master.c +++ b/arch/arm/src/lpc54xx/lpc54_i2c_master.c @@ -391,7 +391,7 @@ static void lpc54_i2c_xfrsetup(struct lpc54_i2cdev_s *priv) /* Select the initial state */ - if ((msg->flags & I2C_M_NORESTART) != 0) + if ((msg->flags & I2C_M_NOSTART) != 0) { /* Start condition will be ommited. Begin the tranfer in the data * phase. @@ -662,7 +662,7 @@ static bool lpc54_i2c_statemachine(struct lpc54_i2cdev_s *priv) */ nextmsg = msg + 1; - dostop = ((nextmsg->flags & I2C_M_NORESTART) != 0); + dostop = ((nextmsg->flags & I2C_M_NOSTART) != 0); } if (dostop) diff --git a/arch/arm/src/samv7/sam_twihs.c b/arch/arm/src/samv7/sam_twihs.c index 6c2d36b291..d559f86ad4 100644 --- a/arch/arm/src/samv7/sam_twihs.c +++ b/arch/arm/src/samv7/sam_twihs.c @@ -601,7 +601,7 @@ static int twi_interrupt(int irq, FAR void *context, FAR void *arg) * restart? */ - if (priv->msgc <= 1 || (next->flags & I2C_M_NORESTART) == 0) + if (priv->msgc <= 1 || (next->flags & I2C_M_NOSTART) == 0) { /* The transfer is complete. Disable the RXRDY interrupt and * enable the TXCOMP interrupt @@ -634,7 +634,7 @@ static int twi_interrupt(int irq, FAR void *context, FAR void *arg) * restart? */ - if (priv->msgc <= 1 || (next->flags & I2C_M_NORESTART) == 0) + if (priv->msgc <= 1 || (next->flags & I2C_M_NOSTART) == 0) { /* This is the last message OR a restart is required before * the next mesage. Send the stop signal. @@ -688,7 +688,7 @@ static int twi_interrupt(int irq, FAR void *context, FAR void *arg) * restart? */ - if (priv->msgc <= 1 || (next->flags & I2C_M_NORESTART) == 0) + if (priv->msgc <= 1 || (next->flags & I2C_M_NOSTART) == 0) { /* The transfer is complete. Disable the TXRDY interrupt and * enable the TXCOMP interrupt diff --git a/arch/arm/src/stm32/stm32_i2c.c b/arch/arm/src/stm32/stm32_i2c.c index 9e2454c278..185629cffb 100644 --- a/arch/arm/src/stm32/stm32_i2c.c +++ b/arch/arm/src/stm32/stm32_i2c.c @@ -1375,7 +1375,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) if (priv->msgc > 0 && priv->msgv != NULL) { - if (priv->msgv->flags & I2C_M_NORESTART) + if (priv->msgv->flags & I2C_M_NOSTART) { stm32_i2c_traceevent(priv, I2CEVENT_BTFNOSTART, priv->msgc); priv->ptr = priv->msgv->buffer; diff --git a/arch/arm/src/stm32/stm32_i2c_alt.c b/arch/arm/src/stm32/stm32_i2c_alt.c index 26e154522a..686949ada4 100644 --- a/arch/arm/src/stm32/stm32_i2c_alt.c +++ b/arch/arm/src/stm32/stm32_i2c_alt.c @@ -1601,7 +1601,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) * do nothing. */ - else if (priv->msgc > 0 && ((priv->msgv->flags & I2C_M_NORESTART) != 0)) + else if (priv->msgc > 0 && ((priv->msgv->flags & I2C_M_NOSTART) != 0)) { /* Set condition to get to next message */ diff --git a/arch/arm/src/stm32/stm32f30xxx_i2c.c b/arch/arm/src/stm32/stm32f30xxx_i2c.c index 2f51c81bba..3fcf283f2e 100644 --- a/arch/arm/src/stm32/stm32f30xxx_i2c.c +++ b/arch/arm/src/stm32/stm32f30xxx_i2c.c @@ -1399,7 +1399,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) if (priv->msgc > 0) { - if (priv->msgv->flags & I2C_M_NORESTART) + if (priv->msgv->flags & I2C_M_NOSTART) { stm32_i2c_traceevent(priv, I2CEVENT_BTFNOSTART, priv->msgc); priv->ptr = priv->msgv->buffer; diff --git a/arch/arm/src/stm32/stm32f40xxx_i2c.c b/arch/arm/src/stm32/stm32f40xxx_i2c.c index fcef4d3b79..cfe3002220 100644 --- a/arch/arm/src/stm32/stm32f40xxx_i2c.c +++ b/arch/arm/src/stm32/stm32f40xxx_i2c.c @@ -1315,8 +1315,8 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) * return the error to the waiting task. */ - if (((priv->msgv[0].flags & I2C_M_NORESTART) != 0 && (status & I2C_SR1_TXE) == 0) || - ((priv->msgv[0].flags & I2C_M_NORESTART) == 0 && (status & I2C_SR1_SB) == 0)) + if (((priv->msgv[0].flags & I2C_M_NOSTART) != 0 && (status & I2C_SR1_TXE) == 0) || + ((priv->msgv[0].flags & I2C_M_NOSTART) == 0 && (status & I2C_SR1_SB) == 0)) { #if defined(CONFIG_STM32_I2C_DMA) || defined(CONFIG_I2C_POLLED) return OK; @@ -1778,7 +1778,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) { #ifndef CONFIG_I2C_POLLED if (priv->dcnt == 1 && - (priv->msgc == 0 || (priv->msgv->flags & I2C_M_NORESTART) == 0)) + (priv->msgc == 0 || (priv->msgv->flags & I2C_M_NOSTART) == 0)) { stm32_i2c_modifyreg(priv, STM32_I2C_CR2_OFFSET, I2C_CR2_ITBUFEN, 0); } @@ -1807,13 +1807,13 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) #ifndef CONFIG_I2C_POLLED if (((status & I2C_SR1_ADDR) != 0 && priv->dcnt > 0) || - (priv->msgc > 0 && (priv->msgv->flags & I2C_M_NORESTART) != 0)) + (priv->msgc > 0 && (priv->msgv->flags & I2C_M_NOSTART) != 0)) { stm32_i2c_modifyreg(priv, STM32_I2C_CR2_OFFSET, 0, I2C_CR2_ITBUFEN); } #endif if (priv->dcnt == 0 && - priv->msgc > 0 && (priv->msgv->flags & I2C_M_NORESTART) != 0) + priv->msgc > 0 && (priv->msgv->flags & I2C_M_NOSTART) != 0) { /* Set condition to get to next message */ diff --git a/arch/arm/src/stm32f0/stm32f0_i2c.c b/arch/arm/src/stm32f0/stm32f0_i2c.c index 32b4842b8a..f82c5e33ec 100644 --- a/arch/arm/src/stm32f0/stm32f0_i2c.c +++ b/arch/arm/src/stm32f0/stm32f0_i2c.c @@ -1371,7 +1371,7 @@ static int stm32f0_i2c_isr_process(struct stm32f0_i2c_priv_s *priv) if (priv->msgc > 0) { - if (priv->msgv->flags & I2C_M_NORESTART) + if (priv->msgv->flags & I2C_M_NOSTART) { stm32f0_i2c_traceevent(priv, I2CEVENT_BTFNOSTART, priv->msgc); priv->ptr = priv->msgv->buffer; diff --git a/arch/arm/src/stm32f7/stm32_i2c.c b/arch/arm/src/stm32f7/stm32_i2c.c index ef33b706c9..7a232d7f8f 100644 --- a/arch/arm/src/stm32f7/stm32_i2c.c +++ b/arch/arm/src/stm32f7/stm32_i2c.c @@ -83,7 +83,7 @@ * All supported features have been tested and found to be operational. * * Although the RELOAD capability has been tested as it was required to - * implement the I2C_M_NORESTART flag on F3 hardware, the associated + * implement the I2C_M_NOSTART flag on F3 hardware, the associated * logic to support the transfer messages with more than 255 byte * payloads has not been tested as the author lacked access to a real * device supporting these types of transfers. @@ -1439,7 +1439,7 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv) * The following flags can be used to override this behavior as follows: * * - I2C_M_READ: Sets the transfer direction to READ (R/W bit = 1) - * - I2C_M_NORESTART: Prevents a RESTART from being issued prior to the + * - I2C_M_NOSTART: Prevents a RESTART from being issued prior to the * transfer of the message (where allowed by the protocol). * */ @@ -1448,7 +1448,7 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv) priv->dcnt = priv->msgv->length; priv->flags = priv->msgv->flags; - if ((priv->flags & I2C_M_NORESTART) == 0) + if ((priv->flags & I2C_M_NOSTART) == 0) { /* Flag the first byte as an address byte */ @@ -1466,7 +1466,7 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv) if (priv->msgc > 0) { - next_norestart = (((priv->msgv + 1)->flags & I2C_M_NORESTART) != 0); + next_norestart = (((priv->msgv + 1)->flags & I2C_M_NOSTART) != 0); } if (next_norestart || priv->dcnt > 255) @@ -1890,7 +1890,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) * * The fact that the hardware must either RESTART or STOP when a TC * event occurs explains why, when messages must be sent back to back - * (i.e. without a restart by specifying the I2C_M_NORESTART flag), + * (i.e. without a restart by specifying the I2C_M_NOSTART flag), * RELOAD mode must be enabled and TCR event(s) must be generated * instead. See the TCR handler for more. */ @@ -1969,7 +1969,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv) * * 1) We're trying to send a message with a payload greater than 255 bytes. * 2) We're trying to send messages back to back, regardless of their - * payload size, to avoid a RESTART (i.e. I2C_M_NORESTART flag is set). + * payload size, to avoid a RESTART (i.e. I2C_M_NOSTART flag is set). * * These conditions may be true simultaneously, as would be the case if * we're sending multiple messages with payloads > 255 bytes. So we only diff --git a/arch/arm/src/stm32l4/stm32l4_i2c.c b/arch/arm/src/stm32l4/stm32l4_i2c.c index e9d231d462..a50bc0aaa6 100644 --- a/arch/arm/src/stm32l4/stm32l4_i2c.c +++ b/arch/arm/src/stm32l4/stm32l4_i2c.c @@ -84,7 +84,7 @@ * - Multiple instances (shared bus) * - Interrupt based operation * - RELOAD support - * - I2C_M_NORESTART support + * - I2C_M_NOSTART support * * Test Environment: * - STM32L451CEU6 based board with I2C slaves LIS2DH accelerometer and @@ -111,7 +111,7 @@ * All supported features have been tested and found to be operational. * * Although the RELOAD capability has been tested as it was required to - * implement the I2C_M_NORESTART flag on F3 hardware, the associated + * implement the I2C_M_NOSTART flag on F3 hardware, the associated * logic to support the transfer messages with more than 255 byte * payloads has not been tested as the author lacked access to a real * device supporting these types of transfers. @@ -1568,7 +1568,7 @@ static inline void stm32l4_i2c_sendstart(FAR struct stm32l4_i2c_priv_s *priv) * The following flags can be used to override this behavior as follows: * * - I2C_M_READ: Sets the transfer direction to READ (R/W bit = 1) - * - I2C_M_NORESTART: Prevents a RESTART from being issued prior to the + * - I2C_M_NOSTART: Prevents a RESTART from being issued prior to the * transfer of the message (where allowed by the protocol). * */ @@ -1577,7 +1577,7 @@ static inline void stm32l4_i2c_sendstart(FAR struct stm32l4_i2c_priv_s *priv) priv->dcnt = priv->msgv->length; priv->flags = priv->msgv->flags; - if ((priv->flags & I2C_M_NORESTART) != 0) + if ((priv->flags & I2C_M_NOSTART) != 0) { /* Flag the first byte as an address byte */ @@ -1595,7 +1595,7 @@ static inline void stm32l4_i2c_sendstart(FAR struct stm32l4_i2c_priv_s *priv) if (priv->msgc > 0) { - next_norestart = (((priv->msgv + 1)->flags & I2C_M_NORESTART) != 0); + next_norestart = (((priv->msgv + 1)->flags & I2C_M_NOSTART) != 0); } if (next_norestart || priv->dcnt > 255) @@ -2019,7 +2019,7 @@ static int stm32l4_i2c_isr_process(struct stm32l4_i2c_priv_s *priv) * * The fact that the hardware must either RESTART or STOP when a TC * event occurs explains why, when messages must be sent back to back - * (i.e. without a restart by specifying the I2C_M_NORESTART flag), + * (i.e. without a restart by specifying the I2C_M_NOSTART flag), * RELOAD mode must be enabled and TCR event(s) must be generated * instead. See the TCR handler for more. */ @@ -2098,7 +2098,7 @@ static int stm32l4_i2c_isr_process(struct stm32l4_i2c_priv_s *priv) * * 1) We're trying to send a message with a payload greater than 255 bytes. * 2) We're trying to send messages back to back, regardless of their - * payload size, to avoid a RESTART (i.e. I2C_M_NORESTART flag is set). + * payload size, to avoid a RESTART (i.e. I2C_M_NOSTART flag is set). * * These conditions may be true simultaneously, as would be the case if * we're sending multiple messages with payloads > 255 bytes. So we only diff --git a/arch/arm/src/tiva/tiva_i2c.c b/arch/arm/src/tiva/tiva_i2c.c index 608506e4fe..c0aec12976 100644 --- a/arch/arm/src/tiva/tiva_i2c.c +++ b/arch/arm/src/tiva/tiva_i2c.c @@ -1308,7 +1308,7 @@ static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status) */ tiva_i2c_traceevent(priv, I2CEVENT_NEXTMSG, priv->msgc); - if ((priv->msgv->flags & I2C_M_NORESTART) != 0) + if ((priv->msgv->flags & I2C_M_NOSTART) != 0) { /* Just continue transferring data. In this case, * no STOP was sent at the end of the last message diff --git a/arch/z80/src/ez80/ez80_i2c.c b/arch/z80/src/ez80/ez80_i2c.c index a7b7403e67..1c30139ddb 100644 --- a/arch/z80/src/ez80/ez80_i2c.c +++ b/arch/z80/src/ez80/ez80_i2c.c @@ -872,13 +872,13 @@ static int ez80_i2c_transfer(FAR struct i2c_master_s *dev, /* No... Check if the next message should have a repeated start or * not. The conditions for NO repeated start are: * - * - I2C_M_NORESTART bit set + * - I2C_M_NOSTART bit set * - Same direction (I2C_M_READ) * - Same address (and I2C_M_TEN) */ next = &msgs[i + 1]; - if ((msg->flags & I2C_M_NORESTART) != 0 && + if ((msg->flags & I2C_M_NOSTART) != 0 && (msg->flags & (I2C_M_READ | I2C_M_TEN)) == (next->flags & (I2C_M_READ | I2C_M_TEN)) && msg->addr == next->addr) { diff --git a/arch/z80/src/z8/z8_i2c.c b/arch/z80/src/z8/z8_i2c.c index 599e6adb32..61f6fe734c 100644 --- a/arch/z80/src/z8/z8_i2c.c +++ b/arch/z80/src/z8/z8_i2c.c @@ -560,13 +560,13 @@ static int z8_i2c_transfer(FAR struct i2c_master_s *dev, /* No... Check if the next message should have a repeated start or * not. The conditions for NO repeated start are: * - * - I2C_M_NORESTART bit set + * - I2C_M_NOSTART bit set * - Same direction (I2C_M_READ) * - Same address (and I2C_M_TEN) */ next = &msgs[i + 1]; - if ((msg->flags & I2C_M_NORESTART) != 0 && + if ((msg->flags & I2C_M_NOSTART) != 0 && (msg->flags & (I2C_M_READ | I2C_M_TEN)) == (next->flags & (I2C_M_READ | I2C_M_TEN)) && msg->addr == next->addr) { diff --git a/drivers/eeprom/i2c_xx24xx.c b/drivers/eeprom/i2c_xx24xx.c index 3ad005c90c..6b002046de 100644 --- a/drivers/eeprom/i2c_xx24xx.c +++ b/drivers/eeprom/i2c_xx24xx.c @@ -285,7 +285,7 @@ static int ee24xx_writepage(FAR struct ee24xx_dev_s *eedev, uint32_t memaddr, msgs[1].frequency = msgs[0].frequency; msgs[1].addr = msgs[0].addr; - msgs[1].flags = I2C_M_NORESTART; + msgs[1].flags = I2C_M_NOSTART; msgs[1].buffer = (uint8_t*)buffer; msgs[1].length = len; diff --git a/drivers/i2c/i2c_writeread.c b/drivers/i2c/i2c_writeread.c index 7ffdbf9700..52887cc9c3 100644 --- a/drivers/i2c/i2c_writeread.c +++ b/drivers/i2c/i2c_writeread.c @@ -81,11 +81,13 @@ int i2c_writeread(FAR struct i2c_master_s *dev, DEBUGASSERT(config->addrlen == 10 || config->addrlen == 7); flags = (config->addrlen == 10) ? I2C_M_TEN : 0; - /* Format two messages: The first is a write */ + /* Format two messages: The first is a write which is never terminated + * with STOP condition. + */ msg[0].frequency = config->frequency, msg[0].addr = config->address; - msg[0].flags = flags; + msg[0].flags = flags | I2C_M_NOSTOP; msg[0].buffer = (FAR uint8_t *)wbuffer; /* Override const */ msg[0].length = wbuflen; @@ -95,13 +97,12 @@ int i2c_writeread(FAR struct i2c_master_s *dev, if (rbuflen > 0) { - msg[0].flags |= I2C_M_NOSTOP; msg[1].flags = (flags | I2C_M_READ); } else { - msg[1].flags = (flags | I2C_M_NORESTART); - rbuflen = -rbuflen; + msg[1].flags = (flags | I2C_M_NOSTART); + rbuflen = -rbuflen; } msg[1].frequency = config->frequency, diff --git a/drivers/input/cypress_mbr3108.c b/drivers/input/cypress_mbr3108.c index e91701e4db..dc103b8c68 100644 --- a/drivers/input/cypress_mbr3108.c +++ b/drivers/input/cypress_mbr3108.c @@ -266,7 +266,7 @@ static int mbr3108_i2c_write(FAR struct mbr3108_dev_s *dev, uint8_t reg, { .frequency = CONFIG_MBR3108_I2C_FREQUENCY, .addr = dev->addr, - .flags = I2C_M_NORESTART, + .flags = I2C_M_NOSTART, .buffer = (void *)buf, .length = buflen } diff --git a/drivers/input/mxt.c b/drivers/input/mxt.c index 60f897e282..9199af5764 100644 --- a/drivers/input/mxt.c +++ b/drivers/input/mxt.c @@ -415,7 +415,7 @@ static int mxt_putreg(FAR struct mxt_dev_s *priv, uint16_t regaddr, msg[1].frequency = priv->frequency; msg[1].addr = priv->lower->address; - msg[1].flags = I2C_M_NORESTART; + msg[1].flags = I2C_M_NOSTART; msg[1].buffer = (FAR uint8_t *)buffer; msg[1].length = buflen; diff --git a/drivers/lcd/ssd1306_i2c.c b/drivers/lcd/ssd1306_i2c.c index 82240ddf08..d4aa483b03 100644 --- a/drivers/lcd/ssd1306_i2c.c +++ b/drivers/lcd/ssd1306_i2c.c @@ -139,7 +139,7 @@ int ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len) msg[1].frequency = CONFIG_SSD1306_I2CFREQ; /* I2C frequency */ msg[1].addr = priv->addr; /* 7-bit address */ - msg[1].flags = I2C_M_NORESTART; /* Write transaction with no RESTART */ + msg[1].flags = I2C_M_NOSTART; /* Write transaction with no RESTART */ msg[1].buffer = data; /* Transfer from this address */ msg[1].length = len; /* Send the data, then STOP */ diff --git a/drivers/sensors/hts221.c b/drivers/sensors/hts221.c index 2c3ec4cfe3..6541d4291f 100644 --- a/drivers/sensors/hts221.c +++ b/drivers/sensors/hts221.c @@ -234,7 +234,7 @@ static int32_t hts221_write_reg8(FAR struct hts221_dev_s *priv, { .frequency = CONFIG_HTS221_I2C_FREQUENCY, .addr = priv->addr, - .flags = I2C_M_NORESTART, + .flags = I2C_M_NOSTART, .buffer = (FAR void *)&command[1], .length = 1 } diff --git a/drivers/sensors/lis2dh.c b/drivers/sensors/lis2dh.c index 9eb160c707..64de6dc899 100644 --- a/drivers/sensors/lis2dh.c +++ b/drivers/sensors/lis2dh.c @@ -1552,7 +1552,7 @@ static int lis2dh_access(FAR struct lis2dh_dev_s *dev, uint8_t subaddr, } else { - flags = I2C_M_NORESTART; + flags = I2C_M_NOSTART; length = -length; } diff --git a/drivers/sensors/lis331dl.c b/drivers/sensors/lis331dl.c index a88abbea7d..2ae6e21012 100644 --- a/drivers/sensors/lis331dl.c +++ b/drivers/sensors/lis331dl.c @@ -141,7 +141,7 @@ static int lis331dl_access(FAR struct lis331dl_dev_s *dev, uint8_t subaddr, } else { - flags = I2C_M_NORESTART; + flags = I2C_M_NOSTART; length = -length; } diff --git a/drivers/sensors/lps25h.c b/drivers/sensors/lps25h.c index 609e01c74d..dd47fd8428 100644 --- a/drivers/sensors/lps25h.c +++ b/drivers/sensors/lps25h.c @@ -290,7 +290,7 @@ static int lps25h_write_reg8(struct lps25h_dev_s *dev, uint8_t reg_addr, { .frequency = CONFIG_LPS25H_I2C_FREQUENCY, .addr = dev->addr, - .flags = I2C_M_NORESTART, + .flags = I2C_M_NOSTART, .buffer = (void *)&value, .length = 1 } diff --git a/drivers/sensors/max44009.c b/drivers/sensors/max44009.c index eaf6724934..569f6509eb 100644 --- a/drivers/sensors/max44009.c +++ b/drivers/sensors/max44009.c @@ -194,7 +194,7 @@ static int max44009_write_reg8(FAR struct max44009_dev_s *dev, { .frequency = CONFIG_MAX44009_I2C_FREQUENCY, .addr = dev->addr, - .flags = I2C_M_NORESTART, + .flags = I2C_M_NOSTART, .buffer = (void *)&command[1], .length = 1 } diff --git a/drivers/sensors/sht21.c b/drivers/sensors/sht21.c index 9190ea13b2..7a16714b10 100644 --- a/drivers/sensors/sht21.c +++ b/drivers/sensors/sht21.c @@ -179,7 +179,7 @@ static int sht21_access(FAR struct sht21_dev_s *priv, msg[1].frequency = CONFIG_SHT21_I2C_FREQUENCY; msg[1].addr = priv->addr; - msg[1].flags = read ? I2C_M_READ : I2C_M_NORESTART; + msg[1].flags = read ? I2C_M_READ : I2C_M_NOSTART; msg[1].buffer = reg_value; msg[1].length = len; diff --git a/drivers/timers/cs2100-cp.c b/drivers/timers/cs2100-cp.c index b73acaa41f..c00e01a4f6 100644 --- a/drivers/timers/cs2100-cp.c +++ b/drivers/timers/cs2100-cp.c @@ -135,7 +135,7 @@ static int cs2100_write_reg(FAR const struct cs2100_config_s *config, msga[1].frequency = config->i2cfreq; msgs[1].addr = config->i2caddr; - msgs[1].flags = I2C_M_NORESTART; + msgs[1].flags = I2C_M_NOSTART; msgs[1].buffer = ®val; msgs[1].length = 1; diff --git a/include/nuttx/i2c/i2c_master.h b/include/nuttx/i2c/i2c_master.h index 24bbf6c629..0b4a4b4e1d 100644 --- a/include/nuttx/i2c/i2c_master.h +++ b/include/nuttx/i2c/i2c_master.h @@ -73,13 +73,29 @@ #define I2C_READADDR10H(a) (I2C_ADDR10H(a) | I2C_READBIT) #define I2C_READADDR10L(a) I2C_ADDR10L(a) -/* Bit definitions for the flags field in struct i2c_msg_s */ +/* Bit definitions for the flags field in struct i2c_msg_s + * + * START/STOP Rules: + * + * 1. The lower half I2C driver will always issue the START condition at the + * beginning of a message unless I2C_M_NOSTART flat is set in the + * message. + * + * 2. The lower half I2C driver will always issue the STOP condition at the + * end of the messages unless: + * + * a. The I2C_M_NOSTOP flag is set in the message, OR + * b. The following message has the I2C_M_NOSTART flag set (meaning + * that following message is simply a continuation of the transfer). + * + * A proper I2C repeated start would then have I2C_M_NOSTOP set on msg[n] + * and I2C_M_NOSTART *not* set on msg[n+1]; + */ #define I2C_M_READ 0x0001 /* Read data, from slave to master */ #define I2C_M_TEN 0x0002 /* Ten bit address */ #define I2C_M_NOSTOP 0x0040 /* Message should not end with a STOP */ -#define I2C_M_NORESTART 0x0080 /* Message should not begin with - * (re-)START of transfer */ +#define I2C_M_NOSTART 0x0080 /* Message should not begin with a START */ /* I2C Character Driver IOCTL Commands **************************************/ /* The I2C driver is intended to support application testing of the I2C bus. @@ -153,7 +169,7 @@ * Public Types ****************************************************************************/ -/* The I2C vtable */ +/* The I2C lower half driver interface */ struct i2c_master_s; struct i2c_msg_s;