Kinetis Ethernet and Freedcom-K64F: PHY address was wrong. Modified driver to try all PHY addresses and then only fail if the driver cannot find a usable PHY address. MDIO pin must have an internal pull-up on the Freedom-K64F.

This commit is contained in:
Gregory Nutt 2016-07-12 13:46:27 -06:00
parent 74037a7951
commit 10667bd38a
9 changed files with 258 additions and 80 deletions

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@ -548,18 +548,27 @@ config KINETIS_ENETNTXBUFFERS
Number of Ethernet Tx buffers to use. The size of one buffer is Number of Ethernet Tx buffers to use. The size of one buffer is
determined by NET_BUFSIZE determined by NET_BUFSIZE
config KINETIS_ENETPHYADDR
int "PHY address"
default 1
---help---
MII/RMII address of the PHY
config KINETIS_ENETUSEMII config KINETIS_ENETUSEMII
bool "Use MII interface" bool "Use MII interface"
default n default n
---help--- ---help---
The the MII PHY interface. Default: Use RMII interface The the MII PHY interface. Default: Use RMII interface
config KINETIS_ENET_MDIOPULLUP
bool "MDIO pull-up"
default n
---help---
If there is no on-board pull-up resister on the MII/RMII MDIO line,
then this option may be selected in order to configure an internal
pull-up on MDIO.
config KINETIS_ENET_NORXER
bool "Suppress RXER"
default n
---help---
If selected, then the MII/RMII RXER output will be configured as a
GPIO and pulled low.
endmenu # Kinetis Ethernet Configuration endmenu # Kinetis Ethernet Configuration
menu "Kinetis SDHC Configuration" menu "Kinetis SDHC Configuration"

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@ -83,12 +83,12 @@
#define PIN_FTM0_CH1_1 (PIN_ALT3 | PIN_PORTA | PIN4) #define PIN_FTM0_CH1_1 (PIN_ALT3 | PIN_PORTA | PIN4)
#define PIN_NMI (PIN_ALT7 | PIN_PORTA | PIN4) #define PIN_NMI (PIN_ALT7 | PIN_PORTA | PIN4)
#define PIN_FTM0_CH2_1 (PIN_ALT3 | PIN_PORTA | PIN5) #define PIN_FTM0_CH2_1 (PIN_ALT3 | PIN_PORTA | PIN5)
#if 0 #ifdef CONFIG_KINETIS_ENET_NORXER
# define PIN_RMII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
# define PIN_MII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
#else
# define PIN_RMII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5) # define PIN_RMII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
# define PIN_MII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5) # define PIN_MII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
#else
# define PIN_RMII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
# define PIN_MII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
#endif #endif
#define PIN_CMP2_OUT_1 (PIN_ALT5 | PIN_PORTA | PIN5) #define PIN_CMP2_OUT_1 (PIN_ALT5 | PIN_PORTA | PIN5)
#define PIN_I2S0_RX_BCLK_1 (PIN_ALT6 | PIN_PORTA | PIN5) #define PIN_I2S0_RX_BCLK_1 (PIN_ALT6 | PIN_PORTA | PIN5)
@ -174,7 +174,11 @@
#define PIN_TSI0_CH0 (PIN_ANALOG | PIN_PORTB | PIN0) #define PIN_TSI0_CH0 (PIN_ANALOG | PIN_PORTB | PIN0)
#define PIN_I2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN0) #define PIN_I2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN0)
#define PIN_FTM1_CH0_3 (PIN_ALT3 | PIN_PORTB | PIN0) #define PIN_FTM1_CH0_3 (PIN_ALT3 | PIN_PORTB | PIN0)
#define PIN_RMII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0) #ifdef CONFIG_KINETIS_ENET_MDIOPULLUP
# define PIN_RMII0_MDIO (PIN_ALT4_PULLUP | PIN_PORTB | PIN0)
#else
# define PIN_RMII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0)
#endif
#define PIN_MII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0) #define PIN_MII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0)
#define PIN_FTM1_QD_PHA_3 (PIN_ALT6 | PIN_PORTB | PIN0) #define PIN_FTM1_QD_PHA_3 (PIN_ALT6 | PIN_PORTB | PIN0)
#define PIN_ADC0_SE9 (PIN_ANALOG | PIN_PORTB | PIN1) #define PIN_ADC0_SE9 (PIN_ANALOG | PIN_PORTB | PIN1)

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@ -398,14 +398,22 @@
#define PIN_MII0_COL (PIN_ALT4 | PIN_PORTA | PIN29) #define PIN_MII0_COL (PIN_ALT4 | PIN_PORTA | PIN29)
#define PIN_MII0_CRS (PIN_ALT4 | PIN_PORTA | PIN27) #define PIN_MII0_CRS (PIN_ALT4 | PIN_PORTA | PIN27)
#define PIN_MII0_MDC (PIN_ALT4 | PIN_PORTB | PIN1) #define PIN_MII0_MDC (PIN_ALT4 | PIN_PORTB | PIN1)
#define PIN_MII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0) #ifdef CONFIG_KINETIS_ENET_MDIOPULLUP
# define PIN_MII0_MDIO (PIN_ALT4_PULLUP | PIN_PORTB | PIN0)
#else
# define PIN_MII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0)
#endif
#define PIN_MII0_RXCLK (PIN_ALT4 | PIN_PORTA | PIN11) #define PIN_MII0_RXCLK (PIN_ALT4 | PIN_PORTA | PIN11)
#define PIN_MII0_RXD0 (PIN_ALT4 | PIN_PORTA | PIN13) #define PIN_MII0_RXD0 (PIN_ALT4 | PIN_PORTA | PIN13)
#define PIN_MII0_RXD1 (PIN_ALT4 | PIN_PORTA | PIN12) #define PIN_MII0_RXD1 (PIN_ALT4 | PIN_PORTA | PIN12)
#define PIN_MII0_RXD2 (PIN_ALT4 | PIN_PORTA | PIN10) #define PIN_MII0_RXD2 (PIN_ALT4 | PIN_PORTA | PIN10)
#define PIN_MII0_RXD3 (PIN_ALT4 | PIN_PORTA | PIN9) #define PIN_MII0_RXD3 (PIN_ALT4 | PIN_PORTA | PIN9)
#define PIN_MII0_RXDV (PIN_ALT4 | PIN_PORTA | PIN14) #define PIN_MII0_RXDV (PIN_ALT4 | PIN_PORTA | PIN14)
#define PIN_MII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5) #ifdef CONFIG_KINETIS_ENET_NORXER
# define PIN_MII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
#else
# define PIN_MII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
#endif
#define PIN_MII0_TXCLK (PIN_ALT4 | PIN_PORTA | PIN25) #define PIN_MII0_TXCLK (PIN_ALT4 | PIN_PORTA | PIN25)
#define PIN_MII0_TXD0 (PIN_ALT4 | PIN_PORTA | PIN16) #define PIN_MII0_TXD0 (PIN_ALT4 | PIN_PORTA | PIN16)
#define PIN_MII0_TXD1 (PIN_ALT4 | PIN_PORTA | PIN17) #define PIN_MII0_TXD1 (PIN_ALT4 | PIN_PORTA | PIN17)
@ -427,10 +435,18 @@
#define PIN_RMII0_CRS_DV (PIN_ALT4 | PIN_PORTA | PIN14) #define PIN_RMII0_CRS_DV (PIN_ALT4 | PIN_PORTA | PIN14)
#define PIN_RMII0_MDC (PIN_ALT4 | PIN_PORTB | PIN1) #define PIN_RMII0_MDC (PIN_ALT4 | PIN_PORTB | PIN1)
#define PIN_RMII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0) #ifdef CONFIG_KINETIS_ENET_MDIOPULLUP
# define PIN_RMII0_MDIO (PIN_ALT4_PULLUP | PIN_PORTB | PIN0)
#else
# define PIN_RMII0_MDIO (PIN_ALT4 | PIN_PORTB | PIN0)
#endif
#define PIN_RMII0_RXD0 (PIN_ALT4 | PIN_PORTA | PIN13) #define PIN_RMII0_RXD0 (PIN_ALT4 | PIN_PORTA | PIN13)
#define PIN_RMII0_RXD1 (PIN_ALT4 | PIN_PORTA | PIN12) #define PIN_RMII0_RXD1 (PIN_ALT4 | PIN_PORTA | PIN12)
#define PIN_RMII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5) #ifdef CONFIG_KINETIS_ENET_NORXER
# define PIN_RMII0_RXER (GPIO_PULLDOWN | PIN_PORTA | PIN5)
#else
# define PIN_RMII0_RXER (PIN_ALT4 | PIN_PORTA | PIN5)
#endif
#define PIN_RMII0_TXD0 (PIN_ALT4 | PIN_PORTA | PIN16) #define PIN_RMII0_TXD0 (PIN_ALT4 | PIN_PORTA | PIN16)
#define PIN_RMII0_TXD1 (PIN_ALT4 | PIN_PORTA | PIN17) #define PIN_RMII0_TXD1 (PIN_ALT4 | PIN_PORTA | PIN17)
#define PIN_RMII0_TXEN (PIN_ALT4 | PIN_PORTA | PIN15) #define PIN_RMII0_TXEN (PIN_ALT4 | PIN_PORTA | PIN15)

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@ -193,6 +193,7 @@ struct kinetis_driver_s
uint8_t txtail; /* The oldest busy TX descriptor */ uint8_t txtail; /* The oldest busy TX descriptor */
uint8_t txhead; /* The next TX descriptor to use */ uint8_t txhead; /* The next TX descriptor to use */
uint8_t rxtail; /* The next RX descriptor to use */ uint8_t rxtail; /* The next RX descriptor to use */
uint8_t phyaddr; /* Selected PHY address */
WDOG_ID txpoll; /* TX poll timer */ WDOG_ID txpoll; /* TX poll timer */
WDOG_ID txtimeout; /* TX timeout timer */ WDOG_ID txtimeout; /* TX timeout timer */
struct enet_desc_s *txdesc; /* A pointer to the list of TX descriptor */ struct enet_desc_s *txdesc; /* A pointer to the list of TX descriptor */
@ -278,7 +279,7 @@ static int kinetis_writemii(struct kinetis_driver_s *priv, uint8_t phyaddr,
uint8_t regaddr, uint16_t data); uint8_t regaddr, uint16_t data);
static int kinetis_readmii(struct kinetis_driver_s *priv, uint8_t phyaddr, static int kinetis_readmii(struct kinetis_driver_s *priv, uint8_t phyaddr,
uint8_t regaddr, uint16_t *data); uint8_t regaddr, uint16_t *data);
static inline void kinetis_initphy(struct kinetis_driver_s *priv); static inline int kinetis_initphy(struct kinetis_driver_s *priv);
/* Initialization */ /* Initialization */
@ -954,6 +955,7 @@ static int kinetis_ifup(struct net_driver_s *dev)
(FAR struct kinetis_driver_s *)dev->d_private; (FAR struct kinetis_driver_s *)dev->d_private;
uint8_t *mac = dev->d_mac.ether_addr_octet; uint8_t *mac = dev->d_mac.ether_addr_octet;
uint32_t regval; uint32_t regval;
int ret;
ninfo("Bringing up: %d.%d.%d.%d\n", ninfo("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff, dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
@ -986,7 +988,12 @@ static int kinetis_ifup(struct net_driver_s *dev)
/* Configure the PHY */ /* Configure the PHY */
kinetis_initphy(priv); ret = kinetis_initphy(priv);
if (ret < 0)
{
nerr("ERROR: Failed to configure the PHY: %d\n", ret);
return ret;
}
/* Handle promiscuous mode */ /* Handle promiscuous mode */
@ -1253,7 +1260,7 @@ static int kinetis_ioctl(struct net_driver_s *dev, int cmd, long arg)
{ {
struct mii_ioctl_data_s *req = struct mii_ioctl_data_s *req =
(struct mii_ioctl_data_s *)((uintptr_t)arg); (struct mii_ioctl_data_s *)((uintptr_t)arg);
req->phy_id = CONFIG_KINETIS_ENETPHYADDR; req->phy_id = priv->phyaddr;
ret = OK; ret = OK;
} }
break; break;
@ -1418,6 +1425,7 @@ static int kinetis_readmii(struct kinetis_driver_s *priv, uint8_t phyaddr,
if (timeout >= MII_MAXPOLLS) if (timeout >= MII_MAXPOLLS)
{ {
nerr("ERROR: Timed out waiting for transfer to complete\n");
return -ETIMEDOUT; return -ETIMEDOUT;
} }
@ -1441,31 +1449,59 @@ static int kinetis_readmii(struct kinetis_driver_s *priv, uint8_t phyaddr,
* priv - Reference to the private ENET driver state structure * priv - Reference to the private ENET driver state structure
* *
* Returned Value: * Returned Value:
* None * Zero (OK) returned on success; a negated errno value is returned on any
* failure;
* *
* Assumptions: * Assumptions:
* *
****************************************************************************/ ****************************************************************************/
static inline void kinetis_initphy(struct kinetis_driver_s *priv) static inline int kinetis_initphy(struct kinetis_driver_s *priv)
{ {
uint32_t rcr; uint32_t rcr;
uint32_t tcr; uint32_t tcr;
uint16_t phydata; uint16_t phydata;
uint8_t phyaddr;
int retries;
int ret;
/* Loop (potentially infinitely?) until we successfully communicate with /* Loop (potentially infinitely?) until we successfully communicate with
* the PHY. * the PHY.
*/ */
do for (phyaddr = 0; phyaddr < 32; phyaddr++)
{ {
usleep(LINK_WAITUS); ninfo("%s: Try phyaddr: %u\n", BOARD_PHY_NAME, phyaddr);
phydata = 0xffff;
kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_PHYID1, &phydata); /* Try to read PHYID1 few times using this address */
}
while (phydata == 0xffff); retries = 0;
do
{
usleep(LINK_WAITUS);
ninfo("%s: Read PHYID1, retries=%d\n", BOARD_PHY_NAME, retries + 1);
phydata = 0xffff;
ret = kinetis_readmii(priv, phyaddr, MII_PHYID1, &phydata);
}
while (ret >= 0 && phydata == 0xffff && ++retries < 3);
/* If we successfully read anything then break out, using this PHY address */
if (retries < 3)
{
break;
}
}
if (phyaddr >= 32)
{
nerr("ERROR: Failed to read %s PHYID1 at any address\n");
return -ENOENT;
}
ninfo("%s: Using PHY address %u\n", BOARD_PHY_NAME, phyaddr);
priv->phyaddr = phyaddr;
#if CONFIG_DEBUG_NET_ERROR
/* Verify PHYID1. Compare OUI bits 3-18 */ /* Verify PHYID1. Compare OUI bits 3-18 */
ninfo("%s: PHYID1: %04x\n", BOARD_PHY_NAME, phydata); ninfo("%s: PHYID1: %04x\n", BOARD_PHY_NAME, phydata);
@ -1473,29 +1509,35 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv)
{ {
nerr("ERROR: PHYID1=%04x incorrect for %s. Expected %04x\n", nerr("ERROR: PHYID1=%04x incorrect for %s. Expected %04x\n",
phydata, BOARD_PHY_NAME, BOARD_PHYID1); phydata, BOARD_PHY_NAME, BOARD_PHYID1);
return -ENXIO;
} }
else
/* Read PHYID2 */
ret = kinetis_readmii(priv, phyaddr, MII_PHYID2, &phydata);
if (ret < 0)
{ {
/* Read PHYID2 */ nerr("ERROR: Failed to read %s PHYID2: %d\n", BOARD_PHY_NAME, ret);
return ret;
kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_PHYID2, &phydata); }
ninfo("%s: PHYID2: %04x\n", BOARD_PHY_NAME, phydata);
ninfo("%s: PHYID2: %04x\n", BOARD_PHY_NAME, phydata);
/* Verify PHYID2: Compare OUI bits 19-24 and the 6-bit model number
* (ignoring the 4-bit revision number). /* Verify PHYID2: Compare OUI bits 19-24 and the 6-bit model number
*/ * (ignoring the 4-bit revision number).
*/
if ((phydata & 0xfff0) != (BOARD_PHYID2 & 0xfff0))
{ if ((phydata & 0xfff0) != (BOARD_PHYID2 & 0xfff0))
nerr("ERROR: PHYID2=%04x incorrect for %s. Expected %04x\n", {
(phydata & 0xfff0), BOARD_PHY_NAME, (BOARD_PHYID2 & 0xfff0)); nerr("ERROR: PHYID2=%04x incorrect for %s. Expected %04x\n",
} (phydata & 0xfff0), BOARD_PHY_NAME, (BOARD_PHYID2 & 0xfff0));
return -ENXIO;
} }
#endif
/* Start auto negotiation */ /* Start auto negotiation */
kinetis_writemii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_MCR, ninfo("%s: Start autonegotiation...\n", BOARD_PHY_NAME);
kinetis_writemii(priv, phyaddr, MII_MCR,
(MII_MCR_ANRESTART | MII_MCR_ANENABLE)); (MII_MCR_ANRESTART | MII_MCR_ANENABLE));
/* Wait (potentially forever) for auto negotiation to complete */ /* Wait (potentially forever) for auto negotiation to complete */
@ -1503,16 +1545,30 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv)
do do
{ {
usleep(LINK_WAITUS); usleep(LINK_WAITUS);
kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_MSR, &phydata); ret = kinetis_readmii(priv, phyaddr, MII_MSR, &phydata);
if (ret < 0)
{
nerr("ERROR: Failed to read %s MII_MSR: %d\n",
BOARD_PHY_NAME, ret);
return ret;
}
} }
while ((phydata & MII_MSR_ANEGCOMPLETE) == 0); while ((phydata & MII_MSR_ANEGCOMPLETE) == 0);
ninfo("%s: Autonegotiation complete\n", BOARD_PHY_NAME);
ninfo("%s: MII_MSR: %04x\n", BOARD_PHY_NAME, phydata); ninfo("%s: MII_MSR: %04x\n", BOARD_PHY_NAME, phydata);
/* When we get here we have a link - Find the negotiated speed and duplex. */ /* When we get here we have a link - Find the negotiated speed and duplex. */
phydata = 0; phydata = 0;
kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, BOARD_PHY_STATUS, &phydata); ret = kinetis_readmii(priv, phyaddr, BOARD_PHY_STATUS, &phydata);
if (ret < 0)
{
nerr("ERROR: Failed to read %s BOARD_PHY_STATUS{%02x]: %d\n",
BOARD_PHY_NAME, BOARD_PHY_STATUS, ret);
return ret;
}
ninfo("%s: BOARD_PHY_STATUS: %04x\n", BOARD_PHY_NAME, phydata); ninfo("%s: BOARD_PHY_STATUS: %04x\n", BOARD_PHY_NAME, phydata);
@ -1540,29 +1596,42 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv)
{ {
/* Full duplex */ /* Full duplex */
ninfo("%s: Full duplex\n", BOARD_PHY_NAME);
tcr |= ENET_TCR_FDEN; tcr |= ENET_TCR_FDEN;
} }
else else
{ {
/* Half duplex */ /* Half duplex */
ninfo("%s: Half duplex\n", BOARD_PHY_NAME);
rcr |= ENET_RCR_DRT; rcr |= ENET_RCR_DRT;
} }
if (BOARD_PHY_10BASET(phydata)) if (BOARD_PHY_10BASET(phydata))
{ {
/* 10Mbps */ /* 10 Mbps */
ninfo("%s: 10 Base-T\n", BOARD_PHY_NAME);
rcr |= ENET_RCR_RMII_10T; rcr |= ENET_RCR_RMII_10T;
} }
else if (!BOARD_PHY_100BASET(phydata)) else if (!BOARD_PHY_100BASET(phydata))
{ {
/* 100 Mbps */
ninfo("%s: 100 Base-T\n", BOARD_PHY_NAME);
}
else
{
/* This might happen if autonegotiation did not complete(?) */
nerr("ERROR: Neither 10- nor 100-BaseT reported: PHY STATUS=%04x\n", nerr("ERROR: Neither 10- nor 100-BaseT reported: PHY STATUS=%04x\n",
phydata); phydata);
return -EIO;
} }
putreg32(rcr, KINETIS_ENET_RCR); putreg32(rcr, KINETIS_ENET_RCR);
putreg32(tcr, KINETIS_ENET_TCR); putreg32(tcr, KINETIS_ENET_TCR);
return OK;
} }
/**************************************************************************** /****************************************************************************

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@ -134,35 +134,41 @@ Ethernet
------------ ----------------- -------------------------------------------- ------------ ----------------- --------------------------------------------
KSZ8081 Board Signal(s) K64F Pin KSZ8081 Board Signal(s) K64F Pin
Pin Signal Function Pin Signal Function pinmux Name
--- -------- ----------------- -------------------------------------------- --- -------- ----------------- --------------------------------------------
1 VDD_1V2 VDDPLL_1.2V --- 1 VDD_1V2 VDDPLL_1.2V --- ---
2 VDDA_3V3 VDDA_ENET --- 2 VDDA_3V3 VDDA_ENET --- ---
3 RXM ENET1_RX- --- 3 RXM ENET1_RX- --- ---
4 RXP ENET1_RX+ --- 4 RXP ENET1_RX+ --- ---
5 TXM ENET1_TX- --- 5 TXM ENET1_TX- --- ---
6 TXP ENET1_TX+ --- 6 TXP ENET1_TX+ --- ---
7 X0 RMII_XTAL0 --- 7 X0 RMII_XTAL0 --- ---
8 XI RMII_XTAL1 --- 8 XI RMII_XTAL1 --- ---
9 REXT --- ---, Apparently not connected 9 REXT --- ---, Apparently not connected ---
10 MDIO RMII0_MDIO PTB0/RMII0_MDIO 10 MDIO RMII0_MDIO PTB0/RMII0_MDIO PIN_RMII0_MDIO
11 MDC RMII0_MDC PTB1/RMII0_MDC 11 MDC RMII0_MDC PTB1/RMII0_MDC PIN_RMII0_MDC
12 RXD1 RMII0_RXD_1 PTA12/RMII0_RXD1 12 RXD1 RMII0_RXD_1 PTA12/RMII0_RXD1 PIN_RMII0_RXD1
13 RXD0 RMII0_RXD_0 PTA13/RMII0_RXD0 13 RXD0 RMII0_RXD_0 PTA13/RMII0_RXD0 PIN_RMII0_RXD0
14 VDDIO VDDIO_ENET --- 14 VDDIO VDDIO_ENET --- ---
15 CRS_DIV PTA14/RMII0_CRS_DV 15 CRS_DIV PTA14/RMII0_CRS_DV PIN_RMII0_CRS_DV
16 REF_CLK RMII_RXCLK PTA18/EXTAL0, PHY clock input 16 REF_CLK RMII_RXCLK PTA18/EXTAL0, PHY clock input ---
17 RXER RMII0_RXER PTA5/RMII0_RXER 17 RXER RMII0_RXER PTA5/RMII0_RXER PIN_RMII0_RXER
18 INTRP RMII0_INT_B, J14 Pin 2, Apparently not available unless jumpered 18 INTRP RMII0_INT_B, J14 Pin 2, Apparently not ---
PHY_INT_1 PHY_INT_1 available unless jumpered
19 TXEN RMII0_TXEN PTA15/RMII0_TXEN 19 TXEN RMII0_TXEN PTA15/RMII0_TXEN PIN_RMII0_TXEN
20 TXD0 RMII0_TXD_0 PTA16/RMII0_TXD0 20 TXD0 RMII0_TXD_0 PTA16/RMII0_TXD0 PIN_RMII0_TXD0
21 TXD1 RMII0_TXD_1 PTA17/RMII0_TXD1 21 TXD1 RMII0_TXD_1 PTA17/RMII0_TXD1 PIN_RMII0_TXD1
22 GND1 --- --- 22 GND1 --- --- ---
24 nRST PHY_RST_B --- 24 nRST PHY_RST_B --- ---
25 GND2 --- --- 25 GND2 --- --- ---
--- -------- ----------------- -------------------------------------------- --- -------- ----------------- --------------------------------------------
No external pullup is available on MDIO signal when MK64FN1M0VLL12 MCU is
requests status of the Ethernet link connection. Internal pullup is required
when port configuration for MDIO signal is enabled:
CONFIG_KINETIS_ENET_MDIOPULLUP=y
Development Environment Development Environment
======================= =======================
@ -400,6 +406,12 @@ Where <subdir> is one of the following:
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc) CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc)
CONFIG_INTELHEX_BINARY=y : Output formats: Intel hex binary CONFIG_INTELHEX_BINARY=y : Output formats: Intel hex binary
3. No external pullup is available on MDIO signal when MK64FN1M0VLL12 MCU
is requests status of the Ethernet link connection. Internal pullup is
required when port configuration for MDIO signal is enabled:
CONFIG_KINETIS_ENET_MDIOPULLUP=y
nsh: nsh:
--- ---
Configures the NuttShell (nsh) located at apps/examples/nsh using a Configures the NuttShell (nsh) located at apps/examples/nsh using a
@ -455,5 +467,13 @@ Status
NSH configuration is working and LEDs are working. The only odd NSH configuration is working and LEDs are working. The only odd
behavior that I see is that pressing SW3 causes an unexpected interrupt behavior that I see is that pressing SW3 causes an unexpected interrupt
error. error.
2016-07-12: Added support for the KSZ8081 PHY and added the netnsh 2016-07-12: Added support for the KSZ8081 PHY and added the netnsh
configuration. Untested as of this writing. configuration. The network is basically functional, but a lot more
testing is needed to confirm that.
In testing, I notice a strange thing. If I run at full optimization the
code runs (albeit with bugs-to-be-solved). But with no optimization or
even at -O1, the system fails to boot. This seems to be related to the
watchdog timer.

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@ -41,8 +41,9 @@
************************************************************************************/ ************************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
# include <stdint.h> # include <stdint.h>
#endif #endif
/************************************************************************************ /************************************************************************************

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@ -245,8 +245,9 @@ CONFIG_KINETIS_ENET=y
CONFIG_KINETIS_ENETNETHIFS=1 CONFIG_KINETIS_ENETNETHIFS=1
CONFIG_KINETIS_ENETNRXBUFFERS=6 CONFIG_KINETIS_ENETNRXBUFFERS=6
CONFIG_KINETIS_ENETNTXBUFFERS=2 CONFIG_KINETIS_ENETNTXBUFFERS=2
CONFIG_KINETIS_ENETPHYADDR=1
# CONFIG_KINETIS_ENETUSEMII is not set # CONFIG_KINETIS_ENETUSEMII is not set
CONFIG_KINETIS_ENET_MDIOPULLUP=y
# CONFIG_KINETIS_ENET_NORXER is not set
# #
# Kinetis UART Configuration # Kinetis UART Configuration
@ -759,7 +760,16 @@ CONFIG_FS_FAT=y
# CONFIG_FS_ROMFS is not set # CONFIG_FS_ROMFS is not set
# CONFIG_FS_TMPFS is not set # CONFIG_FS_TMPFS is not set
# CONFIG_FS_SMARTFS is not set # CONFIG_FS_SMARTFS is not set
# CONFIG_FS_PROCFS is not set CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
#
# Exclude individual procfs entries
#
# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
# CONFIG_FS_PROCFS_EXCLUDE_NET is not set
# CONFIG_FS_UNIONFS is not set # CONFIG_FS_UNIONFS is not set
# #
@ -1057,6 +1067,7 @@ CONFIG_NSH_MMCSDMINOR=0
CONFIG_NSH_CMDOPT_DF_H=y CONFIG_NSH_CMDOPT_DF_H=y
CONFIG_NSH_CODECS_BUFSIZE=128 CONFIG_NSH_CODECS_BUFSIZE=128
CONFIG_NSH_CMDOPT_HEXDUMP=y CONFIG_NSH_CMDOPT_HEXDUMP=y
CONFIG_NSH_PROC_MOUNTPOINT="/proc"
CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_FILEIOSIZE=512
# #

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@ -192,6 +192,8 @@ CONFIG_ARCH_FAMILY_K64=y
CONFIG_KINETIS_UART3=y CONFIG_KINETIS_UART3=y
# CONFIG_KINETIS_UART4 is not set # CONFIG_KINETIS_UART4 is not set
# CONFIG_KINETIS_UART5 is not set # CONFIG_KINETIS_UART5 is not set
# CONFIG_KINETIS_ENET is not set
# CONFIG_KINETIS_RNGB is not set
# CONFIG_KINETIS_FLEXCAN0 is not set # CONFIG_KINETIS_FLEXCAN0 is not set
# CONFIG_KINETIS_FLEXCAN1 is not set # CONFIG_KINETIS_FLEXCAN1 is not set
# CONFIG_KINETIS_SPI0 is not set # CONFIG_KINETIS_SPI0 is not set
@ -545,6 +547,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y
CONFIG_SYSLOG_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y
# CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_NONE is not set
# CONFIG_SYSLOG_FILE is not set # CONFIG_SYSLOG_FILE is not set
# CONFIG_SYSLOG_CHARDEV is not set
# #
# Networking Support # Networking Support
@ -584,7 +587,15 @@ CONFIG_FS_FAT=y
# CONFIG_FS_ROMFS is not set # CONFIG_FS_ROMFS is not set
# CONFIG_FS_TMPFS is not set # CONFIG_FS_TMPFS is not set
# CONFIG_FS_SMARTFS is not set # CONFIG_FS_SMARTFS is not set
# CONFIG_FS_PROCFS is not set CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
#
# Exclude individual procfs entries
#
# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
# CONFIG_FS_UNIONFS is not set # CONFIG_FS_UNIONFS is not set
# #
@ -829,7 +840,6 @@ CONFIG_NSH_DISABLE_LOSMART=y
# CONFIG_NSH_DISABLE_MV is not set # CONFIG_NSH_DISABLE_MV is not set
# CONFIG_NSH_DISABLE_MW is not set # CONFIG_NSH_DISABLE_MW is not set
# CONFIG_NSH_DISABLE_PS is not set # CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NSH_DISABLE_PSSTACKUSAGE is not set
# CONFIG_NSH_DISABLE_PUT is not set # CONFIG_NSH_DISABLE_PUT is not set
# CONFIG_NSH_DISABLE_PWD is not set # CONFIG_NSH_DISABLE_PWD is not set
# CONFIG_NSH_DISABLE_RM is not set # CONFIG_NSH_DISABLE_RM is not set
@ -853,6 +863,7 @@ CONFIG_NSH_MMCSDMINOR=0
CONFIG_NSH_CMDOPT_DF_H=y CONFIG_NSH_CMDOPT_DF_H=y
CONFIG_NSH_CODECS_BUFSIZE=128 CONFIG_NSH_CODECS_BUFSIZE=128
CONFIG_NSH_CMDOPT_HEXDUMP=y CONFIG_NSH_CMDOPT_HEXDUMP=y
CONFIG_NSH_PROC_MOUNTPOINT="/proc"
CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_FILEIOSIZE=512
# #

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@ -39,6 +39,7 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include <sys/mount.h>
#include <stdbool.h> #include <stdbool.h>
#include <stdio.h> #include <stdio.h>
#include <syslog.h> #include <syslog.h>
@ -59,6 +60,25 @@
****************************************************************************/ ****************************************************************************/
/* Configuration ************************************************************/ /* Configuration ************************************************************/
/* Automount procfs */
#define HAVE_PROC 1
#if !defined(CONFIG_FS_PROCFS)
# undef HAVE_PROC
#endif
#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT)
# warning Mountpoints disabled. No procfs support
# undef HAVE_PROC
#endif
#if defined(CONFIG_NSH_PROC_MOUNTPOINT)
# define PROCFS_MOUNTPOUNT CONFIG_NSH_PROC_MOUNTPOINT
#else
# define PROCFS_MOUNTPOUNT "/proc"
#endif
/* PORT and SLOT number probably depend on the board configuration */ /* PORT and SLOT number probably depend on the board configuration */
#ifdef CONFIG_ARCH_BOARD_FREEDOM_K64F #ifdef CONFIG_ARCH_BOARD_FREEDOM_K64F
@ -199,9 +219,24 @@ static int k64_cdinterrupt(int irq, FAR void *context)
int k64_bringup(void) int k64_bringup(void)
{ {
#ifdef NSH_HAVEMMCSD
int ret; int ret;
#ifdef HAVE_PROC
/* Mount the proc filesystem */
syslog(LOG_INFO, "Mounting procfs to /proc\n");
ret = mount(NULL, PROCFS_MOUNTPOUNT, "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to mount the PROC filesystem: %d (%d)\n",
ret, errno);
return ret;
}
#endif
#ifdef NSH_HAVEMMCSD
/* Configure GPIO pins */ /* Configure GPIO pins */
/* Attached the card detect interrupt (but don't enable it yet) */ /* Attached the card detect interrupt (but don't enable it yet) */
@ -249,6 +284,8 @@ int k64_bringup(void)
kinetis_pinirqenable(GPIO_SD_CARDDETECT); kinetis_pinirqenable(GPIO_SD_CARDDETECT);
#endif #endif
UNUSED(ret);
return OK; return OK;
} }