esp32c3: Add GPIO IRQ support.
The GPIO example was also extended to include testing an interrupt pin. Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com> Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
This commit is contained in:
Abdelatif Guettouche
Matias N
parent
4a42998f36
commit
10822799fb
@ -132,6 +132,7 @@
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/* ecall is dispatched like normal interrupts. It occupies an IRQ number. */
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#define ESP32C3_IRQ_ECALL_M 0
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#define RISCV_NIRQ_INTERRUPTS 1 /* Number of RISC-V dispatched interrupts. */
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#define ESP32C3_IRQ_FIRSTPERIPH 1 /* First peripheral IRQ number */
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/* Peripheral IRQs */
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@ -201,9 +202,24 @@
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#define ESP32C3_NIRQ_PERIPH ESP32C3_NPERIPHERALS
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/* Total number of IRQs: Number of peripheral IRQs + 1 for ecall. */
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/* Second level GPIO interrupts. GPIO interrupts are decoded and dispatched
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* as a second level of decoding: The first level dispatches to the GPIO
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* interrupt handler. The second to the decoded GPIO interrupt handler.
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*/
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#define NR_IRQS (ESP32C3_NIRQ_PERIPH + 1)
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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# define ESP32C3_NIRQ_GPIO 22
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# define ESP32C3_FIRST_GPIOIRQ (RISCV_NIRQ_INTERRUPTS + ESP32C3_NIRQ_PERIPH)
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# define ESP32C3_LAST_GPIOIRQ (ESP32C3_FIRST_GPIOIRQ + ESP32C3_NIRQ_GPIO - 1)
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# define ESP32C3_PIN2IRQ(p) ((p) + ESP32C3_FIRST_GPIOIRQ)
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# define ESP32C3_IRQ2PIN(i) ((i) - ESP32C3_FIRST_GPIOIRQ)
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#else
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# define ESP32C3_NIRQ_GPIO 0
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#endif
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/* Total number of IRQs: ecall + Number of peripheral IRQs + GPIOs IRQs. */
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#define NR_IRQS (RISCV_NIRQ_INTERRUPTS + ESP32C3_NIRQ_PERIPH + ESP32C3_NIRQ_GPIO)
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/****************************************************************************
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* Inline functions
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@ -104,6 +104,11 @@ config ESP32C3_CPU_FREQ_MHZ
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menu "ESP32-C3 Peripheral Support"
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config ESP32C3_GPIO_IRQ
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bool "GPIO pin interrupts"
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---help---
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Enable support for interrupting GPIO pins
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config ESP32C3_UART0
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bool "UART0"
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default y
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@ -1,5 +1,5 @@
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/****************************************************************************
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* arch/risc/src/esp32c3/esp32c3_gpio.c
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* arch/risc-v/src/esp32c3/esp32c3_gpio.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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@ -35,11 +35,75 @@
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#include <arch/esp32c3/chip.h>
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#include "riscv_arch.h"
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#include "esp32c3_irq.h"
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#include "hardware/esp32c3_iomux.h"
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#include "hardware/esp32c3_gpio.h"
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#include "esp32c3_gpio.h"
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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static int g_gpio_cpuint;
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: gpio_dispatch
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*
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* Description:
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* Second level dispatch for GPIO interrupt handling.
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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static void gpio_dispatch(int irq, uint32_t status, uint32_t *regs)
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{
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int i;
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int ndx = 0;
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/* Check set bits in the status register */
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while ((i = __builtin_ffs(status)))
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{
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ndx += i;
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irq_dispatch(irq + ndx - 1, regs);
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status >>= i;
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}
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}
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#endif
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/****************************************************************************
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* Name: gpio_interrupt
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*
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* Description:
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* GPIO interrupt handler.
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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static int gpio_interrupt(int irq, FAR void *context, FAR void *arg)
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{
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uint32_t status;
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/* Read and clear the lower GPIO interrupt status */
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status = getreg32(GPIO_STATUS_REG);
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putreg32(status, GPIO_STATUS_W1TC_REG);
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/* Dispatch pending interrupts in the lower GPIO status register */
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gpio_dispatch(ESP32C3_FIRST_GPIOIRQ, status, (uint32_t *)context);
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return OK;
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}
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -230,3 +294,118 @@ void esp32c3_gpio_matrix_out(uint32_t gpio, uint32_t signal_idx,
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putreg32(regval, regaddr);
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}
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/****************************************************************************
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* Name: esp32c3_gpioirqinitialize
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*
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* Description:
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* Initialize logic to support a second level of interrupt decoding for
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* GPIO pins.
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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void esp32c3_gpioirqinitialize(void)
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{
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int ret;
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/* Allocate a level-sensitive, priority 1 CPU interrupt */
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g_gpio_cpuint = esp32c3_request_irq(ESP32C3_PERIPH_GPIO, 1,
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ESP32C3_INT_LEVEL);
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DEBUGASSERT(g_gpio_cpuint > 0);
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up_disable_irq(g_gpio_cpuint);
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/* Attach and enable the IRQ */
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ret = irq_attach(ESP32C3_IRQ_GPIO, gpio_interrupt, NULL);
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if (ret == OK)
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{
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up_enable_irq(g_gpio_cpuint);
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}
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else
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{
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gpioerr("ERROR: GPIO interrupt not attached!\n");
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}
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gpioinfo("GPIO interrupt (%d) attached.\n", g_gpio_cpuint);
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}
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#endif
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/****************************************************************************
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* Name: esp32c3_gpioirqenable
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*
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* Description:
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* Enable the interrupt for specified GPIO IRQ
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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void esp32c3_gpioirqenable(int irq, gpio_intrtype_t intrtype)
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{
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uintptr_t regaddr;
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uint32_t regval;
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int pin;
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DEBUGASSERT(irq >= ESP32C3_FIRST_GPIOIRQ && irq <= ESP32C3_LAST_GPIOIRQ);
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/* Convert the IRQ number to a pin number */
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pin = ESP32C3_IRQ2PIN(irq);
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/* Disable the GPIO interrupt during the configuration. */
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up_disable_irq(g_gpio_cpuint);
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/* Get the address of the GPIO PIN register for this pin */
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regaddr = GPIO_REG(pin);
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regval = getreg32(regaddr);
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regval &= ~(GPIO_PIN_INT_ENA_M | GPIO_PIN_INT_TYPE_M);
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/* Set the pin ENA field. */
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regval |= (1 << GPIO_PIN0_INT_ENA_S);
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regval |= (intrtype << GPIO_PIN_INT_TYPE_S);
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putreg32(regval, regaddr);
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/* Configuration done. Re-enable the GPIO interrupt. */
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up_enable_irq(g_gpio_cpuint);
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}
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#endif
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/****************************************************************************
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* Name: esp32c3_gpioirqdisable
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*
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* Description:
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* Disable the interrupt for specified GPIO IRQ
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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void esp32c3_gpioirqdisable(int irq)
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{
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uintptr_t regaddr;
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uint32_t regval;
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int pin;
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DEBUGASSERT(irq >= ESP32C3_FIRST_GPIOIRQ && irq <= ESP32C3_LAST_GPIOIRQ);
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/* Convert the IRQ number to a pin number */
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pin = ESP32C3_IRQ2PIN(irq);
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/* Get the address of the GPIO PIN register for this pin */
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up_disable_irq(g_gpio_cpuint);
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regaddr = GPIO_REG(pin);
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regval = getreg32(regaddr);
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regval &= ~(GPIO_PIN_INT_ENA_M | GPIO_PIN_INT_TYPE_M);
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putreg32(regval, regaddr);
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up_enable_irq(g_gpio_cpuint);
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}
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#endif
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@ -76,6 +76,15 @@
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# define OUTPUT_FUNCTION_3 (OUTPUT_FUNCTION | FUNCTION_3)
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# define OUTPUT_FUNCTION_4 (OUTPUT_FUNCTION | FUNCTION_4)
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/* Interrupt type used with esp32c3_gpioirqenable() */
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#define DISABLED 0x00
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#define RISING 0x01
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#define FALLING 0x02
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#define CHANGE 0x03
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#define ONLOW 0x04
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#define ONHIGH 0x05
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/****************************************************************************
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* Public Types
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****************************************************************************/
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@ -85,6 +94,7 @@
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/* Must be big enough to hold the above encodings */
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typedef uint16_t gpio_pinattr_t;
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typedef uint8_t gpio_intrtype_t;
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/****************************************************************************
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* Public Data
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@ -159,6 +169,50 @@ void esp32c3_gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
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void esp32c3_gpio_matrix_out(uint32_t gpio, uint32_t signal_idx,
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bool out_inv, bool oen_inv);
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/****************************************************************************
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* Name: esp32c3_gpioirqinitialize
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*
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* Description:
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* Initialize logic to support a second level of interrupt decoding for
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* GPIO pins.
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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void esp32c3_gpioirqinitialize(void);
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#else
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# define esp32c3_gpioirqinitialize()
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#endif
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/****************************************************************************
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* Name: esp32c3_gpioirqenable
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*
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* Description:
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* Enable the interrupt for specified GPIO IRQ
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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void esp32c3_gpioirqenable(int irq, gpio_intrtype_t intrtype);
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#else
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# define esp32c3_gpioirqenable(irq,intrtype)
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#endif
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/****************************************************************************
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* Name: esp32c3_gpioirqdisable
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*
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* Description:
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* Disable the interrupt for specified GPIO IRQ
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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void esp32c3_gpioirqdisable(int irq);
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#else
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# define esp32c3_gpioirqdisable(irq)
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#endif
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#ifdef __cplusplus
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}
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#endif
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@ -40,6 +40,7 @@
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#include "esp32c3.h"
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#include "esp32c3_attr.h"
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#include "esp32c3_gpio.h"
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#include "esp32c3_irq.h"
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@ -96,6 +97,12 @@ void up_irqinitialize(void)
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irq_attach(ESP32C3_IRQ_ECALL_M, up_swint, NULL);
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#ifdef CONFIG_ESP32C3_GPIO_IRQ
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/* Initialize GPIO interrupt support */
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esp32c3_gpioirqinitialize();
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#endif
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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/* And finally, enable interrupts */
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@ -33,6 +33,26 @@
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#define GPIO_REG(io_num) (GPIO_PIN0_REG + ((io_num) * 0x4))
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#define GPIO_PIN_INT_ENA 0x0000001F
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#define GPIO_PIN_INT_ENA_M ((GPIO_PIN_INT_ENA_V)<<(GPIO_PIN_INT_ENA_S))
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#define GPIO_PIN_INT_ENA_V 0x0000001F
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#define GPIO_PIN_INT_ENA_S 13
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#define GPIO_PIN_CONFIG 0x00000003
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#define GPIO_PIN_CONFIG_M ((GPIO_PIN_CONFIG_V)<<(GPIO_PIN_CONFIG_S))
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#define GPIO_PIN_CONFIG_V 0x00000003
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#define GPIO_PIN_CONFIG_S 11
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#define GPIO_PIN_WAKEUP_ENABLE (BIT(10))
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#define GPIO_PIN_WAKEUP_ENABLE_M (BIT(10))
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#define GPIO_PIN_WAKEUP_ENABLE_V 0x1
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#define GPIO_PIN_WAKEUP_ENABLE_S 10
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#define GPIO_PIN_INT_TYPE 0x00000007
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#define GPIO_PIN_INT_TYPE_M ((GPIO_PIN_INT_TYPE_V)<<(GPIO_PIN_INT_TYPE_S))
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#define GPIO_PIN_INT_TYPE_V 0x00000007
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#define GPIO_PIN_INT_TYPE_S 7
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#define GPIO_PIN_CONFIG_MSB 12
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#define GPIO_PIN_CONFIG_LSB 11
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#define GPIO_PIN_CONFIG_MASK 0x00001800
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@ -53,13 +73,20 @@
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#define GPIO_PIN_INT_TYPE_GET(x) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB)
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#define GPIO_PIN_INT_TYPE_SET(x) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK)
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#define GPIO_PAD_DRIVER_ENABLE 1
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#define GPIO_PAD_DRIVER_DISABLE (~GPIO_PAD_DRIVER_ENABLE)
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#define GPIO_PIN_PAD_DRIVER_MSB 2
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#define GPIO_PIN_PAD_DRIVER_LSB 2
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#define GPIO_PIN_PAD_DRIVER_MASK 0x00000004
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#define GPIO_PIN_PAD_DRIVER_GET(x) (((x) & GPIO_PIN_PAD_DRIVER_MASK) >> GPIO_PIN_PAD_DRIVER_LSB)
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#define GPIO_PIN_PAD_DRIVER_SET(x) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK)
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#define GPIO_PIN_SYNC1_BYPASS 0x00000003
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#define GPIO_PIN_SYNC1_BYPASS_M ((GPIO_PIN0_SYNC1_BYPASS_V)<<(GPIO_PIN0_SYNC1_BYPASS_S))
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#define GPIO_PIN_SYNC1_BYPASS_V 0x3
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#define GPIO_PIN_SYNC1_BYPASS_S 3
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#define GPIO_PIN_PAD_DRIVER (BIT(2))
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#define GPIO_PIN_PAD_DRIVER_M (BIT(2))
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#define GPIO_PIN_PAD_DRIVER_V 0x1
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#define GPIO_PIN_PAD_DRIVER_S 2
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#define GPIO_PIN_SYNC2_BYPASS 0x00000003
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#define GPIO_PIN_SYNC2_BYPASS_M ((GPIO_PIN0_SYNC2_BYPASS_V)<<(GPIO_PIN0_SYNC2_BYPASS_S))
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#define GPIO_PIN_SYNC2_BYPASS_V 0x3
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#define GPIO_PIN_SYNC2_BYPASS_S 0
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#define GPIO_BT_SELECT_REG (DR_REG_GPIO_BASE + 0x0)
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@ -80,7 +80,9 @@ Configurations
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gpio
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____
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This is a test for the GPIO driver. It uses GPIO1 and GPIO2 as outputs.
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This is a test for the GPIO driver. It uses GPIO1 and GPIO2 as outputs and
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GPIO9 as an interrupt pin.
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At the nsh, we can turn the outputs on and off with the following:
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nsh> gpio -o 1 /dev/gpout0
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nsh> gpio -o 1 /dev/gpout1
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@ -88,6 +90,12 @@ Configurations
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nsh> gpio -o 0 /dev/gpout0
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nsh> gpio -o 0 /dev/gpout1
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We can use the interrupt pin to send a signal when the interrupt fires:
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nsh> gpio -w 14 /dev/gpint2
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The pin is configured as a rising edge interrupt, so after issuing the
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above command, connect it to 3.3V.
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Building and flashing
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=====================
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@ -17,18 +17,14 @@ CONFIG_ARCH_CHIP_ESP32C3WROOM02=y
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CONFIG_ARCH_INTERRUPTSTACK=1536
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CONFIG_ARCH_RISCV=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_BINFMT_DISABLE=y
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CONFIG_BOARD_LOOPSPERMSEC=15000
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CONFIG_BUILTIN=y
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CONFIG_DEV_GPIO=y
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CONFIG_DEV_ZERO=y
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CONFIG_DISABLE_MQUEUE=y
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CONFIG_ESP32C3_GPIO_IRQ=y
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CONFIG_EXAMPLES_GPIO=y
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CONFIG_EXAMPLES_HELLO=y
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CONFIG_EXAMPLES_HELLO_STACKSIZE=1024
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CONFIG_FS_PROCFS=y
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_INPUT=y
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CONFIG_INTELHEX_BINARY=y
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CONFIG_LIBC_PERROR_STDOUT=y
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CONFIG_LIBC_STRERROR=y
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@ -36,30 +32,18 @@ CONFIG_MAX_TASKS=8
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CONFIG_NFILE_DESCRIPTORS=6
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_DISABLE_CD=y
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CONFIG_NSH_DISABLE_CP=y
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CONFIG_NSH_DISABLE_IFUPDOWN=y
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CONFIG_NSH_DISABLE_MKDIR=y
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CONFIG_NSH_DISABLE_RM=y
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CONFIG_NSH_DISABLE_RMDIR=y
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CONFIG_NSH_DISABLE_UMOUNT=y
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CONFIG_NSH_FILEIOSIZE=64
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_READLINE=y
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CONFIG_NSH_STRERROR=y
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CONFIG_PREALLOC_TIMERS=0
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CONFIG_PTHREAD_STACK_DEFAULT=1536
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CONFIG_RAM_SIZE=16384
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CONFIG_RAM_START=0x80000000
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_WAITPID=y
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CONFIG_START_DAY=29
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CONFIG_START_MONTH=11
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CONFIG_START_YEAR=2019
|
||||
CONFIG_STDIO_DISABLE_BUFFERING=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_TASK_NAME_SIZE=12
|
||||
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536
|
||||
CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_USERMAIN_STACKSIZE=1536
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
||||
@ -32,6 +32,7 @@
|
||||
/* GPIO pins used by the GPIO Subsystem */
|
||||
|
||||
#define BOARD_NGPIOOUT 2 /* Amount of GPIO Output pins */
|
||||
#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
|
||||
|
||||
#endif /* __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_INCLUDE_BOARD_H */
|
||||
|
||||
|
||||
@ -30,6 +30,9 @@
|
||||
#include <assert.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
#include <arch/irq.h>
|
||||
|
||||
#include <nuttx/ioexpander/gpio.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
@ -38,6 +41,8 @@
|
||||
#include "esp32c3_gpio.h"
|
||||
#include "hardware/esp32c3_gpio_sigmap.h"
|
||||
|
||||
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
@ -47,7 +52,15 @@
|
||||
#define GPIO_OUT1 1
|
||||
#define GPIO_OUT2 2
|
||||
|
||||
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
|
||||
#if !defined(CONFIG_ESP32C3_GPIO_IRQ) && BOARD_NGPIOINT > 0
|
||||
# error "NGPIOINT is > 0 and GPIO interrupts aren't enabled"
|
||||
#endif
|
||||
|
||||
/* Interrupt pins. GPIO9 is used as an example, any other inputs could be
|
||||
* used.
|
||||
*/
|
||||
|
||||
#define GPIO_IRQPIN 9
|
||||
|
||||
/****************************************************************************
|
||||
* Private Types
|
||||
@ -59,6 +72,12 @@ struct esp32c3gpio_dev_s
|
||||
uint8_t id;
|
||||
};
|
||||
|
||||
struct esp32c3gpint_dev_s
|
||||
{
|
||||
struct esp32c3gpio_dev_s esp32c3gpio;
|
||||
pin_interrupt_t callback;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
@ -68,6 +87,13 @@ static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value);
|
||||
static int gpout_write(FAR struct gpio_dev_s *dev, bool value);
|
||||
#endif
|
||||
|
||||
#if BOARD_NGPIOINT > 0
|
||||
static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value);
|
||||
static int gpint_attach(FAR struct gpio_dev_s *dev,
|
||||
pin_interrupt_t callback);
|
||||
static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
@ -91,6 +117,25 @@ static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
|
||||
static struct esp32c3gpio_dev_s g_gpout[BOARD_NGPIOOUT];
|
||||
#endif
|
||||
|
||||
#if BOARD_NGPIOINT > 0
|
||||
static const struct gpio_operations_s gpint_ops =
|
||||
{
|
||||
.go_read = gpint_read,
|
||||
.go_write = NULL,
|
||||
.go_attach = gpint_attach,
|
||||
.go_enable = gpint_enable,
|
||||
};
|
||||
|
||||
/* This array maps the GPIO pins used as INTERRUPT INPUTS */
|
||||
|
||||
static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] =
|
||||
{
|
||||
GPIO_IRQPIN,
|
||||
};
|
||||
|
||||
static struct esp32c3gpint_dev_s g_gpint[BOARD_NGPIOINT];
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
@ -131,6 +176,103 @@ static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32c3gpio_interrupt
|
||||
****************************************************************************/
|
||||
|
||||
#if BOARD_NGPIOINT > 0
|
||||
static int esp32c3gpio_interrupt(int irq, void *context, void *arg)
|
||||
{
|
||||
FAR struct esp32c3gpint_dev_s *esp32c3gpint =
|
||||
(FAR struct esp32c3gpint_dev_s *)arg;
|
||||
|
||||
DEBUGASSERT(esp32c3gpint != NULL && esp32c3gpint->callback != NULL);
|
||||
gpioinfo("Interrupt! callback=%p\n", esp32c3gpint->callback);
|
||||
|
||||
esp32c3gpint->callback(&esp32c3gpint->esp32c3gpio.gpio,
|
||||
esp32c3gpint->esp32c3gpio.id);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpint_read
|
||||
****************************************************************************/
|
||||
|
||||
static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value)
|
||||
{
|
||||
FAR struct esp32c3gpint_dev_s *esp32c3gpint =
|
||||
(FAR struct esp32c3gpint_dev_s *)dev;
|
||||
|
||||
DEBUGASSERT(esp32c3gpint != NULL && value != NULL);
|
||||
DEBUGASSERT(esp32c3gpint->esp32c3gpio.id < BOARD_NGPIOINT);
|
||||
gpioinfo("Reading int pin...\n");
|
||||
|
||||
*value = esp32c3_gpioread(g_gpiointinputs[esp32c3gpint->esp32c3gpio.id]);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpint_attach
|
||||
****************************************************************************/
|
||||
|
||||
static int gpint_attach(FAR struct gpio_dev_s *dev,
|
||||
pin_interrupt_t callback)
|
||||
{
|
||||
FAR struct esp32c3gpint_dev_s *esp32c3gpint =
|
||||
(FAR struct esp32c3gpint_dev_s *)dev;
|
||||
int irq = ESP32C3_PIN2IRQ(g_gpiointinputs[esp32c3gpint->esp32c3gpio.id]);
|
||||
int ret;
|
||||
|
||||
gpioinfo("Attaching the callback\n");
|
||||
|
||||
/* Make sure the interrupt is disabled */
|
||||
|
||||
esp32c3_gpioirqdisable(irq);
|
||||
ret = irq_attach(irq,
|
||||
esp32c3gpio_interrupt,
|
||||
&g_gpint[esp32c3gpint->esp32c3gpio.id]);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
gpioinfo("Attach %p\n", callback);
|
||||
esp32c3gpint->callback = callback;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpint_enable
|
||||
****************************************************************************/
|
||||
|
||||
static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable)
|
||||
{
|
||||
FAR struct esp32c3gpint_dev_s *esp32c3gpint =
|
||||
(FAR struct esp32c3gpint_dev_s *)dev;
|
||||
int irq = ESP32C3_PIN2IRQ(g_gpiointinputs[esp32c3gpint->esp32c3gpio.id]);
|
||||
|
||||
if (enable)
|
||||
{
|
||||
if (esp32c3gpint->callback != NULL)
|
||||
{
|
||||
gpioinfo("Enabling the interrupt\n");
|
||||
|
||||
/* Configure the interrupt for rising edge */
|
||||
|
||||
esp32c3_gpioirqenable(irq, RISING);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
gpioinfo("Disable the interrupt\n");
|
||||
esp32c3_gpioirqdisable(irq);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
@ -164,6 +306,24 @@ int esp32c3_gpio_init(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if BOARD_NGPIOINT > 0
|
||||
for (i = 0; i < BOARD_NGPIOINT; i++)
|
||||
{
|
||||
/* Setup and register the GPIO pin */
|
||||
|
||||
g_gpint[i].esp32c3gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN;
|
||||
g_gpint[i].esp32c3gpio.gpio.gp_ops = &gpint_ops;
|
||||
g_gpint[i].esp32c3gpio.id = i;
|
||||
gpio_pin_register(&g_gpint[i].esp32c3gpio.gpio, pincount);
|
||||
|
||||
/* Configure the pins that will be used as interrupt input */
|
||||
|
||||
esp32c3_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_1 | PULLDOWN);
|
||||
|
||||
pincount++;
|
||||
}
|
||||
#endif
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user