procfs：add armv7-m cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
This commit is contained in:
liaoao
Xiang Xiao
parent
6ea3eb3ce2
commit
108c47c07b
@ -718,6 +718,7 @@ config ARCH_CORTEXM0
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config ARCH_ARMV7M
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bool
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default n
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select ARCH_HAVE_CPUINFO
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config ARCH_CORTEXM3
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bool
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@ -24,7 +24,7 @@ include common/Make.defs
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CMN_ASRCS += arm_exception.S arm_saveusercontext.S
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CMN_CSRCS += arm_busfault.c arm_cache.c arm_doirq.c
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CMN_CSRCS += arm_busfault.c arm_cache.c arm_cpuinfo.c arm_doirq.c
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CMN_CSRCS += arm_hardfault.c arm_initialstate.c arm_itm.c
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CMN_CSRCS += arm_memfault.c arm_perf.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
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158
arch/arm/src/armv7-m/arm_cpuinfo.c
Normal file
158
arch/arm/src/armv7-m/arm_cpuinfo.c
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@ -0,0 +1,158 @@
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/****************************************************************************
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* arch/arm/src/armv7-m/arm_cpuinfo.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/fs/procfs.h>
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#include <nuttx/arch.h>
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#include "arm_internal.h"
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#include "hwcap.h"
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#include "nvic.h"
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#if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_CPUINFO)
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* name: hwcap_extract_field
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****************************************************************************/
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static int hwcap_extract_field(uint32_t features, int field)
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{
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int feature;
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feature = (features >> field) & 0xf;
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if (feature > 7)
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feature -= 16;
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return feature;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* name: up_show_cpuinfo
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****************************************************************************/
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ssize_t up_show_cpuinfo(FAR char *buf, size_t buf_size, off_t file_off)
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{
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int i;
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uint32_t cpuid;
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for (i = 0; i < CONFIG_SMP_NCPUS; i++)
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{
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procfs_sprintf(buf, buf_size, &file_off, "processor\t: %d\n", i);
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procfs_sprintf(buf, buf_size, &file_off, "BogoMIPS\t: %u.%02u\n",
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(CONFIG_BOARD_LOOPSPERMSEC / 1000),
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(CONFIG_BOARD_LOOPSPERMSEC / 10) % 100);
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procfs_sprintf(buf, buf_size, &file_off, "cpu MHz\t\t: %lu.%02lu\n",
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up_perf_getfreq() / 1000000,
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(up_perf_getfreq() / 10000) % 100);
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/* CPU Features */
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procfs_sprintf(buf, buf_size, &file_off, "Features\t:");
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procfs_sprintf(buf, buf_size, &file_off, " %s %s",
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HWCAP_HALF, HWCAP_FAST_MULT);
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/* If the CPU supports LDREX/STREX and LDREXB/STREXB,
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* avoid advertising SWP; it may not be atomic with
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* multiprocessing cores.
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*/
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if (hwcap_extract_field(getreg32(NVIC_ISAR3), 12) <= 1 &&
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hwcap_extract_field(getreg32(NVIC_ISAR4), 20) < 3)
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{
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procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_SWP);
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}
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if (hwcap_extract_field(getreg32(NVIC_ISAR0), 24) == 1)
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#ifdef CONFIG_ARM_THUMB
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{
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procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_IDIVT);
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}
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procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_THUMB);
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#else
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{
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procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_IDIVA);
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}
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#endif
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#if defined(CONFIG_ARCH_CORTEXM4) || defined(CONFIG_ARCH_CORTEXM7)
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procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_EDSP);
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#endif
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#ifdef CONFIG_SCHED_THREAD_LOCAL
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procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_TLS);
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#endif
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/* LPAE implies atomic ldrd/strd instructions */
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if (hwcap_extract_field(getreg32(NVIC_ISAR2), 0) == 1)
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{
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procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_LPAE);
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}
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/* VFP Features */
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#if defined(CONFIG_ARCH_FPU)
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# ifdef CONFIG_ARCH_CORTEXM4
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procfs_sprintf(buf, buf_size, &file_off, " %s %s %s",
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HWCAP_VFPV4, HWCAP_FPSP, HWCAP_VFPV3D16);
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# elif defined(CONFIG_ARCH_CORTEXM7)
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procfs_sprintf(buf, buf_size, &file_off, " %s %s %s",
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HWCAP_FPV5, HWCAP_FPSP, HWCAP_VFPV3D16);
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# ifdef CONFIG_ARCH_DPFPU
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procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_FPDP);
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# endif
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# endif
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#endif
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/* Cpuid info */
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cpuid = getreg32(NVIC_CPUID_BASE);
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procfs_sprintf(buf, buf_size, &file_off,
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"\nmodel name\t: %s rev %" PRIx32 " (%s)\n"
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"CPU architecture: %s\n",
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"ARMv7-M", cpuid & 15, "v7ml", "7M");
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procfs_sprintf(buf, buf_size, &file_off,
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"CPU implementer\t: 0x%02" PRIx32 "\n"
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"CPU variant\t: 0x%" PRIx32 "\n"
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"CPU part\t: 0x%03" PRIx32 "\n"
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"CPU revision\t: %" PRIu32"\n\n",
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cpuid >> 24,
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(cpuid >> 20) & 0xf,
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(cpuid >> 4) & 0xfff,
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cpuid & 0xf);
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}
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return -file_off;
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}
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#endif /* CONFIG_FS_PROCFS && !CONFIG_FS_PROCFS_EXCLUDE_CPUINFO */
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69
arch/arm/src/common/hwcap.h
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69
arch/arm/src/common/hwcap.h
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@ -0,0 +1,69 @@
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/****************************************************************************
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* arch/arm/src/common/hwcap.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_COMMON_HWCAP_H
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#define __ARCH_ARM_SRC_COMMON_HWCAP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Hardware capabilities */
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#define HWCAP_SWP "swp" /* SWP instruction */
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#define HWCAP_HALF "half" /* Half word */
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#define HWCAP_THUMB "thumb" /* Thumb instruction set support */
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#define HWCAP_26BIT "26bit" /* Play it safe */
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#define HWCAP_FAST_MULT "fastmult" /* Long multiply such as umull and umlal */
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#define HWCAP_FPA "fpa"
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#define HWCAP_VFP "vfp"
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#define HWCAP_EDSP "edsp" /* Enhanced dsp instruction */
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#define HWCAP_JAVA "java"
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#define HWCAP_IWMMXT "iwmmxt"
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#define HWCAP_CRUNCH "crunch"
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#define HWCAP_THUMBEE "thumbee"
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#define HWCAP_NEON "neon" /* Advanced SIMD extension */
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#define HWCAP_VFPV3 "vfpv3" /* Floating-point extension version */
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#define HWCAP_VFPV3D16 "vfpv3d16" /* Also set for vfpv4-d16 */
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#define HWCAP_TLS "tls" /* Thread local storage */
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#define HWCAP_VFPV4 "vfpv4" /* Floating-point extension version */
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#define HWCAP_IDIVA "idiva" /* SDIV and UDIV instruction */
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#define HWCAP_IDIVT "idivt" /* SDIV and UDIV in thumb instruction set */
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#define HWCAP_VFPD32 "vfpd32" /* Set if VFP has 32 64-bit regs (not 16) */
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#define HWCAP_LPAE "lpae" /* LDRD/STRD instructions */
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#define HWCAP_EVTSTRM "evtstrm"
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#define HWCAP_FPHP "fphp" /* Half-precision instructions support */
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#define HWCAP_FPSP "fpsp" /* Single-precision instructions support */
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#define HWCAP_FPDP "fpdp" /* Double-precision instructions support */
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#define HWCAP_FPV5 "fpv5" /* Floating-point extension version */
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/* Hardware capabilities added form armv8 */
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#define HWCAP2_AES "aes"
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#define HWCAP2_PMULL "pmull"
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#define HWCAP2_SHA1 "sha1"
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#define HWCAP2_SHA2 "sha2"
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#define HWCAP2_CRC32 "crc32"
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#endif /* __ARCH_ARM_SRC_COMMON_HWCAP_H */
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@ -241,7 +241,7 @@ int procfs_snprintf(FAR char *buf, size_t size,
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****************************************************************************/
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void procfs_sprintf(FAR char *buf, size_t size, FAR off_t *offset,
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FAR const IPTR char *format, ...);
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FAR const IPTR char *format, ...) printf_like(4, 5);
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/****************************************************************************
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* Name: procfs_register
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