Trivial updates assocaited with USB host mass storage and SAMA5 EHCI
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@ -2415,10 +2415,34 @@ static int sam_qh_ioccheck(struct sam_qh_s *qh, uint32_t **bp, void *arg)
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{
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/* An error occurred */
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udbg("ERROR: EP%d TOKEN=%08x", epinfo->epno, token);
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epinfo->status = (token & QH_TOKEN_STATUS_MASK) >> QH_TOKEN_STATUS_SHIFT;
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/* The HALT condition is set on a variety of conditions: babble, error
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* counter countdown to zero, or a STALL. If we can rule out babble
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* (babble bit not set) and if the error counter is non-zero, then we can
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* assume a STALL. In this case, we return -PERM to inform the class
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* driver of the stall condition.
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*/
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if ((token & (QH_TOKEN_BABBLE | QH_TOKEN_HALTED)) == QH_TOKEN_HALTED &&
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(token & QH_TOKEN_CERR_MASK) != 0)
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{
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/* It is a stall, Note the that the data toggle is reset
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* after the stall.
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*/
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udbg("EP%d Stalled: TOKEN=%08x\n", epinfo->epno, token);
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epinfo->result = -EPERM;
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epinfo->toggle = 0;
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}
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else
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{
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/* Otherwise, it is some kind of data transfer error */
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udbg("ERROR: EP%d TOKEN=%08x\n", epinfo->epno, token);
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epinfo->result = -EIO;
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}
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}
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/* Is there a thread waiting for this transfer to complete? */
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@ -3921,7 +3945,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
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{
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irqstate_t flags;
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uint32_t regval;
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#ifdef CONFIG_DEBUG_USB
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#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
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uint16_t regval16;
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unsigned int nports;
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#endif
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@ -4152,7 +4176,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
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sam_putreg(ECHI_INT_ALLINTS, &HCOR->usbsts);
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#ifdef CONFIG_DEBUG
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#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
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/* Show the ECHI version */
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regval16 = sam_swap16(HCCR->hciversion);
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