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Merge pull request #1 from apache/master_imxrt

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imxrt fixes
This commit is contained in:
patacongo 2019-12-23 19:02:19 -06:00 committed by GitHub
commit 10c4aff6ca
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 175 additions and 116 deletions
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5
arch/arm/src/imxrt/hardware/rt106x/imxrt106x_pinmux.h
View File

@ -521,9 +521,9 @@
/* General Purpose Timer (GPT) */
#define GPIO_GPT1_CAPTURE1_1 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_24_INDEX))
#define GPIO_GPT1_CAPTURE1_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_05_INDEX))
#define GPIO_GPT1_CAPTURE1_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_05_INDEX))
#define GPIO_GPT1_CAPTURE2_1 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_23_INDEX))
#define GPIO_GPT1_CAPTURE2_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_06_INDEX))
#define GPIO_GPT1_CAPTURE2_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_06_INDEX))
#define GPIO_GPT1_CLK_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_13_INDEX))
#define GPIO_GPT1_COMPARE1_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_35_INDEX))
#define GPIO_GPT1_COMPARE2_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_36_INDEX))
@ -534,6 +534,7 @@
#define GPIO_GPT2_CLK_1 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_09_INDEX))
#define GPIO_GPT2_COMPARE2_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_07_INDEX))
#define GPIO_GPT2_COMPARE3_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_08_INDEX))
#define GPIO_GPT2_COMPARE3_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_07_INDEX))
/* JTAG */

66
arch/arm/src/imxrt/imxrt_gpio.c
View File

@ -102,7 +102,8 @@ static const uint8_t g_gpio1_padmux[IMXRT_GPIO_NPINS] =
IMXRT_PADMUX_GPIO_AD_B1_15_INDEX /* GPIO1 Pin 31 */
};
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
static const uint8_t g_gpio2_padmux[IMXRT_GPIO_NPINS] =
{
IMXRT_PADMUX_GPIO_B0_00_INDEX, /* GPIO2 Pin 0 */
@ -185,7 +186,8 @@ static const uint8_t g_gpio2_padmux[IMXRT_GPIO_NPINS] =
# error "Unrecognised IMXRT family member"
#endif
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
static const uint8_t g_gpio3_padmux[IMXRT_GPIO_NPINS] =
{
IMXRT_PADMUX_GPIO_SD_B1_00_INDEX, /* GPIO3 Pin 0 */
@ -265,7 +267,8 @@ static const uint8_t g_gpio3_padmux[IMXRT_GPIO_NPINS] =
};
#endif
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
static const uint8_t g_gpio4_padmux[IMXRT_GPIO_NPINS] =
{
IMXRT_PADMUX_GPIO_EMC_00_INDEX, /* GPIO4 Pin 0 */
@ -350,7 +353,8 @@ static FAR const uint8_t *g_gpio_padmux[IMXRT_GPIO_NPORTS + 1] =
g_gpio1_padmux, /* GPIO1 */
g_gpio2_padmux, /* GPIO2 */
g_gpio3_padmux, /* GPIO3 */
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
g_gpio4_padmux, /* GPIO4 */
#else
NULL, /* GPIO4 doesn't exist on 102x */
@ -365,9 +369,9 @@ static FAR const uint8_t *g_gpio_padmux[IMXRT_GPIO_NPORTS + 1] =
NULL /* End of list */
};
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/* Look-up table that maps GPIO1..GPIOn indexes into GPIO register base addresses */
@ -381,7 +385,8 @@ uintptr_t g_gpio_base[IMXRT_GPIO_NPORTS] =
, IMXRT_GPIO3_BASE
#endif
#if IMXRT_GPIO_NPORTS > 3
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
, IMXRT_GPIO4_BASE
#else
, 0
@ -419,6 +424,7 @@ static uintptr_t imxrt_padmux_address(unsigned int index)
{
return (IMXRT_PAD1MUX_OFFSET(index - IMXRT_PADMUX_GPIO_SPI_B0_00_INDEX));
}
#endif
if (index >= IMXRT_PADMUX_WAKEUP_INDEX)
{
@ -439,6 +445,7 @@ static uintptr_t imxrt_padctl_address(unsigned int index)
{
return (IMXRT_PAD1CTL_OFFSET(index - IMXRT_PADCTL_GPIO_SPI_B0_00_INDEX));
}
#endif
if (index >= IMXRT_PADCTL_WAKEUP_INDEX)
{
@ -492,6 +499,19 @@ static void imxrt_gpio_setoutput(int port, int pin, bool value)
putreg32(regval, regaddr);
}
/****************************************************************************
* Name: imxrt_gpio_getpin_status
****************************************************************************/
static inline bool imxrt_gpio_get_pinstatus(int port, int pin)
{
uintptr_t regaddr = IMXRT_GPIO_PSR(port);
uint32_t regval;
regval = getreg32(regaddr);
return ((regval & GPIO_PIN(pin)) != 0);
}
/****************************************************************************
* Name: imxrt_gpio_getinput
****************************************************************************/
@ -546,6 +566,7 @@ static inline int imxrt_gpio_select(int port, int pin)
regaddr |= gpr * sizeof(uint32_t);
modifyreg32(regaddr, clearbits, setbits);
}
#endif
return OK;
}
@ -562,6 +583,7 @@ static int imxrt_gpio_configinput(gpio_pinset_t pinset)
iomux_pinset_t ioset;
uintptr_t regaddr;
unsigned int index;
uint32_t sion = 0;
DEBUGASSERT((unsigned int)port < IMXRT_GPIO_NPORTS);
@ -582,8 +604,15 @@ static int imxrt_gpio_configinput(gpio_pinset_t pinset)
{
return -EINVAL;
}
regaddr = imxrt_padmux_address(index);
putreg32(PADMUX_MUXMODE_ALT5, regaddr);
if ((pinset & GPIO_OUTPUT) == GPIO_OUTPUT)
{
sion |= (pinset & GPIO_SION_MASK) ? PADMUX_SION : 0;
}
putreg32(PADMUX_MUXMODE_ALT5 | sion, regaddr);
imxrt_gpio_select(port, pin);
@ -742,13 +771,13 @@ int imxrt_config_gpio(gpio_pinset_t pinset)
return ret;
}
/************************************************************************************
/****************************************************************************
* Name: imxrt_gpio_write
*
* Description:
* Write one or zero to the selected GPIO pin
*
************************************************************************************/
****************************************************************************/
void imxrt_gpio_write(gpio_pinset_t pinset, bool value)
{
@ -763,13 +792,13 @@ void imxrt_gpio_write(gpio_pinset_t pinset, bool value)
leave_critical_section(flags);
}
/************************************************************************************
/****************************************************************************
* Name: imxrt_gpio_read
*
* Description:
* Read one or zero from the selected GPIO pin
*
************************************************************************************/
****************************************************************************/
bool imxrt_gpio_read(gpio_pinset_t pinset)
{
@ -781,7 +810,16 @@ bool imxrt_gpio_read(gpio_pinset_t pinset)
DEBUGASSERT((unsigned int)port < IMXRT_GPIO_NPORTS);
flags = enter_critical_section();
value = imxrt_gpio_getinput(port, pin);
leave_critical_section(flags);
if ((pinset & (GPIO_OUTPUT | GPIO_SION_ENABLE)) ==
(GPIO_OUTPUT | GPIO_SION_ENABLE))
{
value = imxrt_gpio_get_pinstatus(port, pin);
}
else
{
value = imxrt_gpio_getinput(port, pin);
}
leave_critical_section(flags);
return value;
}

220
arch/arm/src/imxrt/imxrt_lpi2c.c
View File

@ -130,16 +130,6 @@
#define LPI2C_MASTER 1
#define LPI2C_SLAVE 2
#define MKI2C_OUTPUT(p) (((p) & GPIO_PADMUX_MASK) | \
IOMUX_OPENDRAIN | IOMUX_DRIVE_33OHM | \
IOMUX_SLEW_SLOW | (5 << GPIO_ALT_SHIFT) | \
IOMUX_PULL_NONE | GPIO_OUTPUT_ONE)
#define MKI2C_INPUT(p) (((p) & GPIO_PADMUX_MASK) | \
IOMUX_DRIVE_HIZ | IOMUX_SLEW_SLOW | \
IOMUX_CMOS_INPUT | (5 << GPIO_ALT_SHIFT) | \
IOMUX_PULL_NONE)
/****************************************************************************
* Private Types
****************************************************************************/
@ -186,8 +176,12 @@ struct imxrt_lpi2c_config_s
uint16_t busy_idle; /* LPI2C Bus Idle Timeout */
uint8_t filtscl; /* Glitch Filter for SCL pin */
uint8_t filtsda; /* Glitch Filter for SDA pin */
uint32_t scl_pin; /* GPIO configuration for SCL as SCL */
uint32_t sda_pin; /* GPIO configuration for SDA as SDA */
uint32_t scl_pin; /* Peripheral configuration for SCL as SCL */
uint32_t sda_pin; /* Peripheral configuration for SDA as SDA */
#if defined(CONFIG_I2C_RESET)
uint32_t reset_scl_pin; /* GPIO configuration for SCL as SCL */
uint32_t reset_sda_pin; /* GPIO configuration for SDA as SDA */
#endif
uint8_t mode; /* Master or Slave mode */
#ifndef CONFIG_I2C_POLLED
uint32_t irq; /* Event IRQ */
@ -318,136 +312,152 @@ static const struct i2c_ops_s imxrt_lpi2c_ops =
#ifdef CONFIG_IMXRT_LPI2C1
static const struct imxrt_lpi2c_config_s imxrt_lpi2c1_config =
{
.base = IMXRT_LPI2C1_BASE,
.busy_idle = CONFIG_LPI2C1_BUSYIDLE,
.filtscl = CONFIG_LPI2C1_FILTSCL,
.filtsda = CONFIG_LPI2C1_FILTSDA,
.scl_pin = GPIO_LPI2C1_SCL,
.sda_pin = GPIO_LPI2C1_SDA,
.base = IMXRT_LPI2C1_BASE,
.busy_idle = CONFIG_LPI2C1_BUSYIDLE,
.filtscl = CONFIG_LPI2C1_FILTSCL,
.filtsda = CONFIG_LPI2C1_FILTSDA,
.scl_pin = GPIO_LPI2C1_SCL,
.sda_pin = GPIO_LPI2C1_SDA,
#if defined(CONFIG_I2C_RESET)
.reset_scl_pin = GPIO_LPI2C1_SCL_RESET,
.reset_sda_pin = GPIO_LPI2C1_SDA_RESET,
#endif
#ifndef CONFIG_I2C_SLAVE
.mode = LPI2C_MASTER,
.mode = LPI2C_MASTER,
#else
.mode = LPI2C_SLAVE,
.mode = LPI2C_SLAVE,
#endif
#ifndef CONFIG_I2C_POLLED
.irq = IMXRT_IRQ_LPI2C1,
.irq = IMXRT_IRQ_LPI2C1,
#endif
};
static struct imxrt_lpi2c_priv_s imxrt_lpi2c1_priv =
{
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c1_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
.ptr = NULL,
.dcnt = 0,
.flags = 0,
.status = 0
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c1_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
.ptr = NULL,
.dcnt = 0,
.flags = 0,
.status = 0
};
#endif
#ifdef CONFIG_IMXRT_LPI2C2
static const struct imxrt_lpi2c_config_s imxrt_lpi2c2_config =
{
.base = IMXRT_LPI2C2_BASE,
.busy_idle = CONFIG_LPI2C2_BUSYIDLE,
.filtscl = CONFIG_LPI2C2_FILTSCL,
.filtsda = CONFIG_LPI2C2_FILTSDA,
.scl_pin = GPIO_LPI2C2_SCL,
.sda_pin = GPIO_LPI2C2_SDA,
.base = IMXRT_LPI2C2_BASE,
.busy_idle = CONFIG_LPI2C2_BUSYIDLE,
.filtscl = CONFIG_LPI2C2_FILTSCL,
.filtsda = CONFIG_LPI2C2_FILTSDA,
.scl_pin = GPIO_LPI2C2_SCL,
.sda_pin = GPIO_LPI2C2_SDA,
#if defined(CONFIG_I2C_RESET)
.reset_scl_pin = GPIO_LPI2C2_SCL_RESET,
.reset_sda_pin = GPIO_LPI2C2_SDA_RESET,
#endif
#ifndef CONFIG_I2C_SLAVE
.mode = LPI2C_MASTER,
.mode = LPI2C_MASTER,
#else
.mode = LPI2C_SLAVE,
.mode = LPI2C_SLAVE,
#endif
#ifndef CONFIG_I2C_POLLED
.irq = IMXRT_IRQ_LPI2C2,
.irq = IMXRT_IRQ_LPI2C2,
#endif
};
static struct imxrt_lpi2c_priv_s imxrt_lpi2c2_priv =
{
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c2_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
.ptr = NULL,
.dcnt = 0,
.flags = 0,
.status = 0
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c2_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
.ptr = NULL,
.dcnt = 0,
.flags = 0,
.status = 0
};
#endif
#ifdef CONFIG_IMXRT_LPI2C3
static const struct imxrt_lpi2c_config_s imxrt_lpi2c3_config =
{
.base = IMXRT_LPI2C3_BASE,
.busy_idle = CONFIG_LPI2C3_BUSYIDLE,
.filtscl = CONFIG_LPI2C3_FILTSCL,
.filtsda = CONFIG_LPI2C3_FILTSDA,
.scl_pin = GPIO_LPI2C3_SCL,
.sda_pin = GPIO_LPI2C3_SDA,
.base = IMXRT_LPI2C3_BASE,
.busy_idle = CONFIG_LPI2C3_BUSYIDLE,
.filtscl = CONFIG_LPI2C3_FILTSCL,
.filtsda = CONFIG_LPI2C3_FILTSDA,
.scl_pin = GPIO_LPI2C3_SCL,
.sda_pin = GPIO_LPI2C3_SDA,
#if defined(CONFIG_I2C_RESET)
.reset_scl_pin = GPIO_LPI2C3_SCL_RESET,
.reset_sda_pin = GPIO_LPI2C3_SDA_RESET,
#endif
#ifndef CONFIG_I2C_SLAVE
.mode = LPI2C_MASTER,
.mode = LPI2C_MASTER,
#else
.mode = LPI2C_SLAVE,
.mode = LPI2C_SLAVE,
#endif
#ifndef CONFIG_I2C_POLLED
.irq = IMXRT_IRQ_LPI2C3,
.irq = IMXRT_IRQ_LPI2C3,
#endif
};
static struct imxrt_lpi2c_priv_s imxrt_lpi2c3_priv =
{
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c3_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
.ptr = NULL,
.dcnt = 0,
.flags = 0,
.status = 0
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c3_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
.ptr = NULL,
.dcnt = 0,
.flags = 0,
.status = 0
};
#endif
#ifdef CONFIG_IMXRT_LPI2C4
static const struct imxrt_lpi2c_config_s imxrt_lpi2c4_config =
{
.base = IMXRT_LPI2C4_BASE,
.busy_idle = CONFIG_LPI2C4_BUSYIDLE,
.filtscl = CONFIG_LPI2C4_FILTSCL,
.filtsda = CONFIG_LPI2C4_FILTSDA,
.scl_pin = GPIO_LPI2C4_SCL,
.sda_pin = GPIO_LPI2C4_SDA,
.base = IMXRT_LPI2C4_BASE,
.busy_idle = CONFIG_LPI2C4_BUSYIDLE,
.filtscl = CONFIG_LPI2C4_FILTSCL,
.filtsda = CONFIG_LPI2C4_FILTSDA,
.scl_pin = GPIO_LPI2C4_SCL,
.sda_pin = GPIO_LPI2C4_SDA,
#if defined(CONFIG_I2C_RESET)
.reset_scl_pin = GPIO_LPI2C4_SCL_RESET,
.reset_sda_pin = GPIO_LPI2C4_SDA_RESET,
#endif
#ifndef CONFIG_I2C_SLAVE
.mode = LPI2C_MASTER,
.mode = LPI2C_MASTER,
#else
.mode = LPI2C_SLAVE,
.mode = LPI2C_SLAVE,
#endif
#ifndef CONFIG_I2C_POLLED
.irq = IMXRT_IRQ_LPI2C4,
.irq = IMXRT_IRQ_LPI2C4,
#endif
};
static struct imxrt_lpi2c_priv_s imxrt_lpi2c4_priv =
{
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c4_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
.ptr = NULL,
.dcnt = 0,
.flags = 0,
.status = 0
.ops = &imxrt_lpi2c_ops,
.config = &imxrt_lpi2c4_config,
.refs = 0,
.intstate = INTSTATE_IDLE,
.msgc = 0,
.msgv = NULL,
.ptr = NULL,
.dcnt = 0,
.flags = 0,
.status = 0
};
#endif
@ -1235,11 +1245,17 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv)
imxrt_lpi2c_tracenew(priv, status);
/* Continue with either sending or reading data */
/* After an error we can get an SDF */
if (priv->intstate == INTSTATE_DONE && (status & LPI2C_MSR_SDF) != 0)
{
imxrt_lpi2c_traceevent(priv, I2CEVENT_STOP, 0);
imxrt_lpi2c_putreg(priv, IMXRT_LPI2C_MSR_OFFSET, LPI2C_MSR_SDF);
}
/* Check if there is more bytes to send */
if (((priv->flags & I2C_M_READ) == 0) && (status & LPI2C_MSR_TDF) != 0)
else if (((priv->flags & I2C_M_READ) == 0) && (status & LPI2C_MSR_TDF) != 0)
{
if (priv->dcnt > 0)
{
@ -1298,8 +1314,8 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv)
{
if (priv->msgc > 0 && priv->msgv != NULL)
{
priv->ptr = priv->msgv->buffer;
priv->dcnt = priv->msgv->length;
priv->ptr = priv->msgv->buffer;
priv->dcnt = priv->msgv->length;
priv->flags = priv->msgv->flags;
if ((priv->msgv->flags & I2C_M_NOSTART) == 0)
@ -1354,6 +1370,10 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv)
#ifndef CONFIG_I2C_POLLED
if (priv->intstate == INTSTATE_WAITING)
{
/* Update Status once at the end */
priv->status = status;
/* inform the thread that transfer is complete
* and wake it up
*/
@ -1362,6 +1382,7 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv)
priv->intstate = INTSTATE_DONE;
}
#else
priv->status = status;
priv->intstate = INTSTATE_DONE;
#endif
/* Mark that this transaction stopped */
@ -1402,6 +1423,10 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv)
#ifndef CONFIG_I2C_POLLED
if (priv->intstate == INTSTATE_WAITING)
{
/* Update Status once at the end */
priv->status = status;
/* inform the thread that transfer is complete
* and wake it up
*/
@ -1410,11 +1435,11 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv)
priv->intstate = INTSTATE_DONE;
}
#else
priv->status = status;
priv->intstate = INTSTATE_DONE;
#endif
}
priv->status = status;
return OK;
}
@ -1754,8 +1779,8 @@ static int imxrt_lpi2c_reset(FAR struct i2c_master_s *dev)
/* Use GPIO configuration to un-wedge the bus */
scl_gpio = MKI2C_OUTPUT(priv->config->scl_pin);
sda_gpio = MKI2C_OUTPUT(priv->config->sda_pin);
scl_gpio = priv->config->reset_scl_pin | GPIO_SION_ENABLE;
sda_gpio = priv->config->reset_sda_pin | GPIO_SION_ENABLE;
imxrt_config_gpio(scl_gpio);
imxrt_config_gpio(sda_gpio);
@ -1818,11 +1843,6 @@ static int imxrt_lpi2c_reset(FAR struct i2c_master_s *dev)
imxrt_gpio_write(sda_gpio, 1);
up_udelay(10);
/* Revert the GPIO configuration. */
sda_gpio = MKI2C_INPUT(sda_gpio);
scl_gpio = MKI2C_INPUT(scl_gpio);
imxrt_config_gpio(sda_gpio);
imxrt_config_gpio(scl_gpio);