From 10c8c39426c49fcb1faa731c47d69b52f99cbb94 Mon Sep 17 00:00:00 2001
From: Gao Feng <Feng.Gao@sony.com>
Date: Wed, 8 May 2024 10:27:44 +0800
Subject: [PATCH] xtensa/esp32s3: pending interrupt should be clear while
 disable GPIO IRQ

---
 arch/xtensa/src/esp32s3/esp32s3_gpio.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/xtensa/src/esp32s3/esp32s3_gpio.c b/arch/xtensa/src/esp32s3/esp32s3_gpio.c
index d89799ac23..ea240f9162 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_gpio.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_gpio.c
@@ -517,6 +517,17 @@ void esp32s3_gpioirqdisable(int irq)
   regval &= ~(GPIO_PIN0_INT_ENA_M | GPIO_PIN0_INT_TYPE_M);
   putreg32(regval, regaddr);
 
+  /* Clear pending GPIO interrupt status before enable IRQ */
+
+  if (pin < 32)
+    {
+      putreg32(1 << pin, GPIO_STATUS_W1TC_REG);
+    }
+  else
+    {
+      putreg32(1 << (pin - 32), GPIO_STATUS1_W1TC_REG);
+    }
+
   /* Configuration done. Re-enable the GPIO interrupt. */
 
   up_enable_irq(ESP32S3_IRQ_GPIO_INT_CPU);