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Mostly cosmetic changes from review of last PR.

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This commit is contained in:
Gregory Nutt 2017-10-01 12:08:52 -06:00
parent 67300e23a0
commit 10eed5deef
2 changed files with 51 additions and 53 deletions
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91
arch/arm/src/stm32/stm32_hrtim.c
View File

@ -276,7 +276,6 @@
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_STM32_HRTIM_PWM #ifdef CONFIG_STM32_HRTIM_PWM
/* HRTIM Slave Timer Single Output Set/Reset Configuration */ /* HRTIM Slave Timer Single Output Set/Reset Configuration */
struct stm32_hrtim_timout_s struct stm32_hrtim_timout_s
@ -344,7 +343,6 @@ struct stm32_hrtim_pwm_s
}; };
#endif #endif
/* HRTIM TIMER Capture sturcutre */ /* HRTIM TIMER Capture sturcutre */
#ifdef CONFIG_STM32_HRTIM_CAPTURE #ifdef CONFIG_STM32_HRTIM_CAPTURE
@ -416,7 +414,6 @@ struct stm32_hrtim_slave_priv_s
}; };
#ifdef CONFIG_STM32_HRTIM_FAULTS #ifdef CONFIG_STM32_HRTIM_FAULTS
/* Structure describes single HRTIM Fault configuration */ /* Structure describes single HRTIM Fault configuration */
struct stm32_hrtim_fault_cfg_s struct stm32_hrtim_fault_cfg_s
@ -451,7 +448,6 @@ struct stm32_hrtim_faults_s
#endif #endif
#ifdef CONFIG_STM32_HRTIM_EVENTS #ifdef CONFIG_STM32_HRTIM_EVENTS
/* Structure describes single HRTIM External Event configuration */ /* Structure describes single HRTIM External Event configuration */
struct stm32_hrtim_eev_cfg_s struct stm32_hrtim_eev_cfg_s
@ -502,7 +498,6 @@ struct stm32_hrtim_eev_s
#endif #endif
#ifdef CONFIG_STM32_HRTIM_ADC #ifdef CONFIG_STM32_HRTIM_ADC
/* Structure describes HRTIM ADC triggering configuration */ /* Structure describes HRTIM ADC triggering configuration */
struct stm32_hrtim_adc_s struct stm32_hrtim_adc_s
@ -849,7 +844,6 @@ static struct stm32_hrtim_tim_s g_tima =
#endif #endif
#ifdef CONFIG_STM32_HRTIM_TIMB #ifdef CONFIG_STM32_HRTIM_TIMB
/* Timer B private data */ /* Timer B private data */
static struct stm32_hrtim_slave_priv_s g_timb_priv = static struct stm32_hrtim_slave_priv_s g_timb_priv =
@ -945,7 +939,6 @@ static struct stm32_hrtim_tim_s g_timb =
#endif #endif
#ifdef CONFIG_STM32_HRTIM_TIMC #ifdef CONFIG_STM32_HRTIM_TIMC
/* Timer C private data */ /* Timer C private data */
static struct stm32_hrtim_slave_priv_s g_timc_priv = static struct stm32_hrtim_slave_priv_s g_timc_priv =
@ -1041,7 +1034,6 @@ static struct stm32_hrtim_tim_s g_timc =
#endif #endif
#ifdef CONFIG_STM32_HRTIM_TIMD #ifdef CONFIG_STM32_HRTIM_TIMD
/* Timer D private data */ /* Timer D private data */
static struct stm32_hrtim_slave_priv_s g_timd_priv = static struct stm32_hrtim_slave_priv_s g_timd_priv =
@ -1137,7 +1129,6 @@ static struct stm32_hrtim_tim_s g_timd =
#endif #endif
#ifdef CONFIG_STM32_HRTIM_TIME #ifdef CONFIG_STM32_HRTIM_TIME
/* Timer E private data */ /* Timer E private data */
static struct stm32_hrtim_slave_priv_s g_time_priv = static struct stm32_hrtim_slave_priv_s g_time_priv =
@ -1393,7 +1384,6 @@ struct stm32_hrtim_eev_s g_eev =
}; };
#endif #endif
/* ADC triggering data */ /* ADC triggering data */
#ifdef CONFIG_STM32_HRTIM_ADC #ifdef CONFIG_STM32_HRTIM_ADC
@ -1618,7 +1608,8 @@ static void stm32_modifyreg32(unsigned int addr, uint32_t clrbits,
* *
****************************************************************************/ ****************************************************************************/
static uint32_t hrtim_cmn_getreg(FAR struct stm32_hrtim_s *priv, uint32_t offset) static uint32_t hrtim_cmn_getreg(FAR struct stm32_hrtim_s *priv,
uint32_t offset)
{ {
return getreg32(priv->base + STM32_HRTIM_CMN_OFFSET + offset); return getreg32(priv->base + STM32_HRTIM_CMN_OFFSET + offset);
} }
@ -1662,10 +1653,12 @@ static void hrtim_cmn_putreg(FAR struct stm32_hrtim_s *priv, uint32_t offset,
* *
****************************************************************************/ ****************************************************************************/
static void hrtim_cmn_modifyreg(FAR struct stm32_hrtim_s *priv, uint32_t offset, static void hrtim_cmn_modifyreg(FAR struct stm32_hrtim_s *priv,
uint32_t clrbits, uint32_t setbits) uint32_t offset, uint32_t clrbits,
uint32_t setbits)
{ {
hrtim_cmn_putreg(priv, offset, (hrtim_cmn_getreg(priv, offset) & ~clrbits) | setbits); hrtim_cmn_putreg(priv, offset,
(hrtim_cmn_getreg(priv, offset) & ~clrbits) | setbits);
} }
/**************************************************************************** /****************************************************************************
@ -1683,8 +1676,8 @@ static void hrtim_cmn_modifyreg(FAR struct stm32_hrtim_s *priv, uint32_t offset,
* *
****************************************************************************/ ****************************************************************************/
static FAR struct stm32_hrtim_tim_s *hrtim_tim_get(FAR struct stm32_hrtim_s *priv, static FAR struct stm32_hrtim_tim_s *
uint8_t timer) hrtim_tim_get(FAR struct stm32_hrtim_s *priv, uint8_t timer)
{ {
FAR struct stm32_hrtim_tim_s *tim; FAR struct stm32_hrtim_tim_s *tim;
@ -1795,8 +1788,8 @@ errout:
* *
****************************************************************************/ ****************************************************************************/
static uint32_t hrtim_tim_getreg(FAR struct stm32_hrtim_s *priv, uint8_t timer, static uint32_t hrtim_tim_getreg(FAR struct stm32_hrtim_s *priv,
uint32_t offset) uint8_t timer, uint32_t offset)
{ {
uint32_t base = 0; uint32_t base = 0;
@ -1857,7 +1850,8 @@ static void hrtim_tim_putreg(FAR struct stm32_hrtim_s *priv, uint8_t timer,
****************************************************************************/ ****************************************************************************/
static void hrtim_tim_modifyreg(FAR struct stm32_hrtim_s *priv, uint8_t timer, static void hrtim_tim_modifyreg(FAR struct stm32_hrtim_s *priv, uint8_t timer,
uint32_t offset, uint32_t clrbits, uint32_t setbits) uint32_t offset, uint32_t clrbits,
uint32_t setbits)
{ {
hrtim_tim_putreg(priv, timer, offset, hrtim_tim_putreg(priv, timer, offset,
(hrtim_tim_getreg(priv, timer, offset) & ~clrbits) | setbits); (hrtim_tim_getreg(priv, timer, offset) & ~clrbits) | setbits);
@ -2035,7 +2029,6 @@ static int hrtim_dll_cal(FAR struct stm32_hrtim_s *priv)
uint32_t regval = 0; uint32_t regval = 0;
#ifdef CONFIG_STM32_HRTIM_PERIODIC_CAL #ifdef CONFIG_STM32_HRTIM_PERIODIC_CAL
/* Configure calibration rate */ /* Configure calibration rate */
regval |= HRTIM_DLLCR_CAL_RATE; regval |= HRTIM_DLLCR_CAL_RATE;
@ -2047,7 +2040,6 @@ static int hrtim_dll_cal(FAR struct stm32_hrtim_s *priv)
/* CALEN must not be set simultaneously with CAL bit */ /* CALEN must not be set simultaneously with CAL bit */
hrtim_cmn_putreg(priv, STM32_HRTIM_CMN_DLLCR_OFFSET, regval); hrtim_cmn_putreg(priv, STM32_HRTIM_CMN_DLLCR_OFFSET, regval);
#endif #endif
/* DLL Calibration Start */ /* DLL Calibration Start */
@ -2076,7 +2068,8 @@ static int hrtim_dll_cal(FAR struct stm32_hrtim_s *priv)
* *
****************************************************************************/ ****************************************************************************/
static int hrtim_tim_clock_config(FAR struct stm32_hrtim_s *priv, uint8_t timer, uint8_t pre) static int hrtim_tim_clock_config(FAR struct stm32_hrtim_s *priv,
uint8_t timer, uint8_t pre)
{ {
int ret = OK; int ret = OK;
uint32_t regval = 0; uint32_t regval = 0;
@ -2090,41 +2083,49 @@ static int hrtim_tim_clock_config(FAR struct stm32_hrtim_s *priv, uint8_t timer,
regval |= HRTIM_CMNCR_CKPSC_NODIV; regval |= HRTIM_CMNCR_CKPSC_NODIV;
break; break;
} }
case HRTIM_PRESCALER_2: case HRTIM_PRESCALER_2:
{ {
regval |= HRTIM_CMNCR_CKPSC_d2; regval |= HRTIM_CMNCR_CKPSC_d2;
break; break;
} }
case HRTIM_PRESCALER_4: case HRTIM_PRESCALER_4:
{ {
regval |= HRTIM_CMNCR_CKPSC_d4; regval |= HRTIM_CMNCR_CKPSC_d4;
break; break;
} }
case HRTIM_PRESCALER_8: case HRTIM_PRESCALER_8:
{ {
regval |= HRTIM_CMNCR_CKPSC_d8; regval |= HRTIM_CMNCR_CKPSC_d8;
break; break;
} }
case HRTIM_PRESCALER_16: case HRTIM_PRESCALER_16:
{ {
regval |= HRTIM_CMNCR_CKPSC_d16; regval |= HRTIM_CMNCR_CKPSC_d16;
break; break;
} }
case HRTIM_PRESCALER_32: case HRTIM_PRESCALER_32:
{ {
regval |= HRTIM_CMNCR_CKPSC_d32; regval |= HRTIM_CMNCR_CKPSC_d32;
break; break;
} }
case HRTIM_PRESCALER_64: case HRTIM_PRESCALER_64:
{ {
regval |= HRTIM_CMNCR_CKPSC_d64; regval |= HRTIM_CMNCR_CKPSC_d64;
break; break;
} }
case HRTIM_PRESCALER_128: case HRTIM_PRESCALER_128:
{ {
regval |= HRTIM_CMNCR_CKPSC_d128; regval |= HRTIM_CMNCR_CKPSC_d128;
break; break;
} }
default: default:
{ {
tmrerr("ERROR: invalid prescaler value %d for timer %d\n", timer, tmrerr("ERROR: invalid prescaler value %d for timer %d\n", timer,
@ -2437,8 +2438,9 @@ static int hrtim_gpios_config(FAR struct stm32_hrtim_s *priv)
* *
****************************************************************************/ ****************************************************************************/
static int hrtim_tim_capture_cfg(FAR struct stm32_hrtim_s *priv, uint8_t timer, static int hrtim_tim_capture_cfg(FAR struct stm32_hrtim_s *priv,
uint8_t index, uint32_t capture) uint8_t timer, uint8_t index,
uint32_t capture)
{ {
int ret = OK; int ret = OK;
uint32_t offset = 0; uint32_t offset = 0;
@ -2663,7 +2665,6 @@ static int hrtim_tim_outputs_config(FAR struct stm32_hrtim_s *priv, uint8_t time
hrtim_tim_putreg(priv, timer, STM32_HRTIM_TIM_RST2R_OFFSET, regval); hrtim_tim_putreg(priv, timer, STM32_HRTIM_TIM_RST2R_OFFSET, regval);
#ifdef CONFIG_STM32_HRTIM_BURST #ifdef CONFIG_STM32_HRTIM_BURST
/* Configure IDLE state for output 1 */ /* Configure IDLE state for output 1 */
if (slave->pwm.burst.ch1_en) if (slave->pwm.burst.ch1_en)
@ -2676,11 +2677,13 @@ static int hrtim_tim_outputs_config(FAR struct stm32_hrtim_s *priv, uint8_t time
/* Set Idle state */ /* Set Idle state */
regval |= ((slave->pwm.burst.ch1_state & HRTIM_IDLE_ACTIVE) ? HRTIM_TIMOUT_IDLES1 : 0); regval |= ((slave->pwm.burst.ch1_state & HRTIM_IDLE_ACTIVE) ?
HRTIM_TIMOUT_IDLES1 : 0);
/* Write register */ /* Write register */
hrtim_tim_modifyreg(priv, timer, STM32_HRTIM_TIM_OUTR_OFFSET, 0, regval); hrtim_tim_modifyreg(priv, timer, STM32_HRTIM_TIM_OUTR_OFFSET, 0,
regval);
} }
/* Configure IDLE state for output 2 */ /* Configure IDLE state for output 2 */
@ -2695,11 +2698,13 @@ static int hrtim_tim_outputs_config(FAR struct stm32_hrtim_s *priv, uint8_t time
/* Set Idle state */ /* Set Idle state */
regval |= ((slave->pwm.burst.ch2_state & HRTIM_IDLE_ACTIVE) ? HRTIM_TIMOUT_IDLES1 : 0); regval |= ((slave->pwm.burst.ch2_state & HRTIM_IDLE_ACTIVE) ?
HRTIM_TIMOUT_IDLES1 : 0);
/* Write register */ /* Write register */
hrtim_tim_modifyreg(priv, timer, STM32_HRTIM_TIM_OUTR_OFFSET, 0, regval); hrtim_tim_modifyreg(priv, timer, STM32_HRTIM_TIM_OUTR_OFFSET, 0,
regval);
} }
#endif #endif
@ -2797,8 +2802,8 @@ errout:
* *
****************************************************************************/ ****************************************************************************/
static int hrtim_outputs_enable(FAR struct hrtim_dev_s *dev, uint16_t outputs, static int hrtim_outputs_enable(FAR struct hrtim_dev_s *dev,
bool state) uint16_t outputs, bool state)
{ {
FAR struct stm32_hrtim_s *priv = (FAR struct stm32_hrtim_s *)dev->hd_priv; FAR struct stm32_hrtim_s *priv = (FAR struct stm32_hrtim_s *)dev->hd_priv;
uint32_t offset = 0; uint32_t offset = 0;
@ -2868,7 +2873,6 @@ static int hrtim_adc_config(FAR struct stm32_hrtim_s *priv)
#endif #endif
#ifdef CONFIG_STM32_HRTIM_DAC #ifdef CONFIG_STM32_HRTIM_DAC
/**************************************************************************** /****************************************************************************
* Name: hrtim_tim_dac_cfg * Name: hrtim_tim_dac_cfg
* *
@ -2967,7 +2971,6 @@ static int hrtim_dac_config(FAR struct stm32_hrtim_s *priv)
#endif #endif
#ifdef CONFIG_STM32_HRTIM_DMA #ifdef CONFIG_STM32_HRTIM_DMA
/**************************************************************************** /****************************************************************************
* Name: hrtim_dma_cfg * Name: hrtim_dma_cfg
****************************************************************************/ ****************************************************************************/
@ -3046,7 +3049,6 @@ static int hrtim_dma_cfg(FAR struct stm32_hrtim_s *priv)
#endif /* CONFIG_STM32_HRTIM_DAM */ #endif /* CONFIG_STM32_HRTIM_DAM */
#ifdef CONFIG_STM32_HRTIM_DEADTIME #ifdef CONFIG_STM32_HRTIM_DEADTIME
/**************************************************************************** /****************************************************************************
* Name: hrtim_deadtime_update * Name: hrtim_deadtime_update
****************************************************************************/ ****************************************************************************/
@ -3109,7 +3111,7 @@ errout:
static uint16_t hrtim_deadtime_get(FAR struct stm32_dev_s *dev, uint8_t dt) static uint16_t hrtim_deadtime_get(FAR struct stm32_dev_s *dev, uint8_t dt)
{ {
#warinig missing logic #warning missing logic
} }
/**************************************************************************** /****************************************************************************
@ -3225,7 +3227,6 @@ static int hrtim_deadtime_config(FAR struct stm32_hrtim_s *priv)
#endif /* CONFIG_STM32_HRTIM_DEADTIME */ #endif /* CONFIG_STM32_HRTIM_DEADTIME */
#ifdef CONFIG_STM32_HRTIM_CHOPPER #ifdef CONFIG_STM32_HRTIM_CHOPPER
/**************************************************************************** /****************************************************************************
* Name: hrtim_chopper_enable * Name: hrtim_chopper_enable
* *
@ -3296,7 +3297,8 @@ errout:
* Name: hrtim_chopper_cfg * Name: hrtim_chopper_cfg
****************************************************************************/ ****************************************************************************/
static int hrtim_tim_chopper_cfg(FAR struct stm32_hrtim_s *priv, uint8_t timer) static int hrtim_tim_chopper_cfg(FAR struct stm32_hrtim_s *priv,
uint8_t timer)
{ {
FAR struct stm32_hrtim_tim_s* tim; FAR struct stm32_hrtim_tim_s* tim;
FAR struct stm32_hrtim_slave_priv_s* slave; FAR struct stm32_hrtim_slave_priv_s* slave;
@ -3383,7 +3385,6 @@ static int hrtim_chopper_config(FAR struct stm32_hrtim_s *priv)
#endif #endif
#ifdef CONFIG_STM32_HRTIM_BURST #ifdef CONFIG_STM32_HRTIM_BURST
/**************************************************************************** /****************************************************************************
* Name: hrtim_burst_enable * Name: hrtim_burst_enable
****************************************************************************/ ****************************************************************************/
@ -3396,17 +3397,20 @@ static int hrtim_burst_enable(FAR struct hrtim_dev_s *dev, bool state)
{ {
/* Enable Burst mode */ /* Enable Burst mode */
hrtim_cmn_modifyreg(priv, STM32_HRTIM_CMN_BMCR_OFFSET, 0, HRTIM_BMCR_BME); hrtim_cmn_modifyreg(priv, STM32_HRTIM_CMN_BMCR_OFFSET, 0,
HRTIM_BMCR_BME);
/* Software start */ /* Software start */
hrtim_cmn_modifyreg(priv, STM32_HRTIM_CMN_BMTRGR_OFFSET, 0, HRTIM_BMTRGR_SW); hrtim_cmn_modifyreg(priv, STM32_HRTIM_CMN_BMTRGR_OFFSET, 0,
HRTIM_BMTRGR_SW);
} }
else else
{ {
/* Disable Burst mode */ /* Disable Burst mode */
hrtim_cmn_modifyreg(priv, STM32_HRTIM_CMN_BMCR_OFFSET, HRTIM_BMCR_BME, 0); hrtim_cmn_modifyreg(priv, STM32_HRTIM_CMN_BMCR_OFFSET,
HRTIM_BMCR_BME, 0);
} }
return OK; return OK;
@ -3520,7 +3524,6 @@ errout:
return ret; return ret;
} }
/**************************************************************************** /****************************************************************************
* Name: hrtim_burst_config * Name: hrtim_burst_config
****************************************************************************/ ****************************************************************************/
@ -3566,7 +3569,6 @@ static int hrtim_burst_config(FAR struct stm32_hrtim_s *priv)
#endif #endif
#ifdef CONFIG_STM32_HRTIM_FAULTS #ifdef CONFIG_STM32_HRTIM_FAULTS
/**************************************************************************** /****************************************************************************
* Name: hrtim_tim_faults_cfg * Name: hrtim_tim_faults_cfg
* *
@ -3823,7 +3825,6 @@ static int hrtim_faults_config(FAR struct stm32_hrtim_s *priv)
#endif #endif
#ifdef CONFIG_STM32_HRTIM_EVENTS #ifdef CONFIG_STM32_HRTIM_EVENTS
/**************************************************************************** /****************************************************************************
* Name: hrtim_eev_cfg * Name: hrtim_eev_cfg
* *
@ -4177,7 +4178,6 @@ static void hrtim_tim_mode_set(FAR struct stm32_hrtim_s *priv, uint8_t timer,
static void hrtim_mode_config(FAR struct stm32_hrtim_s *priv) static void hrtim_mode_config(FAR struct stm32_hrtim_s *priv)
{ {
#ifdef CONFIG_STM32_HRTIM_MASTER #ifdef CONFIG_STM32_HRTIM_MASTER
hrtim_tim_mode_set(priv, HRTIM_TIMER_MASTER, priv->master->tim.mode); hrtim_tim_mode_set(priv, HRTIM_TIMER_MASTER, priv->master->tim.mode);
#endif #endif
@ -4201,7 +4201,6 @@ static void hrtim_mode_config(FAR struct stm32_hrtim_s *priv)
#ifdef CONFIG_STM32_HRTIM_TIME #ifdef CONFIG_STM32_HRTIM_TIME
hrtim_tim_mode_set(priv, HRTIM_TIMER_TIME, priv->time->tim.mode); hrtim_tim_mode_set(priv, HRTIM_TIMER_TIME, priv->time->tim.mode);
#endif #endif
} }
/**************************************************************************** /****************************************************************************

1
arch/arm/src/stm32/stm32_hrtim.h
View File

@ -488,7 +488,6 @@ enum stm32_hrtim_eev_mode_e
HRTIM_EEV_MODE_FAST = 1 /* low latency mode */ HRTIM_EEV_MODE_FAST = 1 /* low latency mode */
}; };
/* External Event filter. /* External Event filter.
* NOTE: supported only for EEV6-10. * NOTE: supported only for EEV6-10.
*/ */