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Fix an issue for architectures where interrupt numbers and vector numbers do not match 1-to-1

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4258 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-01-04 00:14:45 +00:00
parent 93c3e9f7af
commit 1121973925
9 changed files with 121 additions and 7 deletions
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9
Documentation/NuttxPortingGuide.html
View File

@ -3554,6 +3554,15 @@ void (*notify)(FAR struct pm_callback_s *cb, enum pm_state_e pmstate);
<li><code>CONFIG_ARCH_NOINTC</code>:
Define if the architecture does not support an interrupt controller
or otherwise cannot support APIs like up_enable_irq() and up_disable_irq().</li>
<li><code>CONFIG_ARCH_VECNOTIRQ</code>:
Usually the interrupt vector number provided to interfaces like <code>irq_attach()</code>
and <code>irq_detach</code> are the same as IRQ numbers that are provied to IRQ
management functions like <code>up_enable_irq()</code> and <code>up_disable_irq()</code>.
But that is not true for all interrupt controller implementations. For example, the
PIC32MX interrupt controller manages interrupt sources that have a many-to-one
relationship to interrupt vectors.
In such cases, <code>CONFIG_ARCH_VECNOTIRQ</code> must defined so that the OS logic
will know not to assume it can use a vector number to enable or disable interrupts.
<li><code>CONFIG_ARCH_IRQPRIO</code>:
Define if the architecture supports prioritization of interrupts and the
up_prioritize_irq() API.</li>

9
configs/README.txt
View File

@ -138,6 +138,15 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_ARCH_NOINTC - define if the architecture does not
support an interrupt controller or otherwise cannot support
APIs like up_enable_irq() and up_disable_irq().
CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
to interfaces like irq_attach() and irq_detach are the same as IRQ
numbers that are provied to IRQ management functions like
up_enable_irq() and up_disable_irq(). But that is not true for all
interrupt controller implementations. For example, the PIC32MX
interrupt controller manages interrupt sources that have a many-to-one
relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
must defined so that the OS logic will know not to assume it can use
a vector number to enable or disable interrupts.
CONFIG_ARCH_IRQPRIO
Define if the architecture suports prioritizaton of interrupts
and the up_prioritize_irq() API.

16
configs/pcblogic-pic32mx/nsh/defconfig
View File

@ -1,7 +1,7 @@
############################################################################
# configs/pcblogic-pic32mx/nsh/defconfig
#
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.orgr>
#
# Redistribution and use in source and binary forms, with or without
@ -53,6 +53,18 @@
# CONFIG_DRAM_SIZE - Describes the installed DRAM.
# CONFIG_DRAM_START - The start address of DRAM (physical)
# CONFIG_DRAM_END - Last address+1 of installed RAM
# CONFIG_ARCH_NOINTC - define if the architecture does not
# support an interrupt controller or otherwise cannot support
# APIs like up_enable_irq() and up_disable_irq().
# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
# to interfaces like irq_attach() and irq_detach are the same as IRQ
# numbers that are provied to IRQ management functions like
# up_enable_irq() and up_disable_irq(). But that is not true for all
# interrupt controller implementations. For example, the PIC32MX
# interrupt controller manages interrupt sources that have a many-to-one
# relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
# must defined so that the OS logic will know not to assume it can use
# a vector number to enable or disable interrupts.
# CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
# stack. If defined, this symbol is the size of the interrupt
@ -81,6 +93,8 @@ CONFIG_BOARD_LOOPSPERMSEC=8079
CONFIG_DRAM_SIZE=(32*1024)
CONFIG_DRAM_START=0xa0000000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_NOINTC=n
CONFIG_ARCH_VECNOTIRQ=y
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_INTERRUPTSTACK=n
CONFIG_ARCH_STACKDUMP=y

14
configs/pcblogic-pic32mx/ostest/defconfig
View File

@ -53,6 +53,18 @@
# CONFIG_DRAM_SIZE - Describes the installed DRAM.
# CONFIG_DRAM_START - The start address of DRAM (physical)
# CONFIG_DRAM_END - Last address+1 of installed RAM
# CONFIG_ARCH_NOINTC - define if the architecture does not
# support an interrupt controller or otherwise cannot support
# APIs like up_enable_irq() and up_disable_irq().
# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
# to interfaces like irq_attach() and irq_detach are the same as IRQ
# numbers that are provied to IRQ management functions like
# up_enable_irq() and up_disable_irq(). But that is not true for all
# interrupt controller implementations. For example, the PIC32MX
# interrupt controller manages interrupt sources that have a many-to-one
# relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
# must defined so that the OS logic will know not to assume it can use
# a vector number to enable or disable interrupts.
# CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
# stack. If defined, this symbol is the size of the interrupt
@ -81,6 +93,8 @@ CONFIG_BOARD_LOOPSPERMSEC=8079
CONFIG_DRAM_SIZE=(32*1024)
CONFIG_DRAM_START=0xa0000000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_NOINTC=n
CONFIG_ARCH_VECNOTIRQ=y
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_INTERRUPTSTACK=n
CONFIG_ARCH_STACKDUMP=y

14
configs/pic32-starterkit/ostest/defconfig
View File

@ -55,6 +55,18 @@
# CONFIG_DRAM_SIZE - Describes the installed DRAM.
# CONFIG_DRAM_START - The start address of DRAM (physical)
# CONFIG_DRAM_END - Last address+1 of installed RAM
# CONFIG_ARCH_NOINTC - define if the architecture does not
# support an interrupt controller or otherwise cannot support
# APIs like up_enable_irq() and up_disable_irq().
# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
# to interfaces like irq_attach() and irq_detach are the same as IRQ
# numbers that are provied to IRQ management functions like
# up_enable_irq() and up_disable_irq(). But that is not true for all
# interrupt controller implementations. For example, the PIC32MX
# interrupt controller manages interrupt sources that have a many-to-one
# relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
# must defined so that the OS logic will know not to assume it can use
# a vector number to enable or disable interrupts.
# CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
# stack. If defined, this symbol is the size of the interrupt
@ -80,6 +92,8 @@ CONFIG_BOARD_LOOPSPERMSEC=5560
CONFIG_DRAM_SIZE=(128*1024)
CONFIG_DRAM_START=0xa0000000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_NOINTC=n
CONFIG_ARCH_VECNOTIRQ=y
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_INTERRUPTSTACK=n
CONFIG_ARCH_STACKDUMP=y

26
configs/sure-pic32mx/nsh/defconfig
View File

@ -55,6 +55,30 @@
# CONFIG_DRAM_SIZE - Describes the installed DRAM.
# CONFIG_DRAM_START - The start address of DRAM (physical)
# CONFIG_DRAM_END - Last address+1 of installed RAM
# CONFIG_ARCH_NOINTC - define if the architecture does not
# support an interrupt controller or otherwise cannot support
# APIs like up_enable_irq() and up_disable_irq().
# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
# to interfaces like irq_attach() and irq_detach are the same as IRQ
# numbers that are provied to IRQ management functions like
# up_enable_irq() and up_disable_irq(). But that is not true for all
# interrupt controller implementations. For example, the PIC32MX
# interrupt controller manages interrupt sources that have a many-to-one
# relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
# must defined so that the OS logic will know not to assume it can use
# a vector number to enable or disable interrupts.
# CONFIG_ARCH_NOINTC - define if the architecture does not
# support an interrupt controller or otherwise cannot support
# APIs like up_enable_irq() and up_disable_irq().
# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
# to interfaces like irq_attach() and irq_detach are the same as IRQ
# numbers that are provied to IRQ management functions like
# up_enable_irq() and up_disable_irq(). But that is not true for all
# interrupt controller implementations. For example, the PIC32MX
# interrupt controller manages interrupt sources that have a many-to-one
# relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
# must defined so that the OS logic will know not to assume it can use
# a vector number to enable or disable interrupts.
# CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
# stack. If defined, this symbol is the size of the interrupt
@ -80,6 +104,8 @@ CONFIG_BOARD_LOOPSPERMSEC=4275
CONFIG_DRAM_SIZE=(32*1024)
CONFIG_DRAM_START=0xa0000000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_NOINTC=n
CONFIG_ARCH_VECNOTIRQ=y
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_INTERRUPTSTACK=n
CONFIG_ARCH_STACKDUMP=y

14
configs/sure-pic32mx/ostest/defconfig
View File

@ -55,6 +55,18 @@
# CONFIG_DRAM_SIZE - Describes the installed DRAM.
# CONFIG_DRAM_START - The start address of DRAM (physical)
# CONFIG_DRAM_END - Last address+1 of installed RAM
# CONFIG_ARCH_NOINTC - define if the architecture does not
# support an interrupt controller or otherwise cannot support
# APIs like up_enable_irq() and up_disable_irq().
# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
# to interfaces like irq_attach() and irq_detach are the same as IRQ
# numbers that are provied to IRQ management functions like
# up_enable_irq() and up_disable_irq(). But that is not true for all
# interrupt controller implementations. For example, the PIC32MX
# interrupt controller manages interrupt sources that have a many-to-one
# relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
# must defined so that the OS logic will know not to assume it can use
# a vector number to enable or disable interrupts.
# CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
# stack. If defined, this symbol is the size of the interrupt
@ -80,6 +92,8 @@ CONFIG_BOARD_LOOPSPERMSEC=4275
CONFIG_DRAM_SIZE=(32*1024)
CONFIG_DRAM_START=0xa0000000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_NOINTC=n
CONFIG_ARCH_VECNOTIRQ=y
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_INTERRUPTSTACK=n
CONFIG_ARCH_STACKDUMP=y

4
include/nuttx/arch.h
View File

@ -1,8 +1,8 @@
/****************************************************************************
* include/nuttx/arch.h
*
* Copyright (C) 2007-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Copyright (C) 2007-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions

20
sched/irq_attach.c
View File

@ -1,8 +1,8 @@
/****************************************************************************
* sched/irq_attach.c
*
* Copyright (C) 2007-2008, 2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Copyright (C) 2007-2008, 2010, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -91,9 +91,23 @@ int irq_attach(int irq, xcpt_t isr)
state = irqsave();
if (isr == NULL)
{
#ifndef CONFIG_ARCH_NOINTC
/* Disable the interrupt if we can before detaching it. We might
* not be able to do this if: (1) the device does not have a
* centralized interrupt controller (so up_disable_irq() is not
* supported. Or (2) if the device has different number for vector
* numbers and IRQ numbers (in that case, we don't know the correct
* IRQ number to use to disable the interrupt. In those cases, the
* code will just need to be careful that it disables all interrupt
* sources before detaching from the interrupt vector.
*/
#if !defined(CONFIG_ARCH_NOINTC) && !defined(CONFIG_ARCH_VECNOTIRQ)
up_disable_irq(irq);
#endif
/* Detaching the ISR really means re-attaching it to the
* unexpected exception handler.
*/
isr = irq_unexpected_isr;
}