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goldfish & qemu: handle MMU table and CONFIG_RAM_END

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Reproduce:

configure:
./tools/configure.sh qemu-armv7a:nsh -j8
open kasan:
CONFIG_MM_KASAN=y
run:
qemu-system-arm -cpu cortex-a7 -nographic -machine virt,virtualization=off,gic-version=2 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
error:
run hanged

Rootcause:

In Qemu armv7a, the ram-end reserved for MMU PGTABLE:

And the up_allocate_heap()  directly use the ram-end for heap in arch/arm/src/common/arm_allocateheap.c

*heap_size  = CONFIG_RAM_END - g_idle_topstack;

Then they are conflict.
Usually, we won't use the heap end, so can't find the error.
BUT, the KASAN will use the heap end for shadow, so found the error.

Resolve:

up_allocate_heap() consider of MMU, re-define the RAM_END at chip.h

Signed-off-by: ligd <liguiding1@xiaomi.com>
This commit is contained in:
ligd 2024-01-18 23:27:04 +08:00 committed by Masayuki Ishikawa
parent a20b3e8335
commit 113ab704c7
4 changed files with 17 additions and 5 deletions
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5
arch/arm/src/armv7-a/mmu.h
View File

@ -645,7 +645,10 @@
* require up to 16Kb of memory.
*/
#define PGTABLE_SIZE 0x00004000
#ifndef PGTABLE_SIZE
# define PGTABLE_SIZE 0x00004000
#endif
#ifdef CONFIG_ARCH_ADDRENV
# define ALL_PGTABLE_SIZE (PGTABLE_SIZE * CONFIG_SMP_NCPUS)
#else

1
arch/arm/src/common/arm_allocateheap.c
View File

@ -36,6 +36,7 @@
#include <arch/board/board.h>
#include "arm_internal.h"
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions

8
arch/arm/src/goldfish/chip.h
View File

@ -35,8 +35,12 @@
#define MPCORE_ICD_OFFSET 0x0000
#define MPCORE_ICC_OFFSET 0x10000
#define PGTABLE_BASE_PADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - ALL_PGTABLE_SIZE)
#define PGTABLE_BASE_VADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - ALL_PGTABLE_SIZE)
#define PGTABLE_SIZE 0x00004000
#define PGTABLE_BASE_PADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - PGTABLE_SIZE * CONFIG_SMP_NCPUS)
#define PGTABLE_BASE_VADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - PGTABLE_SIZE * CONFIG_SMP_NCPUS)
#undef CONFIG_RAM_END
#define CONFIG_RAM_END PGTABLE_BASE_PADDR
#define NUTTX_TEXT_VADDR (CONFIG_FLASH_VSTART & 0xfff00000)
#define NUTTX_TEXT_PADDR (CONFIG_FLASH_VSTART & 0xfff00000)

8
arch/arm/src/qemu/chip.h
View File

@ -35,8 +35,12 @@
#define MPCORE_ICD_OFFSET 0x0000
#define MPCORE_ICC_OFFSET 0x10000
#define PGTABLE_BASE_PADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - ALL_PGTABLE_SIZE)
#define PGTABLE_BASE_VADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - ALL_PGTABLE_SIZE)
#define PGTABLE_SIZE 0x00004000
#define PGTABLE_BASE_PADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - PGTABLE_SIZE * CONFIG_SMP_NCPUS)
#define PGTABLE_BASE_VADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - PGTABLE_SIZE * CONFIG_SMP_NCPUS)
#undef CONFIG_RAM_END
#define CONFIG_RAM_END PGTABLE_BASE_PADDR
#define NUTTX_TEXT_VADDR (CONFIG_FLASH_VSTART & 0xfff00000)
#define NUTTX_TEXT_PADDR (CONFIG_FLASH_VSTART & 0xfff00000)