arch/xtensa/esp32s3: add UART2 support
This commits adds support of UART2 for EPS32S3 and fixes pin mode assignment for iomux mode Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
Petro Karashchenko
Xiang Xiao
parent
0efd4d0e12
commit
12ea47b10f
@ -52,13 +52,20 @@
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#undef CONSOLE_UART
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_ESP32S3_UART0)
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# define CONSOLE_UART 1
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_ESP32S3_UART1)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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# define CONSOLE_UART 1
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_ESP32S3_UART2)
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# define CONSOLE_UART 1
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#else
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# undef CONFIG_UART0_SERIAL_CONSOLE
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# undef CONFIG_UART1_SERIAL_CONSOLE
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# undef CONFIG_UART2_SERIAL_CONSOLE
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#endif
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#ifdef CONFIG_ESP32S3_USBSERIAL
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@ -46,11 +46,12 @@
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#include "hardware/esp32s3_soc.h"
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#include "esp32s3_clockconfig.h"
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#include "esp32s3_config.h"
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#include "esp32s3_gpio.h"
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#include "esp32s3_lowputc.h"
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#include "esp32s3_periph.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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@ -142,6 +143,45 @@ struct esp32s3_uart_s g_uart1_config =
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};
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#endif /* CONFIG_ESP32S3_UART1 */
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#ifdef CONFIG_ESP32S3_UART2
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struct esp32s3_uart_s g_uart2_config =
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{
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.periph = ESP32S3_PERIPH_UART2,
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.id = 2,
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.cpuint = -ENOMEM,
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.irq = ESP32S3_IRQ_UART2,
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.baud = CONFIG_UART2_BAUD,
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.bits = CONFIG_UART2_BITS,
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.parity = CONFIG_UART2_PARITY,
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.stop_b2 = CONFIG_UART2_2STOP,
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.int_pri = ESP32S3_INT_PRIO_DEF,
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.txpin = CONFIG_ESP32S3_UART2_TXPIN,
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.txsig = U2TXD_OUT_IDX,
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.rxpin = CONFIG_ESP32S3_UART2_RXPIN,
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.rxsig = U2RXD_IN_IDX,
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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.rtspin = CONFIG_ESP32S3_UART2_RTSPIN,
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.rtssig = U2RTS_OUT_IDX,
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#ifdef CONFIG_UART2_IFLOWCONTROL
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.iflow = true, /* input flow control (RTS) enabled */
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#else
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.iflow = false, /* input flow control (RTS) disabled */
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#endif
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#endif
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#ifdef CONFIG_SERIAL_OFLOWCONTROL
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.ctspin = CONFIG_ESP32S3_UART2_CTSPIN,
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.ctssig = U2CTS_IN_IDX,
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#ifdef CONFIG_UART1_OFLOWCONTROL
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.oflow = true, /* output flow control (CTS) enabled */
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#else
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.oflow = false, /* output flow control (CTS) disabled */
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#endif
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#endif
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};
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#endif /* CONFIG_ESP32S3_UART2 */
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#endif /* HAVE_UART_DEVICE */
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/****************************************************************************
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@ -399,12 +439,11 @@ void esp32s3_lowputc_set_sclk(const struct esp32s3_uart_s *priv,
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uint32_t esp32s3_lowputc_get_sclk(const struct esp32s3_uart_s * priv)
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{
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uint32_t clk_conf_reg;
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uint32_t ret = -ENODATA;
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clk_conf_reg = getreg32(UART_CLK_CONF_REG(priv->id));
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clk_conf_reg &= UART_SCLK_SEL_M;
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clk_conf_reg >>= UART_SCLK_SEL_S;
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switch (clk_conf_reg)
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uint32_t clk_conf;
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uint32_t ret = -ENODATA;
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clk_conf = REG_MASK(getreg32(UART_CLK_CONF_REG(priv->id)), UART_SCLK_SEL);
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switch (clk_conf)
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{
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case 1:
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ret = esp_clk_apb_freq();
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@ -432,7 +471,7 @@ uint32_t esp32s3_lowputc_get_sclk(const struct esp32s3_uart_s * priv)
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*
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****************************************************************************/
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void esp32s3_lowputc_baud(const struct esp32s3_uart_s * priv)
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void esp32s3_lowputc_baud(const struct esp32s3_uart_s *priv)
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{
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int sclk_div;
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uint32_t sclk_freq;
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@ -495,7 +534,7 @@ void esp32s3_lowputc_baud(const struct esp32s3_uart_s * priv)
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*
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****************************************************************************/
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void esp32s3_lowputc_normal_mode(const struct esp32s3_uart_s * priv)
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void esp32s3_lowputc_normal_mode(const struct esp32s3_uart_s *priv)
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{
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/* Disable RS485 mode */
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@ -520,7 +559,7 @@ void esp32s3_lowputc_normal_mode(const struct esp32s3_uart_s * priv)
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*
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****************************************************************************/
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void esp32s3_lowputc_parity(const struct esp32s3_uart_s * priv)
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void esp32s3_lowputc_parity(const struct esp32s3_uart_s *priv)
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{
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if (priv->parity == UART_PARITY_DISABLE)
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{
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@ -547,7 +586,7 @@ void esp32s3_lowputc_parity(const struct esp32s3_uart_s * priv)
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*
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****************************************************************************/
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int esp32s3_lowputc_data_length(const struct esp32s3_uart_s * priv)
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int esp32s3_lowputc_data_length(const struct esp32s3_uart_s *priv)
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{
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int ret = OK;
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uint32_t length = priv->bits - 5;
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@ -608,10 +647,8 @@ void esp32s3_lowputc_stop_length(const struct esp32s3_uart_s *priv)
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void esp32s3_lowputc_set_tx_idle_time(const struct esp32s3_uart_s *priv,
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uint32_t time)
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{
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time = time << UART_TX_IDLE_NUM_S;
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time = time & UART_TX_IDLE_NUM_M; /* Just in case value overloads */
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modifyreg32(UART_IDLE_CONF_REG(priv->id), UART_TX_IDLE_NUM_M,
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time);
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VALUE_TO_FIELD(time, UART_TX_IDLE_NUM));
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}
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/****************************************************************************
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@ -626,10 +663,26 @@ void esp32s3_lowputc_set_tx_idle_time(const struct esp32s3_uart_s *priv,
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*
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****************************************************************************/
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void esp32s3_lowputc_send_byte(const struct esp32s3_uart_s * priv,
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void esp32s3_lowputc_send_byte(const struct esp32s3_uart_s *priv,
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char byte)
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{
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putreg32((uint32_t) byte, UART_FIFO_REG(priv->id));
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putreg32((uint32_t)byte, UART_FIFO_REG(priv->id));
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}
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/****************************************************************************
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* Name: esp32s3_lowputc_enable_sysclk
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*
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* Description:
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* Enable clock for the UART using the System register.
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*
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* Parameters:
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* priv - Pointer to the private driver struct.
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*
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****************************************************************************/
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void esp32s3_lowputc_enable_sysclk(const struct esp32s3_uart_s *priv)
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{
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esp32s3_periph_module_enable(PERIPH_UART0_MODULE + priv->id);
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}
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/****************************************************************************
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@ -648,13 +701,9 @@ void esp32s3_lowputc_send_byte(const struct esp32s3_uart_s * priv,
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bool esp32s3_lowputc_is_tx_fifo_full(const struct esp32s3_uart_s *priv)
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{
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uint32_t reg;
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reg = getreg32(UART_STATUS_REG(priv->id));
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reg = reg >> UART_TXFIFO_CNT_S;
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reg = reg & UART_TXFIFO_CNT_V;
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return !(reg < (UART_TX_FIFO_SIZE - 1));
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uint32_t val;
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val = REG_MASK(getreg32(UART_STATUS_REG(priv->id)), UART_TXFIFO_CNT);
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return val >= (UART_TX_FIFO_SIZE - 1);
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}
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/****************************************************************************
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@ -803,10 +852,12 @@ void esp32s3_lowputc_config_pins(const struct esp32s3_uart_s *priv)
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if (uart_is_iomux(priv))
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{
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esp32s3_configgpio(priv->txpin, OUTPUT_FUNCTION_1);
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esp32s3_gpio_matrix_out(priv->txpin, SIG_GPIO_OUT_IDX, 0, 0);
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esp32s3_configgpio(priv->txpin, priv->id == 1 ? OUTPUT_FUNCTION_3 :
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OUTPUT_FUNCTION_1);
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esp32s3_configgpio(priv->rxpin, INPUT_FUNCTION_1);
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esp32s3_configgpio(priv->rxpin, priv->id == 1 ? INPUT_FUNCTION_3 :
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INPUT_FUNCTION_1);
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esp32s3_gpio_matrix_out(priv->rxpin, SIG_GPIO_OUT_IDX, 0, 0);
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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@ -827,8 +878,8 @@ void esp32s3_lowputc_config_pins(const struct esp32s3_uart_s *priv)
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}
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else
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{
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esp32s3_configgpio(priv->txpin, OUTPUT_FUNCTION_2);
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esp32s3_gpio_matrix_out(priv->txpin, priv->txsig, 0, 0);
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esp32s3_configgpio(priv->txpin, OUTPUT_FUNCTION_2);
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esp32s3_configgpio(priv->rxpin, INPUT_FUNCTION_2);
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esp32s3_gpio_matrix_in(priv->rxpin, priv->rxsig, 0);
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@ -893,6 +944,8 @@ void xtensa_lowputc(char ch)
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struct esp32s3_uart_s *priv = &g_uart0_config;
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#elif defined (CONFIG_UART1_SERIAL_CONSOLE)
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struct esp32s3_uart_s *priv = &g_uart1_config;
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#elif defined (CONFIG_UART2_SERIAL_CONSOLE)
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struct esp32s3_uart_s *priv = &g_uart2_config;
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#endif
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/* Wait until the TX FIFO has space to insert new char */
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@ -918,15 +971,18 @@ void esp32s3_lowsetup(void)
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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#ifdef CONFIG_ESP32S3_UART0
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esp32s3_lowputc_enable_sysclk(&g_uart0_config);
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esp32s3_lowputc_config_pins(&g_uart0_config);
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#endif
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#ifdef CONFIG_ESP32S3_UART1
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esp32s3_lowputc_enable_sysclk(&g_uart1_config);
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esp32s3_lowputc_config_pins(&g_uart1_config);
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#endif
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#ifdef CONFIG_ESP32S3_UART2
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esp32s3_lowputc_enable_sysclk(&g_uart2_config);
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esp32s3_lowputc_config_pins(&g_uart2_config);
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#endif
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#endif /* !CONFIG_SUPPRESS_UART_CONFIG */
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@ -44,6 +44,8 @@
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#include "hardware/esp32s3_uart.h"
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#include "hardware/esp32s3_gpio_sigmap.h"
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#include "esp32s3_config.h"
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/****************************************************************************
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* Public Types
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****************************************************************************/
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@ -121,6 +123,7 @@ struct esp32s3_uart_s
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extern struct esp32s3_uart_s g_uart0_config;
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extern struct esp32s3_uart_s g_uart1_config;
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extern struct esp32s3_uart_s g_uart2_config;
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/****************************************************************************
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* Public Function Prototypes
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@ -607,9 +607,6 @@ void IRAM_ATTR esp32s3_perip_clk_init(void)
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#endif
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#ifndef CONFIG_UART1_SERIAL_CONSOLE
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SYSTEM_UART1_CLK_EN |
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#endif
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#ifndef CONFIG_UART2_SERIAL_CONSOLE
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SYSTEM_UART2_CLK_EN |
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#endif
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SYSTEM_USB_CLK_EN |
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SYSTEM_SPI2_CLK_EN |
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@ -629,7 +626,9 @@ void IRAM_ATTR esp32s3_perip_clk_init(void)
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SYSTEM_SPI3_DMA_CLK_EN |
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SYSTEM_PWM2_CLK_EN |
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SYSTEM_PWM3_CLK_EN;
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common_perip_clk1 = 0;
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#ifndef CONFIG_UART2_SERIAL_CONSOLE
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common_perip_clk1 = SYSTEM_UART2_CLK_EN;
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#endif
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hwcrypto_perip_clk = SYSTEM_CRYPTO_AES_CLK_EN |
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SYSTEM_CRYPTO_SHA_CLK_EN |
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SYSTEM_CRYPTO_RSA_CLK_EN;
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@ -650,9 +649,6 @@ void IRAM_ATTR esp32s3_perip_clk_init(void)
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#endif
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#ifndef CONFIG_UART1_SERIAL_CONSOLE
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SYSTEM_UART1_CLK_EN |
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#endif
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#ifndef CONFIG_UART2_SERIAL_CONSOLE
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SYSTEM_UART2_CLK_EN |
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#endif
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SYSTEM_USB_CLK_EN |
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SYSTEM_SPI2_CLK_EN |
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@ -666,7 +662,9 @@ void IRAM_ATTR esp32s3_perip_clk_init(void)
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SYSTEM_I2S1_CLK_EN |
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SYSTEM_SPI2_DMA_CLK_EN |
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SYSTEM_SPI3_DMA_CLK_EN;
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common_perip_clk1 = 0;
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#ifndef CONFIG_UART2_SERIAL_CONSOLE
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common_perip_clk1 |= SYSTEM_UART2_CLK_EN;
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#endif
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/* Disable some peripheral clocks. */
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@ -74,13 +74,17 @@
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#ifdef CONSOLE_UART
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# if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart0_dev /* UART0 is console */
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# define TTYS0_DEV g_uart0_dev /* UART0 is ttyS0 */
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# define CONSOLE_DEV g_uart0_dev /* UART0 is console */
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# define TTYS0_DEV g_uart0_dev /* UART0 is ttyS0 */
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# define UART0_ASSIGNED 1
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# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart1_dev /* UART1 is console */
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# define TTYS0_DEV g_uart1_dev /* UART1 is ttyS0 */
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# define UART1_ASSIGNED 1
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# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart2_dev /* UART2 is console */
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# define TTYS0_DEV g_uart2_dev /* UART2 is ttyS0 */
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# define UART2_ASSIGNED 1
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# endif /* CONFIG_UART0_SERIAL_CONSOLE */
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#else /* No UART console */
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# undef CONSOLE_DEV
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@ -90,6 +94,9 @@
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# elif defined(CONFIG_ESP32S3_UART1)
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# define TTYS0_DEV g_uart1_dev /* UART1 is ttyS0 */
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# define UART1_ASSIGNED 1
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# elif defined(CONFIG_ESP32S3_UART2)
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# define TTYS0_DEV g_uart2_dev /* UART2 is ttyS0 */
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# define UART2_ASSIGNED 1
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# endif
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#endif /* CONSOLE_UART */
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@ -106,6 +113,22 @@
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#elif defined(CONFIG_ESP32S3_UART1) && !defined(UART1_ASSIGNED)
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# define TTYS1_DEV g_uart1_dev /* UART1 is ttyS1 */
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# define UART1_ASSIGNED 1
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#elif defined(CONFIG_ESP32S3_UART2) && !defined(UART2_ASSIGNED)
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# define TTYS1_DEV g_uart2_dev /* UART2 is ttyS1 */
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# define UART2_ASSIGNED 1
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#endif
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/* Pick ttyS2 */
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#if defined(CONFIG_ESP32S3_UART0) && !defined(UART0_ASSIGNED)
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# define TTYS2_DEV g_uart0_dev /* UART0 is ttyS2 */
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# define UART0_ASSIGNED 1
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#elif defined(CONFIG_ESP32S3_UART1) && !defined(UART1_ASSIGNED)
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# define TTYS2_DEV g_uart1_dev /* UART1 is ttyS2 */
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# define UART1_ASSIGNED 1
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#elif defined(CONFIG_ESP32S3_UART2) && !defined(UART2_ASSIGNED)
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# define TTYS2_DEV g_uart2_dev /* UART2 is ttyS2 */
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# define UART2_ASSIGNED 1
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#endif
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#ifdef HAVE_UART_DEVICE
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@ -229,6 +252,39 @@ static uart_dev_t g_uart1_dev =
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#endif
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/* UART 2 */
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#ifdef CONFIG_ESP32S3_UART2
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static char g_uart2_rxbuffer[CONFIG_UART2_RXBUFSIZE];
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static char g_uart2_txbuffer[CONFIG_UART2_TXBUFSIZE];
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/* Fill only the requested fields */
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static uart_dev_t g_uart2_dev =
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{
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#ifdef CONFIG_UART2_SERIAL_CONSOLE
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.isconsole = true,
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#else
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.isconsole = false,
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#endif
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.xmit =
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{
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.size = CONFIG_UART2_TXBUFSIZE,
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.buffer = g_uart2_txbuffer,
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},
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.recv =
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{
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.size = CONFIG_UART2_RXBUFSIZE,
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.buffer = g_uart2_rxbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart2_config
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};
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#endif
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#endif /* CONFIG_ESP32S3_UART */
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/****************************************************************************
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@ -616,9 +672,9 @@ static bool esp32s3_rxavailable(struct uart_dev_s *dev)
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uint32_t bytes;
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status_reg = getreg32(UART_STATUS_REG(priv->id));
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bytes = status_reg & UART_RXFIFO_CNT_M;
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bytes = REG_MASK(status_reg, UART_RXFIFO_CNT);
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return (bytes > 0);
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return bytes > 0;
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}
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/****************************************************************************
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@ -665,9 +721,9 @@ static bool esp32s3_txempty(struct uart_dev_s *dev)
|
||||
struct esp32s3_uart_s *priv = dev->priv;
|
||||
|
||||
reg = getreg32(UART_INT_RAW_REG(priv->id));
|
||||
reg = reg & UART_TXFIFO_EMPTY_INT_RAW_M;
|
||||
reg = REG_MASK(reg, UART_TX_DONE_INT_RAW);
|
||||
|
||||
return (reg > 0);
|
||||
return reg > 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -709,8 +765,7 @@ static int esp32s3_receive(struct uart_dev_s *dev, unsigned int *status)
|
||||
uint32_t rx_fifo;
|
||||
struct esp32s3_uart_s *priv = dev->priv;
|
||||
|
||||
rx_fifo = getreg32(UART_FIFO_REG(priv->id));
|
||||
rx_fifo = rx_fifo & UART_RXFIFO_RD_BYTE_M;
|
||||
rx_fifo = REG_MASK(getreg32(UART_FIFO_REG(priv->id)), UART_RXFIFO_RD_BYTE);
|
||||
|
||||
/* Since we don't have error bits associated with receipt, we set zero */
|
||||
|
||||
@ -1056,6 +1111,10 @@ void xtensa_earlyserialinit(void)
|
||||
esp32s3_lowputc_disable_all_uart_int(TTYS1_DEV.priv, NULL);
|
||||
#endif
|
||||
|
||||
#ifdef TTYS2_DEV
|
||||
esp32s3_lowputc_disable_all_uart_int(TTYS2_DEV.priv, NULL);
|
||||
#endif
|
||||
|
||||
/* Configure console in early step.
|
||||
* Setup for other serials will be perfomed when the serial driver is
|
||||
* open.
|
||||
@ -1091,6 +1150,10 @@ void xtensa_serialinit(void)
|
||||
uart_register("/dev/ttyS1", &TTYS1_DEV);
|
||||
#endif
|
||||
|
||||
#ifdef TTYS2_DEV
|
||||
uart_register("/dev/ttyS2", &TTYS2_DEV);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S3_USBSERIAL
|
||||
uart_register("/dev/ttyACM0", &TTYACM0_DEV);
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user