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Minimal changes to get a clean compilation of the SAMD20 Xplained configuration. Still a lot of missing logic

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This commit is contained in:
Gregory Nutt 2014-02-13 09:14:03 -06:00
parent 1bd5ff87c4
commit 1364850552
15 changed files with 870 additions and 173 deletions
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11
arch/arm/include/samd/chip.h
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@ -304,6 +304,17 @@
# define SAMD_WDT /* Have watchdog timer */
#endif
/* NVIC priority levels *************************************************************/
/* Each priority field holds a priority value, 0-3. The lower the value, the greater
* the priority of the corresponding interrupt. The processor implements only
* bits[7:6] of each field, bits[5:0] read as zero and ignore writes.
*/
#define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:3] set is minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Five bits of interrupt priority used */
/************************************************************************************
* Public Types
************************************************************************************/

52
arch/arm/src/samd/chip/sam_pinmap.h Normal file
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@ -0,0 +1,52 @@
/************************************************************************************
* arch/arm/src/samd/chip/sam_pinmap.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMD_CHIP_SAM_PINMAP_H
#define __ARCH_ARM_SRC_SAMD_CHIP_SAM_PINMAP_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <arch/samd/chip.h>
#if defined(SAMD20)
# include "chip/samd20_pinmap.h"
#else
# error Unrecognized SAMD architecture
#endif
#endif /* __ARCH_ARM_SRC_SAMD_CHIP_SAM_PINMAP_H */

126
arch/arm/src/samd/sam_gpio.h → arch/arm/src/samd/chip/sam_port.h
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@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/samd/sam_gpio.h
/********************************************************************************************
* arch/arm/src/samd/chip/sam_port.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -31,116 +31,44 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMD_SAM_GPIO_H
#define __ARCH_ARM_SRC_SAMD_SAM_GPIO_H
#ifndef __ARCH_ARM_SRC_SAMD_CHIP_SAM_PORT_H
#define __ARCH_ARM_SRC_SAMD_CHIP_SAM_PORT_H
/****************************************************************************
/********************************************************************************************
* Included Files
****************************************************************************/
********************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
# include <stdbool.h>
#endif
#include <nuttx/irq.h>
#include "chip.h"
#include "chip/sam_gpio.h"
/****************************************************************************
* Pre-processor Declarations
****************************************************************************/
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/* PORT register offsets ********************************************************************/
/* Bit-encoded input to sam_configgpio() */
#warning Missing logic
/****************************************************************************
/* PORT register addresses ******************************************************************/
#warning Missing logic
/* PORT register bit definitions ************************************************************/
#warning Missing logic
/********************************************************************************************
* Public Types
****************************************************************************/
********************************************************************************************/
typedef uint16_t gpio_cfgset_t;
#warning REVISIT
/****************************************************************************
/********************************************************************************************
* Public Data
****************************************************************************/
********************************************************************************************/
#ifndef __ASSEMBLY__
/********************************************************************************************
* Public Functions
********************************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: sam_configgpio
*
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
* Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...)
* function, it must be unconfigured with sam_unconfiggpio() with
* the same cfgset first before it can be set to non-alternative function.
*
* Returns:
* OK on success
* ERROR on invalid port, or when pin is locked as ALT function.
*
****************************************************************************/
int sam_configgpio(gpio_cfgset_t cfgset);
/****************************************************************************
* Name: sam_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void sam_gpiowrite(gpio_cfgset_t pinset, bool value);
/****************************************************************************
* Name: sam_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool sam_gpioread(gpio_cfgset_t pinset);
/****************************************************************************
* Function: sam_dumpgpio
*
* Description:
* Dump all GPIO registers associated with the provided pin description
* along with a descriptive message.
*
****************************************************************************/
#ifdef CONFIG_DEBUG
void sam_dumpgpio(gpio_cfgset_t pinset, const char *msg);
#else
# define sam_dumpgpio(p,m)
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMD_SAM_GPIO_H */
#endif /* __ARCH_ARM_SRC_SAMD_CHIP_SAM_PORT_H */

2
arch/arm/src/samd/chip/samd20_memorymap.h
View File

@ -105,7 +105,7 @@
#define SAM_DAC_BASE 0x42004800 /* Digital-to-Analog Converter */
#define SAM_PTC_BASE 0x42004C00 /* Peripheral Touch Controller */
/********************************************************************************************
/********************************************************************************************
* Public Types
********************************************************************************************/

65
arch/arm/src/samd/chip/samd20_pinmap.h Normal file
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@ -0,0 +1,65 @@
/********************************************************************************************
* arch/arm/src/samd/chip/samd20_pinmap.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMD_CHIP_SAMD20_PINMAP_H
#define __ARCH_ARM_SRC_SAMD_CHIP_SAMD20_PINMAP_H
/********************************************************************************************
* Included Files
********************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
#warning Missing logic
/********************************************************************************************
* Public Types
********************************************************************************************/
/********************************************************************************************
* Public Data
********************************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMD_CHIP_SAMD20_PINMAP_H */

249
arch/arm/src/samd/chip/samd_port.h Executable file
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@ -0,0 +1,249 @@
/********************************************************************************************
* arch/arm/src/samd/chip/sam_port.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMD_CHIP_SAM_PORT_H
#define __ARCH_ARM_SRC_SAMD_CHIP_SAM_PORT_H
/********************************************************************************************
* Included Files
********************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/* PORT register offsets ********************************************************************/
#define SAM_PORT_DIR_OFFSET 0x0000 /* Data direction register */
#define SAM_PORT_DIRCLR_OFFSET 0x0004 /* Data direction clear register */
#define SAM_PORT_DIRSET_OFFSET 0x0008 /* Data direction set register */
#define SAM_PORT_DIRTGL_OFFSET 0x000c /* Data direction toggle register */
#define SAM_PORT_OUT_OFFSET 0x0010 /* Data output value register */
#define SAM_PORT_OUTCLR_OFFSET 0x0014 /* Data output value clear register */
#define SAM_PORT_OUTSET_OFFSET 0x0018 /* Data output value set register */
#define SAM_PORT_OUTTGL_OFFSET 0x001c /* Data output value toggle register */
#define SAM_PORT_IN_OFFSET 0x0020 /* Data input value register */
#define SAM_PORT_CTRL_OFFSET 0x0024 /* Control register */
#define SAM_PORT_WRCONFIG_OFFSET 0x0028 /* Write configuration registers */
#define SAM_PORT_PMUX_OFFSET(n) (0x0030+((n)>>1))
#define SAM_PORT_PMUX0_OFFSET 0x0030 /* Peripheral multiplexing register 0 */
#define SAM_PORT_PMUX1_OFFSET 0x0031 /* Peripheral multiplexing register 1 */
#define SAM_PORT_PMUX2_OFFSET 0x0032 /* Peripheral multiplexing register 2 */
#define SAM_PORT_PMUX3_OFFSET 0x0033 /* Peripheral multiplexing register 3 */
#define SAM_PORT_PMUX4_OFFSET 0x0034 /* Peripheral multiplexing register 4 */
#define SAM_PORT_PMUX5_OFFSET 0x0035 /* Peripheral multiplexing register 5 */
#define SAM_PORT_PMUX6_OFFSET 0x0036 /* Peripheral multiplexing register 6 */
#define SAM_PORT_PMUX7_OFFSET 0x0037 /* Peripheral multiplexing register 7 */
#define SAM_PORT_PMUX8_OFFSET 0x0038 /* Peripheral multiplexing register 8 */
#define SAM_PORT_PMUX9_OFFSET 0x0039 /* Peripheral multiplexing register 9 */
#define SAM_PORT_PMUX10_OFFSET 0x003a /* Peripheral multiplexing register 10 */
#define SAM_PORT_PMUX11_OFFSET 0x003b /* Peripheral multiplexing register 11 */
#define SAM_PORT_PMUX12_OFFSET 0x003c /* Peripheral multiplexing register 12 */
#define SAM_PORT_PMUX13_OFFSET 0x003d /* Peripheral multiplexing register 13 */
#define SAM_PORT_PMUX14_OFFSET 0x003e /* Peripheral multiplexing register 14 */
#define SAM_PORT_PMUX15_OFFSET 0x003f /* Peripheral multiplexing register 15 */
#define SAM_PORT_PINCFG_OFFSET(n) (0x0040+(n))
#define SAM_PORT_PINCFG0_OFFSET 0x0040 /* Pin configuration register 0 */
#define SAM_PORT_PINCFG1_OFFSET 0x0041 /* Pin configuration register 1 */
#define SAM_PORT_PINCFG2_OFFSET 0x0042 /* Pin configuration register 2 */
#define SAM_PORT_PINCFG3_OFFSET 0x0043 /* Pin configuration register 3 */
#define SAM_PORT_PINCFG4_OFFSET 0x0044 /* Pin configuration register 4 */
#define SAM_PORT_PINCFG5_OFFSET 0x0045 /* Pin configuration register 5 */
#define SAM_PORT_PINCFG6_OFFSET 0x0046 /* Pin configuration register 6 */
#define SAM_PORT_PINCFG7_OFFSET 0x0047 /* Pin configuration register 7 */
#define SAM_PORT_PINCFG8_OFFSET 0x0048 /* Pin configuration register 8 */
#define SAM_PORT_PINCFG9_OFFSET 0x0049 /* Pin configuration register 9 */
#define SAM_PORT_PINCFG10_OFFSET 0x004a /* Pin configuration register 10 */
#define SAM_PORT_PINCFG11_OFFSET 0x004b /* Pin configuration register 11 */
#define SAM_PORT_PINCFG12_OFFSET 0x004c /* Pin configuration register 12 */
#define SAM_PORT_PINCFG13_OFFSET 0x004d /* Pin configuration register 13 */
#define SAM_PORT_PINCFG14_OFFSET 0x004e /* Pin configuration register 14 */
#define SAM_PORT_PINCFG15_OFFSET 0x004f /* Pin configuration register 15 */
#define SAM_PORT_PINCFG16_OFFSET 0x0050 /* Pin configuration register 16 */
#define SAM_PORT_PINCFG17_OFFSET 0x0051 /* Pin configuration register 17 */
#define SAM_PORT_PINCFG18_OFFSET 0x0052 /* Pin configuration register 18 */
#define SAM_PORT_PINCFG19_OFFSET 0x0053 /* Pin configuration register 19 */
#define SAM_PORT_PINCFG20_OFFSET 0x0054 /* Pin configuration register 20 */
#define SAM_PORT_PINCFG21_OFFSET 0x0055 /* Pin configuration register 21 */
#define SAM_PORT_PINCFG22_OFFSET 0x0056 /* Pin configuration register 22 */
#define SAM_PORT_PINCFG23_OFFSET 0x0057 /* Pin configuration register 23 */
#define SAM_PORT_PINCFG24_OFFSET 0x0058 /* Pin configuration register 24 */
#define SAM_PORT_PINCFG25_OFFSET 0x0059 /* Pin configuration register 25 */
#define SAM_PORT_PINCFG26_OFFSET 0x005a /* Pin configuration register 26 */
#define SAM_PORT_PINCFG27_OFFSET 0x005b /* Pin configuration register 27 */
#define SAM_PORT_PINCFG28_OFFSET 0x005c /* Pin configuration register 28 */
#define SAM_PORT_PINCFG29_OFFSET 0x005d /* Pin configuration register 29 */
#define SAM_PORT_PINCFG30_OFFSET 0x005e /* Pin configuration register 30 */
#define SAM_PORT_PINCFG31_OFFSET 0x005f /* Pin configuration register 31 */
/* PORT register addresses ******************************************************************/
#define SAM_PORT_DIR (SAM_PORT_BASE+SAM_PORT_DIR_OFFSET)
#define SAM_PORT_DIRCLR (SAM_PORT_BASE+SAM_PORT_DIRCLR_OFFSET)
#define SAM_PORT_DIRSET (SAM_PORT_BASE+SAM_PORT_DIRSET_OFFSET)
#define SAM_PORT_DIRTGL (SAM_PORT_BASE+SAM_PORT_DIRTGL_OFFSET)
#define SAM_PORT_OUT (SAM_PORT_BASE+SAM_PORT_OUT_OFFSET)
#define SAM_PORT_OUTCLR (SAM_PORT_BASE+SAM_PORT_OUTCLR_OFFSET)
#define SAM_PORT_OUTSET (SAM_PORT_BASE+SAM_PORT_OUTSET_OFFSET)
#define SAM_PORT_OUTTGL (SAM_PORT_BASE+SAM_PORT_OUTTGL_OFFSET)
#define SAM_PORT_IN (SAM_PORT_BASE+SAM_PORT_IN_OFFSET)
#define SAM_PORT_CTRL (SAM_PORT_BASE+SAM_PORT_CTRL_OFFSET)
#define SAM_PORT_WRCONFIG (SAM_PORT_BASE+SAM_PORT_WRCONFIG_OFFSET)
#define SAM_PORT_PMUX(n) (SAM_PORT_BASE+SAM_PORT_PMUX_OFFSET(n))
#define SAM_PORT_PMUX0 (SAM_PORT_BASE+SAM_PORT_PMUX0_OFFSET)
#define SAM_PORT_PMUX1 (SAM_PORT_BASE+SAM_PORT_PMUX1_OFFSET)
#define SAM_PORT_PMUX2 (SAM_PORT_BASE+SAM_PORT_PMUX2_OFFSET)
#define SAM_PORT_PMUX3 (SAM_PORT_BASE+SAM_PORT_PMUX3_OFFSET)
#define SAM_PORT_PMUX4 (SAM_PORT_BASE+SAM_PORT_PMUX4_OFFSET)
#define SAM_PORT_PMUX5 (SAM_PORT_BASE+SAM_PORT_PMUX5_OFFSET)
#define SAM_PORT_PMUX6 (SAM_PORT_BASE+SAM_PORT_PMUX6_OFFSET)
#define SAM_PORT_PMUX7 (SAM_PORT_BASE+SAM_PORT_PMUX7_OFFSET)
#define SAM_PORT_PMUX8 (SAM_PORT_BASE+SAM_PORT_PMUX8_OFFSET)
#define SAM_PORT_PMUX9 (SAM_PORT_BASE+SAM_PORT_PMUX9_OFFSET)
#define SAM_PORT_PMUX10 (SAM_PORT_BASE+SAM_PORT_PMUX10_OFFSET)
#define SAM_PORT_PMUX11 (SAM_PORT_BASE+SAM_PORT_PMUX11_OFFSET)
#define SAM_PORT_PMUX12 (SAM_PORT_BASE+SAM_PORT_PMUX12_OFFSET)
#define SAM_PORT_PMUX13 (SAM_PORT_BASE+SAM_PORT_PMUX13_OFFSET)
#define SAM_PORT_PMUX14 (SAM_PORT_BASE+SAM_PORT_PMUX14_OFFSET)
#define SAM_PORT_PMUX15 (SAM_PORT_BASE+SAM_PORT_PMUX15_OFFSET)
#define SAM_PORT_PINCFG(n) (SAM_PORT_BASE+SAM_PORT_PINCFG_OFFSET(n))
#define SAM_PORT_PINCFG0 (SAM_PORT_BASE+SAM_PORT_PINCFG0_OFFSET)
#define SAM_PORT_PINCFG1 (SAM_PORT_BASE+SAM_PORT_PINCFG1_OFFSET)
#define SAM_PORT_PINCFG2 (SAM_PORT_BASE+SAM_PORT_PINCFG2_OFFSET)
#define SAM_PORT_PINCFG3 (SAM_PORT_BASE+SAM_PORT_PINCFG3_OFFSET)
#define SAM_PORT_PINCFG4 (SAM_PORT_BASE+SAM_PORT_PINCFG4_OFFSET)
#define SAM_PORT_PINCFG5 (SAM_PORT_BASE+SAM_PORT_PINCFG5_OFFSET)
#define SAM_PORT_PINCFG6 (SAM_PORT_BASE+SAM_PORT_PINCFG6_OFFSET)
#define SAM_PORT_PINCFG7 (SAM_PORT_BASE+SAM_PORT_PINCFG7_OFFSET)
#define SAM_PORT_PINCFG8 (SAM_PORT_BASE+SAM_PORT_PINCFG8_OFFSET)
#define SAM_PORT_PINCFG9 (SAM_PORT_BASE+SAM_PORT_PINCFG9_OFFSET)
#define SAM_PORT_PINCFG10 (SAM_PORT_BASE+SAM_PORT_PINCFG10_OFFSET)
#define SAM_PORT_PINCFG11 (SAM_PORT_BASE+SAM_PORT_PINCFG11_OFFSET)
#define SAM_PORT_PINCFG12 (SAM_PORT_BASE+SAM_PORT_PINCFG12_OFFSET)
#define SAM_PORT_PINCFG13 (SAM_PORT_BASE+SAM_PORT_PINCFG13_OFFSET)
#define SAM_PORT_PINCFG14 (SAM_PORT_BASE+SAM_PORT_PINCFG14_OFFSET)
#define SAM_PORT_PINCFG15 (SAM_PORT_BASE+SAM_PORT_PINCFG15_OFFSET)
#define SAM_PORT_PINCFG16 (SAM_PORT_BASE+SAM_PORT_PINCFG16_OFFSET)
#define SAM_PORT_PINCFG17 (SAM_PORT_BASE+SAM_PORT_PINCFG17_OFFSET)
#define SAM_PORT_PINCFG18 (SAM_PORT_BASE+SAM_PORT_PINCFG18_OFFSET)
#define SAM_PORT_PINCFG19 (SAM_PORT_BASE+SAM_PORT_PINCFG19_OFFSET)
#define SAM_PORT_PINCFG20 (SAM_PORT_BASE+SAM_PORT_PINCFG20_OFFSET)
#define SAM_PORT_PINCFG21 (SAM_PORT_BASE+SAM_PORT_PINCFG21_OFFSET)
#define SAM_PORT_PINCFG22 (SAM_PORT_BASE+SAM_PORT_PINCFG22_OFFSET)
#define SAM_PORT_PINCFG23 (SAM_PORT_BASE+SAM_PORT_PINCFG23_OFFSET)
#define SAM_PORT_PINCFG24 (SAM_PORT_BASE+SAM_PORT_PINCFG24_OFFSET)
#define SAM_PORT_PINCFG25 (SAM_PORT_BASE+SAM_PORT_PINCFG25_OFFSET)
#define SAM_PORT_PINCFG26 (SAM_PORT_BASE+SAM_PORT_PINCFG26_OFFSET)
#define SAM_PORT_PINCFG27 (SAM_PORT_BASE+SAM_PORT_PINCFG27_OFFSET)
#define SAM_PORT_PINCFG28 (SAM_PORT_BASE+SAM_PORT_PINCFG28_OFFSET)
#define SAM_PORT_PINCFG29 (SAM_PORT_BASE+SAM_PORT_PINCFG29_OFFSET)
#define SAM_PORT_PINCFG30 (SAM_PORT_BASE+SAM_PORT_PINCFG30_OFFSET)
#define SAM_PORT_PINCFG31 (SAM_PORT_BASE+SAM_PORT_PINCFG31_OFFSET)
/* PORT register bit definitions ************************************************************/
/* Data direction, data direction clear, data direction set, and data direction toggle
* registers
*/
#define PORT_DIR(n) (1 << n) /* Port data n, direction, n=0-31 */
/* Data output value, data output value clear, data output value set, and data output
* value toggle registers
*/
#define PORT_OUT(n) (1 << n) /* Port data n output value, n=0-31 */
/* Data input value register */
#define PORT_IN(n) (1 << n) /* Port n data input value, n=0-31 */
/* Control register */
#define PORT_CTRL(n) (1 << n) /* Port n input sampling mode, n=0-31 */
/* Write configuration registers */
#define PORT_WRCONFIG_PINMASK_SHIFT (0) /* Bits 0-15: Pin Mask for Multiple Pin Configuration */
#define PORT_WRCONFIG_PINMASK_MASK (0xffff << PORT_WRCONFIG_PINMASK_SHIFT)
# define PORT_WRCONFIG_PINMASK(n) (1 << (PORT_WRCONFIG_PINMASK_SHIFT+(n)))
#define PORT_WRCONFIG_PMUXEN (1 << 16) /* Bit 16: Peripheral Multiplexer Enable */
#define PORT_WRCONFIG_INEN (1 << 17) /* Bit 17: Input Enable */
#define PORT_WRCONFIG_PULLEN (1 << 18) /* Bit 18: Pull Enable */
#define PORT_WRCONFIG_DRVSTR (1 << 22) /* Bit 22: Output Driver Strength Selection */
#define PORT_WRCONFIG_PMUX_SHIFT (24) /* Bits 24-27: Peripheral Multiplexing */
#define PORT_WRCONFIG_PMUX_MASK (15 << PORT_WRCONFIG_PMUX_SHIFT)
#define PORT_WRCONFIG_WRPMUX (1 << 28) /* Bit 28: Write PMUX */
#define PORT_WRCONFIG_WRPINCFG (1 << 30) /* Bit 30: Write PINCFG */
#define PORT_WRCONFIG_HWSEL (1 << 31) /* Bit 31: Half-Word Select */
/* Peripheral multiplexing registers */
#define PORT_PMUX_PERIPHA 0x00 /* Peripheral function A */
#define PORT_PMUX_PERIPHB 0x01 /* Peripheral function B */
#define PORT_PMUX_PERIPHC 0x02 /* Peripheral function C */
#define PORT_PMUX_PERIPHD 0x03 /* Peripheral function D */
#define PORT_PMUX_PERIPHE 0x04 /* Peripheral function E */
#define PORT_PMUX_PERIPHF 0x05 /* Peripheral function F */
#define PORT_PMUX_PERIPHG 0x06 /* Peripheral function G */
#define PORT_PMUX_PERIPHH 0x07 /* Peripheral function H */
/* Pin configuration registers */
#define PORT_PINCFG_PMUXEN (1 << 0) /* Bit 0: Peripheral Multiplexer Enable */
#define PORT_PINCFG_INEN (1 << 1) /* Bit 1: Input Enable */
#define PORT_PINCFG_PULLEN (1 << 2) /* Bit 2: Pull Enable */
#define PORT_PINCFG_DRVSTR (1 << 6) /* Bit 6: Output Driver Strength Selection */
/********************************************************************************************
* Public Types
********************************************************************************************/
/********************************************************************************************
* Public Data
********************************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMD_CHIP_SAM_PORT_H */

392
arch/arm/src/samd/sam_port.h Normal file
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@ -0,0 +1,392 @@
/****************************************************************************
* arch/arm/src/samd/sam_port.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMD_SAM_PORT_H
#define __ARCH_ARM_SRC_SAMD_SAM_PORT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
# include <stdbool.h>
#endif
#include <nuttx/irq.h>
#include "chip.h"
#include "chip/sam_port.h"
/****************************************************************************
* Pre-processor Declarations
****************************************************************************/
/* Bit-encoded input to sam_configport() */
/* 24-bit Encoding. This could be compacted into 16-bits by making the bit usage
* mode specific. However, by giving each bit field a unique position, we handle
* bad combinations of properties safely.
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: MMRR .... .SB. II.. ..PB BBBB
* PORT Output: MM.. .... D..V .... ..PB BBBB
* Peripheral: MM.. FFF. .... II.. ..PB BBBB
* ------------ -----------------------------
* MMRR FFF. DSBV II.. ..PB BBBB
*/
/* Input/output/peripheral mode:
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: MM.. .... .... .... .... ....
* PORT Output: MM.. .... .... .... .... ....
* Peripheral: MM.. .... .... .... .... ....
*/
#define PORT_MODE_SHIFT (22) /* Bits 22-23: PORT mode */
#define PORT_MODE_MASK (3 << PORT_MODE_SHIFT)
# define PORT_INPUT (0 << PORT_MODE_SHIFT) /* PORT Input */
# define PORT_OUTPUT (1 << PORT_MODE_SHIFT) /* PORT Output */
# define PORT_PERIPHERAL (2 << PORT_MODE_SHIFT) /* Controlled by peripheral */
# define PORT_INTERRUPT (3 << PORT_MODE_SHIFT) /* Interrupting input */
/* Pull-up/down resistor control for inputs
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: ..RR .... .... .... .... ....
* PORT Output: .... .... .... .... .... ....
* Peripheral: .... .... .... .... .... ....
*/
#define PORT_PULL_SHIFT (20) /* Bits 20-21: Pull-up/down resistor control */
#define PORT_PULL_MASK (3 << PORT_FUNC_SHIFT)
# define PORT_PULL_NONE (0 << PORT_FUNC_SHIFT)
# define PORT_PULL_UP (1 << PORT_FUNC_SHIFT)
# define PORT_PULL_DOWN (2 << PORT_FUNC_SHIFT)
/* Peripheral Function
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: .... .... .... .... .... ....
* PORT Output: .... .... .... .... .... ....
* Peripheral: .... FFF. .... .... .... ....
*/
#define PORT_FUNC_SHIFT (17) /* Bits 17-19: Peripheral function */
#define PORT_FUNC_MASK (7 << PORT_FUNC_SHIFT)
# define _PORT_FUNCA (0 << PORT_FUNC_SHIFT) /* Function A */
# define _PORT_FUNCB (1 << PORT_FUNC_SHIFT) /* Function B */
# define _PORT_FUNCC (2 << PORT_FUNC_SHIFT) /* Function C */
# define _PORT_FUNCD (3 << PORT_FUNC_SHIFT) /* Function D */
# define _PORT_FUNCE (4 << PORT_FUNC_SHIFT) /* Function E */
# define _PORT_FUNCF (5 << PORT_FUNC_SHIFT) /* Function F */
# define _PORT_FUNCG (6 << PORT_FUNC_SHIFT) /* Function G */
# define _PORT_FUNCH (7 << PORT_FUNC_SHIFT) /* Function H */
/* Extended input/output/peripheral mode:
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: .... .... .... .... .... ....
* PORT Output: .... .... .... .... .... ....
* Peripheral: MM.. FFF. .... .... .... ....
*/
#define PORT_FUNCA (PORT_PERIPHERAL | _PORT_FUNCA) /* Function A */
#define PORT_FUNCB (PORT_PERIPHERAL | _PORT_FUNCB) /* Function B */
#define PORT_FUNCC (PORT_PERIPHERAL | _PORT_FUNCC) /* Function C */
#define PORT_FUNCD (PORT_PERIPHERAL | _PORT_FUNCD) /* Function D */
#define PORT_FUNCE (PORT_PERIPHERAL | _PORT_FUNCE) /* Function E */
#define PORT_FUNCF (PORT_PERIPHERAL | _PORT_FUNCF) /* Function F */
#define PORT_FUNCG (PORT_PERIPHERAL | _PORT_FUNCG) /* Function G */
#define PORT_FUNCH (PORT_PERIPHERAL | _PORT_FUNCH) /* Function H */
/* Output drive control
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: .... .... .... .... .... ....
* PORT Output: .... .... D... .... .... ....
* Peripheral: .... .... .... .... .... ....
*/
#define PORT_DRIVE_SHIFT (15) /* Bit 15: Interrupting input control */
#define PORT_DRIVE_MASK (1 << PORT_INT_SHIFT)
# define PORT_DRIVE_LOW (0 << PORT_INT_SHIFT)
# define PORT_DRIVE_HIGH (1 << PORT_INT_SHIFT)
/* Input sampling
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: .... .... .S.. .... .... ....
* PORT Output: .... .... .... .... .... ....
* Peripheral: .... .... .... .... .... ....
*/
#define PORT_SYNCHRONIZER_SHIFT (14) /* Bit 14: Input synchronizer input control */
#define PORT_SYNCHRONIZER_MASK (1 << PORT_SYNCHRONIZER_SHIFT)
# define PORT_SYNCHRONIZER_OFF (0 << PORT_SYNCHRONIZER_SHIFT)
# define PORT_SYNCHRONIZER_ON (1 << PORT_SYNCHRONIZER_SHIFT)
/* Input buffering
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: .... .... ..B. .... .... ....
* PORT Output: .... .... .... .... .... ....
* Peripheral: .... .... .... .... .... ....
*/
#define PORT_INBUFFER_SHIFT (13) /* Bit 13: Input buffer enable */
#define PORT_INBUFFER_MASK (1 << PORT_SYNCHRONIZER_SHIFT)
# define PORT_INBUFFER_OFF (0 << PORT_SYNCHRONIZER_SHIFT)
# define PORT_INBUFFER_ON (1 << PORT_SYNCHRONIZER_SHIFT)
/* If the pin is an PORT output, then this identifies the initial output value:
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: .... .... .... .... .... ....
* PORT Output: .... .... ...V .... .... ....
* Peripheral: .... .... .... .... .... ....
*/
#define PORT_OUTVALUE_SHIFT (12) /* Bit 12: Initial value of output */
#define PORT_OUTVALUE_MASK (1 << PORT_SYNCHRONIZER_SHIFT)
# define PORT_OUTPUT_CLEAR (0 << PORT_SYNCHRONIZER_SHIFT)
# define PORT_OUTPUT_SET (1 << PORT_SYNCHRONIZER_SHIFT)
/* Selections for an interrupting input and peripheral events:
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: .... .... .... II.. .... ....
* PORT Output: .... .... .... .... .... ....
* Peripheral: .... .... .... II.. .... ....
*/
#define PORT_INT_SHIFT (10) /* Bits 10-11: Interrupting input control */
#define PORT_INT_MASK (3 << PORT_INT_SHIFT)
# define PORT_INT_CHANGE (0 << PORT_INT_SHIFT) /* Pin change */
# define PORT_INT_RISING (1 << PORT_INT_SHIFT) /* Rising edge */
# define PORT_INT_FALLING (2 << PORT_INT_SHIFT) /* Falling edge */
/* This identifies the PORT port:
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: .... .... .... .... ..P. ....
* PORT Output: .... .... .... .... ..P. ....
* Peripheral: .... .... .... .... ..P. ....
*/
#define PORT_PORT_SHIFT (5) /* Bit 5: Port number */
#define PORT_PORT_MASK (1 << PORT_PORT_SHIFT)
# define PORT_PORTA (0 << PORT_PORT_SHIFT)
# define PORT_PORTB (1 << PORT_PORT_SHIFT)
/* This identifies the bit in the port:
*
* MODE BITFIELDS
* ------------ -----------------------------
* 2222 1111 1111 1100 0000 0000
* 3210 9876 5432 1098 7654 3210
* ------------ -----------------------------
* PORT Input: .... .... .... .... ...B BBBB
* PORT Output: .... .... .... .... ...B BBBB
* Peripheral: .... .... .... .... ...B BBBB
*/
#define PORT_PIN_SHIFT 0 /* Bits 0-4: PORT number: 0-31 */
#define PORT_PIN_MASK (31 << PORT_PIN_SHIFT)
#define PORT_PIN0 (0 << PORT_PIN_SHIFT)
#define PORT_PIN1 (1 << PORT_PIN_SHIFT)
#define PORT_PIN2 (2 << PORT_PIN_SHIFT)
#define PORT_PIN3 (3 << PORT_PIN_SHIFT)
#define PORT_PIN4 (4 << PORT_PIN_SHIFT)
#define PORT_PIN5 (5 << PORT_PIN_SHIFT)
#define PORT_PIN6 (6 << PORT_PIN_SHIFT)
#define PORT_PIN7 (7 << PORT_PIN_SHIFT)
#define PORT_PIN8 (8 << PORT_PIN_SHIFT)
#define PORT_PIN9 (9 << PORT_PIN_SHIFT)
#define PORT_PIN10 (10 << PORT_PIN_SHIFT)
#define PORT_PIN11 (11 << PORT_PIN_SHIFT)
#define PORT_PIN12 (12 << PORT_PIN_SHIFT)
#define PORT_PIN13 (13 << PORT_PIN_SHIFT)
#define PORT_PIN14 (14 << PORT_PIN_SHIFT)
#define PORT_PIN15 (15 << PORT_PIN_SHIFT)
#define PORT_PIN16 (16 << PORT_PIN_SHIFT)
#define PORT_PIN17 (17 << PORT_PIN_SHIFT)
#define PORT_PIN18 (18 << PORT_PIN_SHIFT)
#define PORT_PIN19 (19 << PORT_PIN_SHIFT)
#define PORT_PIN20 (20 << PORT_PIN_SHIFT)
#define PORT_PIN21 (21 << PORT_PIN_SHIFT)
#define PORT_PIN22 (22 << PORT_PIN_SHIFT)
#define PORT_PIN23 (23 << PORT_PIN_SHIFT)
#define PORT_PIN24 (24 << PORT_PIN_SHIFT)
#define PORT_PIN25 (25 << PORT_PIN_SHIFT)
#define PORT_PIN26 (26 << PORT_PIN_SHIFT)
#define PORT_PIN27 (27 << PORT_PIN_SHIFT)
#define PORT_PIN28 (28 << PORT_PIN_SHIFT)
#define PORT_PIN29 (29 << PORT_PIN_SHIFT)
#define PORT_PIN30 (30 << PORT_PIN_SHIFT)
#define PORT_PIN31 (31 << PORT_PIN_SHIFT)
/****************************************************************************
* Public Types
****************************************************************************/
typedef uint16_t port_cfgset_t;
#warning REVISIT
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: sam_configport
*
* Description:
* Configure a PORT pin based on bit-encoded description of the pin.
* Once it is configured as Alternative (PORT_ALT|PORT_CNF_AFPP|...)
* function, it must be unconfigured with sam_unconfigport() with
* the same cfgset first before it can be set to non-alternative function.
*
* Returns:
* OK on success
* ERROR on invalid port, or when pin is locked as ALT function.
*
****************************************************************************/
int sam_configport(port_cfgset_t cfgset);
/****************************************************************************
* Name: sam_portwrite
*
* Description:
* Write one or zero to the selected PORT pin
*
****************************************************************************/
void sam_portwrite(port_cfgset_t pinset, bool value);
/****************************************************************************
* Name: sam_portread
*
* Description:
* Read one or zero from the selected PORT pin
*
****************************************************************************/
bool sam_portread(port_cfgset_t pinset);
/****************************************************************************
* Function: sam_dumpport
*
* Description:
* Dump all PORT registers associated with the provided pin description
* along with a descriptive message.
*
****************************************************************************/
#ifdef CONFIG_DEBUG
void sam_dumpport(port_cfgset_t pinset, const char *msg);
#else
# define sam_dumpport(p,m)
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMD_SAM_PORT_H */

2
configs/samd20-xplained/nsh/defconfig
View File

@ -480,7 +480,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_C99_BOOL8 is not set
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_CXX_NEWLONG=y
# CONFIG_CXX_NEWLONG is not set
#
# uClibc++ Standard C++ Library

8
configs/samd20-xplained/src/sam_autoleds.c
View File

@ -71,7 +71,7 @@
#include <arch/board/board.h>
#include "sam_gpio.h"
#include "sam_port.h"
#include "samd20-xplained.h"
#ifdef CONFIG_ARCH_LEDS
@ -110,7 +110,7 @@
void board_led_initialize(void)
{
(void)sam_configgpio(GPIO_STATUS_LED);
(void)sam_configport(PORT_STATUS_LED);
}
/****************************************************************************
@ -140,7 +140,7 @@ void board_led_on(int led)
break;
}
sam_gpiowrite(GPIO_STATUS_LED, ledstate);
sam_portwrite(PORT_STATUS_LED, ledstate);
}
/****************************************************************************
@ -169,7 +169,7 @@ void board_led_off(int led)
/* Turn STATUS LED off set driving the output high */
case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */
sam_gpiowrite(GPIO_STATUS_LED, true);
sam_portwrite(PORT_STATUS_LED, true);
break;
}
}

22
configs/samd20-xplained/src/sam_buttons.c
View File

@ -47,7 +47,7 @@
#include <arch/irq.h>
#include <arch/board/board.h>
#include "sam_gpio.h"
#include "sam_port.h"
#include "samd20-xplained.h"
#ifdef CONFIG_ARCH_BUTTONS
@ -60,7 +60,7 @@
* Private Data
****************************************************************************/
#if defined(CONFIG_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
static xcpt_t g_irqsw0;
#endif
@ -85,7 +85,7 @@ static xcpt_t g_irqsw0;
void board_button_initialize(void)
{
(void)sam_configgpio(GPIO_SW0);
(void)sam_configport(PORT_SW0);
}
/************************************************************************************
@ -101,7 +101,7 @@ void board_button_initialize(void)
uint8_t board_buttons(void)
{
return sam_gpioread(GPIO_SW0) ? 0 : BUTTON_SW0_BIT;
return sam_portread(PORT_SW0) ? 0 : BUTTON_SW0_BIT;
}
/****************************************************************************
@ -114,15 +114,15 @@ uint8_t board_buttons(void)
* handler address isreturned (so that it may restored, if so desired).
*
* Configuration Notes:
* Configuration CONFIG_AVR32_GPIOIRQ must be selected to enable the
* overall GPIO IRQ feature and CONFIG_AVR32_GPIOIRQSETA and/or
* CONFIG_AVR32_GPIOIRQSETB must be enabled to select GPIOs to support
* Configuration CONFIG_AVR32_PORTIRQ must be selected to enable the
* overall PORT IRQ feature and CONFIG_AVR32_PORTIRQSETA and/or
* CONFIG_AVR32_PORTIRQSETB must be enabled to select PORTs to support
* interrupts on. For button support, bits 2 and 3 must be set in
* CONFIG_AVR32_GPIOIRQSETB (PB2 and PB3).
* CONFIG_AVR32_PORTIRQSETB (PB2 and PB3).
*
****************************************************************************/
#if defined(CONFIG_GPIOA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
#if defined(CONFIG_PORTA_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
xcpt_t board_button_irq(int id, xcpt_t irqhandler)
{
xcpt_t oldhandler = NULL;
@ -144,9 +144,9 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
/* Configure the interrupt */
sam_gpioirq(IRQ_SW0);
sam_portirq(IRQ_SW0);
(void)irq_attach(IRQ_SW0, irqhandler);
sam_gpioirqenable(IRQ_SW0);
sam_portirqenable(IRQ_SW0);
irqrestore(flags);
}

1
configs/samd20-xplained/src/sam_nsh.c
View File

@ -42,6 +42,7 @@
#include <stdio.h>
#include <debug.h>
#include "sam_config.h"
#include "samd20-xplained.h"
/****************************************************************************

30
configs/samd20-xplained/src/sam_spi.c
View File

@ -46,7 +46,7 @@
#include <nuttx/spi/spi.h>
#include "sam_config.h"
#include "sam_gpio.h"
#include "sam_port.h"
#include "sam_spi.h"
#include "samd20-xplained.h"
@ -92,7 +92,7 @@
* Name: sam_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the SAM3U10E-EVAL board.
* Called to configure SPI chip select PORT pins for the SAM3U10E-EVAL board.
*
************************************************************************************/
@ -105,13 +105,13 @@ void weak_function sam_spiinitialize(void)
#ifdef CONFIG_SAM4L_XPLAINED_IOMODULE
/* TODO: enable interrupt on card detect */
sam_configgpio(GPIO_SD_CD); /* Card detect input */
sam_configgpio(GPIO_SD_CS); /* Chip select output */
sam_configport(PORT_SD_CD); /* Card detect input */
sam_configport(PORT_SD_CS); /* Chip select output */
#endif
#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE
sam_configgpio(GPIO_OLED_DATA); /* Command/data */
sam_configgpio(GPIO_OLED_CS); /* Card detect input */
sam_configport(PORT_OLED_DATA); /* Command/data */
sam_configport(PORT_OLED_CS); /* Card detect input */
#endif
}
@ -134,10 +134,10 @@ void weak_function sam_spiinitialize(void)
* pins.
* 2. Provide sam_spiselect() and sam_spistatus() functions in your board-
* specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* status operations using PORTs in the way your board is configured.
* 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
* sam_spicmddata() functions in your board-specific logic. This
* function will perform cmd/data selection operations using GPIOs in
* function will perform cmd/data selection operations using PORTs in
* the way your board is configured.
* 3. Add a call to up_spiinitialize() in your low level application
* initialization logic
@ -159,9 +159,9 @@ void weak_function sam_spiinitialize(void)
* a stub.
*
* An alternative way to program the PIO chip select pins is as a normal
* GPIO output. In that case, the automatic control of the CS pins is
* PORT output. In that case, the automatic control of the CS pins is
* bypassed and this function must provide control of the chip select.
* NOTE: In this case, the GPIO output pin does *not* have to be the
* NOTE: In this case, the PORT output pin does *not* have to be the
* same as the NPCS pin normal associated with the chip select number.
*
* Input Parameters:
@ -182,7 +182,7 @@ void sam_spiselect(enum spi_dev_e devid, bool selected)
{
/* Active low */
sam_gpiowrite(GPIO_SD_CS, !selected);
sam_portwrite(PORT_SD_CS, !selected);
}
#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE
@ -197,7 +197,7 @@ void sam_spiselect(enum spi_dev_e devid, bool selected)
{
/* Active low */
sam_gpiowrite(GPIO_OLED_CS, !selected);
sam_portwrite(PORT_OLED_CS, !selected);
}
#endif
}
@ -227,7 +227,7 @@ uint8_t sam_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
/* Active low */
if (!sam_gpioread(GPIO_SD_CD))
if (!sam_portread(PORT_SD_CD))
{
ret |= SPI_STATUS_PRESENT;
}
@ -251,7 +251,7 @@ uint8_t sam_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
* may be configured to use 9-bit data transfers with the 9th bit
* indicating command or data. That same hardware may be configurable,
* instead, to use 8-bit data but to require an additional, board-
* specific GPIO control to distinguish command and data. This function
* specific PORT control to distinguish command and data. This function
* would be needed in that latter case.
*
* Input Parameters:
@ -276,7 +276,7 @@ int sam_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
* Low: the inputs are transferred to the command registers.
*/
(void)sam_gpiowrite(GPIO_OLED_DATA, !cmd);
(void)sam_portwrite(PORT_OLED_DATA, !cmd);
}
#endif
return OK;

14
configs/samd20-xplained/src/sam_ug2832hsweg04.c
View File

@ -47,9 +47,9 @@
* ----------------- ---------------------- ----------------------
* 4 BUTTON3 4 PB01 AIN[9] 4 PA11 AIN[19]
* ----------------- ---------------------- ----------------------
* 5 DATA_CMD_SEL 5 PB06 GPIO 5 PA20 GPIO
* 5 DATA_CMD_SEL 5 PB06 PORT 5 PA20 PORT
* ----------------- ---------------------- ----------------------
* 6 LED3 6 PB07 GPIO 6 PA21 GPIO
* 6 LED3 6 PB07 PORT 6 PA21 PORT
* ----------------- ---------------------- ----------------------
* 7 LED1 7 PB02 TC6/WO[0] 7 PA22 TC4/WO[0]
* ----------------- ---------------------- ----------------------
@ -57,7 +57,7 @@
* ----------------- ---------------------- ----------------------
* 9 BUTTON1 9 PB04 EXTINT[4] 9 PB14 EXTINT[14]
* ----------------- ---------------------- ----------------------
* 10 DISPLAY_RESET 10 PB05 GPIO 10 PB15 GPIO
* 10 DISPLAY_RESET 10 PB05 PORT 10 PB15 PORT
* ----------------- ---------------------- ----------------------
* 11 N/C 11 PA08 SERCOM2 PAD[0] 11 PA08 SERCOM2 PAD[0]
* I²C SDA I²C SDA
@ -114,7 +114,7 @@
#include <nuttx/lcd/lcd.h>
#include <nuttx/lcd/ssd1306.h>
#include "sam_gpio.h"
#include "sam_port.h"
#include "samd20-xplained.h"
#ifdef CONFIG_SAM4L_XPLAINED_OLED1MODULE
@ -168,16 +168,16 @@ FAR struct lcd_dev_s *up_nxdrvinit(unsigned int devno)
FAR struct spi_dev_s *spi;
FAR struct lcd_dev_s *dev;
/* Configure the OLED GPIOs. This initial configuration is RESET low,
/* Configure the OLED PORTs. This initial configuration is RESET low,
* putting the OLED into reset state.
*/
(void)sam_configgpio(GPIO_OLED_RST);
(void)sam_configport(PORT_OLED_RST);
/* Wait a bit then release the OLED from the reset state */
up_mdelay(20);
sam_gpiowrite(GPIO_OLED_RST, true);
sam_portwrite(PORT_OLED_RST, true);
/* Get the SPI1 port interface */

6
configs/samd20-xplained/src/sam_userleds.c
View File

@ -57,7 +57,7 @@
#include <arch/board/board.h>
#include "sam_gpio.h"
#include "sam_port.h"
#include "samd20-xplained.h"
#ifndef CONFIG_ARCH_LEDS
@ -102,7 +102,7 @@
void sam_ledinit(void)
{
(void)sam_configgpio(GPIO_STATUS_LED);
(void)sam_configport(PORT_STATUS_LED);
}
/****************************************************************************
@ -119,7 +119,7 @@ void sam_setled(int led, bool ledon)
{
if (led == BOARD_STATUS_LED)
{
sam_gpiowrite(GPIO_STATUS_LED, !ledon);
sam_portwrite(PORT_STATUS_LED, !ledon);
}
}

63
configs/samd20-xplained/src/samd20-xplained.h
View File

@ -81,8 +81,8 @@
* 2Hz, then a fatal error has been detected and the system has halted.
*/
#define GPIO_STATUS_LED (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \
GPIO_PORTA | GPIO_PIN14)
#define PORT_STATUS_LED (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \
PORT_PORTA | PORT_PIN14)
/* Mechanical buttons:
*
@ -93,14 +93,13 @@
* PA15 SW0
*/
#define GPIO_SW0 (GPIO_INTERRUPT | GPIO_PULL_UP | GPIO_GLITCH_FILTER | \
GPIO_PORTA | GPIO_PIN15)
#define PORT_SW0 (PORT_INTERRUPT | PORT_PULL_UP | PORT_PORTA | PORT_PIN15)
#define IRQ_SW0 SAM_IRQ_PA15
/* I/O1
*
* Support for the microSD card slot on the I/O1 module. The I/O1 requires
* SPI support and two GPIOs. These the GPIOs will vary if the I/O1
* SPI support and two PORTs. These the PORTs will vary if the I/O1
* is installed on the EXT1 or EXT2 connector:
*
* --- ------------------ ---------------------- -------------------------------
@ -109,7 +108,7 @@
* 15 PA05 SERCOM0 PAD[1] 15 PA17 SERCOM1 PAD[1] Active low chip select OUTPUT,
* SPI SS SPI SS pulled high on board.
* --- ------------------ ---------------------- -------------------------------
* 10 PB05 GPIO 10 PB15 GPIO Active low card detect INPUT,
* 10 PB05 PORT 10 PB15 PORT Active low card detect INPUT,
* must use internal pull-up.
* --- ------------------ ---------------------- -------------------------------
*/
@ -127,12 +126,12 @@
# error I/O1 and OLED1 modules cannot both reside in EXT1
# endif
# define GPIO_SD_CD (GPIO_INTERRUPT | GPIO_INT_CHANGE | GPIO_PULL_UP | \
GPIO_GLITCH_FILTER | GPIO_PORTF | GPIO_PIN5)
# define PORT_SD_CD (PORT_INTERRUPT | PORT_INT_CHANGE | PORT_PULL_UP | \
PORT_PORTF | PORT_PIN5)
# define IRQ_SD_CD SAM_IRQ_PB5
# define GPIO_SD_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \
GPIO_PORTA | GPIO_PIN5)
# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \
PORT_PORTA | PORT_PIN5)
# define SD_CSNO 0
# elif defined(CONFIG_SAMD20_XPLAINED_IOMODULE_EXT2)
@ -142,12 +141,12 @@
# error I/O1 and OLED1 modules cannot both reside in EXT2
# endif
# define GPIO_CD (GPIO_INTERRUPT | GPIO_INT_CHANGE | GPIO_PULL_UP | \
GPIO_GLITCH_FILTER | GPIO_PORTB | GPIO_PIN15)
# define PORT_CD (PORT_INTERRUPT | PORT_INT_CHANGE | PORT_PULL_UP | \
PORT_PORTB | PORT_PIN15)
# define IRQ_CD SAM_IRQ_PB15
# define GPIO_SD_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \
GPIO_PORTA | GPIO_PIN17)
# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \
PORT_PORTA | PORT_PIN17)
# define SD_CSNO 2
# else
@ -158,14 +157,14 @@
/* OLED1
*
* Support for the microSD card slot on the I/O1 module. The I/O1 requires
* SPI support and three output GPIOs. These the GPIOs will vary if the OLED1
* SPI support and three output PORTs. These the PORTs will vary if the OLED1
* is installed on the EXT1 or EXT2 connector:
*
*
* PIN EXT1 EXT2 Description
* --- ------------------- -------------------- -------------------------------------
* 5 PB06 GPIO PA20 GPIO DATA_CMD_SEL
* 10 PB05 GPIO PB15 GPIO DISPLAY_RESET. Active low.
* 5 PB06 PORT PA20 PORT DATA_CMD_SEL
* 10 PB05 PORT PB15 PORT DISPLAY_RESET. Active low.
* 15 PA05 SERCOM0 PAD[1] PA17 SERCOM1 PAD[1] DISPLAY_SS. Active low.
* SPI SS SPI SS
*/
@ -195,12 +194,12 @@
# error OLED1 and I/O1 modules cannot both reside in EXT1
# endif
# define GPIO_OLED_DATA (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN6)
# define GPIO_OLED_RST (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN5)
# define GPIO_OLED_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \
GPIO_PORTA | GPIO_PIN5)
# define PORT_OLED_DATA (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \
PORT_PORTB | PORT_PIN6)
# define PORT_OLED_RST (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \
PORT_PORTB | PORT_PIN5)
# define PORT_OLED_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \
PORT_PORTA | PORT_PIN5)
# define OLED_CSNO 0
# elif defined(CONFIG_SAMD20_XPLAINED_OLED1MODULE_EXT2)
@ -210,12 +209,12 @@
# error OLED1 and I/O1 modules cannot both reside in EXT2
# endif
# define GPIO_OLED_DATA (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \
GPIO_PORTA | GPIO_PIN20)
# define GPIO_OLED_RST (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN15)
# define GPIO_OLED_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \
GPIO_PORTA | GPIO_PIN17)
# define PORT_OLED_DATA (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \
PORT_PORTA | PORT_PIN20)
# define PORT_OLED_RST (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_CLEAR | \
PORT_PORTB | PORT_PIN15)
# define PORT_OLED_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \
PORT_PORTA | PORT_PIN17)
# define OLED_CSNO 2
# else
@ -224,8 +223,8 @@
#endif
#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
# define GPIO_SD_CS (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_SET | \
GPIO_PORTB | GPIO_PIN11) /* REVISIT */
# define PORT_SD_CS (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \
PORT_PORTB | PORT_PIN11) /* REVISIT */
#endif
/************************************************************************************
@ -246,7 +245,7 @@
* Name: sam_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the SAM3U-EK board.
* Called to configure SPI chip select PORT pins for the SAM3U-EK board.
*
************************************************************************************/