From 137586f50a7f28a1a5fe15a2e193d81d8c3bf50b Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Tue, 29 Nov 2016 09:09:28 -0600 Subject: [PATCH] Misoc LM32: Add logic to flush/invalidate caches --- arch/misoc/src/common/misoc.h | 30 +++++++++ arch/misoc/src/common/misoc_flushcache.c | 81 ++++++++++++++++++++++ arch/misoc/src/common/misoc_net.c | 2 +- arch/misoc/src/lm32/Make.defs | 2 + arch/misoc/src/lm32/lm32.h | 5 ++ arch/misoc/src/lm32/lm32_flushcache.c | 86 ++++++++++++++++++++++++ arch/misoc/src/lm32/lm32_initialize.c | 5 ++ 7 files changed, 210 insertions(+), 1 deletion(-) create mode 100644 arch/misoc/src/common/misoc_flushcache.c create mode 100644 arch/misoc/src/lm32/lm32_flushcache.c diff --git a/arch/misoc/src/common/misoc.h b/arch/misoc/src/common/misoc.h index d708e97b48..ab99f6aca2 100644 --- a/arch/misoc/src/common/misoc.h +++ b/arch/misoc/src/common/misoc.h @@ -94,6 +94,16 @@ void flush_cpu_dcache(void); void misoc_serial_initialize(void); +/**************************************************************************** + * Name: up_net_initialize + * + * Description: + * Register Network + * + ****************************************************************************/ + +int misoc_net_initialize(int intf); + /**************************************************************************** * Name: misoc_puts * @@ -136,5 +146,25 @@ void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits); void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits); void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits); +/**************************************************************************** + * Name: misoc_flush_dcache + * + * Description: + * Flush the data cache of the cpu + * + ****************************************************************************/ + +void misoc_flush_dcache(void); + +/**************************************************************************** + * Name: misoc_flush_icache + * + * Description: + * Flush the instruction cache of the cpu + * + ****************************************************************************/ + +void misoc_flush_icache(void); + #endif /* __ASSEMBLY__ */ #endif /* __ARCH_MISOC_SRC_COMMON_MISOC_H */ diff --git a/arch/misoc/src/common/misoc_flushcache.c b/arch/misoc/src/common/misoc_flushcache.c new file mode 100644 index 0000000000..655ba8ab35 --- /dev/null +++ b/arch/misoc/src/common/misoc_flushcache.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * arch/misoc/src/common/misoc_flushcache.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include "misoc.h" + +#ifdef CONFIG_ARCH_CHIP_LM32 +#include "lm32.h" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: misoc_flush_dcache + * + * Description: + * Flush the data cache of the cpu + * + ****************************************************************************/ + +void misoc_flush_dcache() +{ +#ifdef CONFIG_ARCH_CHIP_LM32 + lm32_flush_dcache(); +#endif +} + +/**************************************************************************** + * Name: misoc_flush_icache + * + * Description: + * Flush the instruction cache of the cpu + * + ****************************************************************************/ + +void misoc_flush_icache() +{ +#ifdef CONFIG_ARCH_CHIP_LM32 + lm32_flush_icache(); +#endif +} diff --git a/arch/misoc/src/common/misoc_net.c b/arch/misoc/src/common/misoc_net.c index b758d2d47e..7b4b84c2f0 100644 --- a/arch/misoc/src/common/misoc_net.c +++ b/arch/misoc/src/common/misoc_net.c @@ -391,7 +391,7 @@ static void misoc_net_receive(FAR struct misoc_net_driver_s *priv) * amount of data in priv->misoc_net_dev.d_len */ - flush_cpu_dcache(); + misoc_flush_dcache(); if (rxslot) { diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs index 7206117487..a2ea84d61c 100644 --- a/arch/misoc/src/lm32/Make.defs +++ b/arch/misoc/src/lm32/Make.defs @@ -40,6 +40,7 @@ CMN_ASRCS = CMN_CSRCS = misoc_lowputs.c misoc_serial.c misoc_mdelay.c CMN_CSRCS += misoc_modifyreg8.c misoc_modifyreg16.c misoc_modifyreg32.c CMN_CSRCS += misoc_puts.c misoc_udelay.c misoc_timerisr.c misoc_net.c +CMN_CSRCS += misoc_flushcache.c CHIP_ASRCS = lm32_syscall.S @@ -50,3 +51,4 @@ CHIP_CSRCS += lm32_initialize.c lm32_initialstate.c lm32_interruptcontext.c CHIP_CSRCS += lm32_irq.c lm32_releasepending.c lm32_releasestack.c CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c CHIP_CSRCS += lm32_reprioritizertr.c lm32_schedulesigaction.c lm32_sigdeliver.c +CHIP_CSRCS += lm32_flushcache.c \ No newline at end of file diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h index b23e60e4f2..a09bcfec47 100644 --- a/arch/misoc/src/lm32/lm32.h +++ b/arch/misoc/src/lm32/lm32.h @@ -149,6 +149,11 @@ void lm32_timer_initialize(void); void lm32_sigdeliver(void); +/* Cache flushing ***********************************************************/ + +void lm32_flush_dcache(void); +void lm32_flush_icache(void); + /* Debug ********************************************************************/ void lm32_dumpstate(void); diff --git a/arch/misoc/src/lm32/lm32_flushcache.c b/arch/misoc/src/lm32/lm32_flushcache.c new file mode 100644 index 0000000000..8d1d653a6b --- /dev/null +++ b/arch/misoc/src/lm32/lm32_flushcache.c @@ -0,0 +1,86 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_flushcache.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "chip.h" +#include "lm32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lm32_flush_dcache + * + * Description: + * Flush the data cache of the cpu + * + ****************************************************************************/ + +void lm32_flush_dcache(void) +{ + asm volatile( + "wcsr DCC, r0\n" + "nop\n" + "nop\n" + "nop\n" + "nop\n" + ); +} + +/**************************************************************************** + * Name: lm32_flush_icache + * + * Description: + * Flush the instruction cache of the cpu + * + ****************************************************************************/ + +void lm32_flush_icache(void) +{ + asm volatile( + "wcsr ICC, r0\n" + "nop\n" + "nop\n" + "nop\n" + "nop\n" + ); +} diff --git a/arch/misoc/src/lm32/lm32_initialize.c b/arch/misoc/src/lm32/lm32_initialize.c index dd93cce4b6..1c4323215a 100644 --- a/arch/misoc/src/lm32/lm32_initialize.c +++ b/arch/misoc/src/lm32/lm32_initialize.c @@ -77,4 +77,9 @@ void up_initialize(void) /* Initialize the system timer */ misoc_timer_initialize(); + + /* Initialize the network cores */ + + misoc_net_initialize(0); + }