From 144644600efdec4783afc862cc614e6d3aa6d4a4 Mon Sep 17 00:00:00 2001 From: patacongo Date: Sat, 28 Feb 2009 01:27:30 +0000 Subject: [PATCH] Fixe ez80 serial setup git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1531 42af7a65-404d-4744-a932-0658087f49c3 --- ChangeLog | 1 + Documentation/NuttX.html | 3 +- arch/z80/src/ez80/ez80_lowuart.c | 110 ++++++++++++++++++----- arch/z80/src/ez80/ez80_serial.c | 83 +++++++++++++++-- configs/ez80f910200kitg/ostest/defconfig | 3 + configs/ez80f910200zco/nettest/defconfig | 3 + configs/ez80f910200zco/ostest/defconfig | 3 + 7 files changed, 177 insertions(+), 29 deletions(-) diff --git a/ChangeLog b/ChangeLog index 14f9c1a53a..544a79946e 100644 --- a/ChangeLog +++ b/ChangeLog @@ -634,6 +634,7 @@ save and restore. - Corrected vector intialization logic * ez80Acclaim!: Corrected overflow problem in calculation of baud rate divisor + * ez80Acclaim!: Fixed GPIO pin configuration get serial output diff --git a/Documentation/NuttX.html b/Documentation/NuttX.html index 84e0483d65..81a9f19197 100644 --- a/Documentation/NuttX.html +++ b/Documentation/NuttX.html @@ -8,7 +8,7 @@

NuttX RTOS

-

Last Updated: February 25, 2009

+

Last Updated: February 27, 2009

@@ -1350,6 +1350,7 @@ nuttx-0.4.2 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr> save and restore. - Corrected vector intialization logic * ez80Acclaim!: Corrected overflow problem in calculation of baud rate divisor + * ez80Acclaim!: Fixed GPIO pin configuration get serial output pascal-0.1.3 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr> diff --git a/arch/z80/src/ez80/ez80_lowuart.c b/arch/z80/src/ez80/ez80_lowuart.c index ebf1428d49..32d08e875b 100644 --- a/arch/z80/src/ez80/ez80_lowuart.c +++ b/arch/z80/src/ez80/ez80_lowuart.c @@ -55,9 +55,39 @@ * Private Definitions ****************************************************************************/ -/* The system clock frequency is defined in the linkcmd file */ +/* The system clock frequency is defined in the board.h file */ -#ifdef CONFIG_UART0_SERIAL_CONSOLE +/* Is there any serial support? This might be the case if the board does + * not have serial ports but supports stdout through, say, an LCD. + */ + +#if defined(CONFIG_UART0_DISABLE) || defined(CONFIG_UART1_DISABLE) +# define HAVE_SERIAL +#else +# undef HAVE_SERIAL +#endif + +/* Is one of the serial ports a console? */ + +#if defined(CONFIG_UART0_SERIAL_CONSOLE) && !defined(CONFIG_UART0_DISABLE) +# define HAVE_SERIALCONSOLE 1 +# undef CONFIG_UART1_SERIAL_CONSOLE +#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_UART1_DISABLE) +# define HAVE_SERIALCONSOLE 1 +# undef CONFIG_UART0_SERIAL_CONSOLE +#else +# warning "No console is defined" +# if defined(CONFIG_UART0_SERIAL_CONSOLE) || defined(CONFIG_UART1_SERIAL_CONSOLE) +# error "A serial console selected, but corresponding UART not enabled" +# endif +# undef CONFIG_UART0_SERIAL_CONSOLE +# undef CONFIG_UART1_SERIAL_CONSOLE +# undef HAVE_SERIALCONSOLE +#endif + +/* Select UART parameters for the selected console */ + +#if defined(CONFIG_UART0_SERIAL_CONSOLE) # define ez80_inp(offs) inp((EZ80_UART0_BASE+(offs))) # define ez80_outp(offs,val) outp((EZ80_UART0_BASE+(offs)), (val)) # define CONFIG_UART_BAUD CONFIG_UART0_BAUD @@ -78,7 +108,7 @@ # else # define CONFIG_UART_PARITY 0 # endif -#else +#elif defined(CONFIG_UART0_SERIAL_CONSOLE) # define ez80_inp(offs) inp((EZ80_UART1_BASE+(offs))) # define ez80_outp(offs.val) outp((EZ80_UART1_BASE+(offs)), (val)) # define CONFIG_UART_BAUD CONFIG_UART1_BAUD @@ -109,7 +139,7 @@ * Private Functions ****************************************************************************/ -#ifndef CONFIG_SUPPRESS_UART_CONFIG +#if defined(HAVE_SERIALCONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) static void ez80_setbaud(void) { uint32 brg_divisor; @@ -139,7 +169,7 @@ static void ez80_setbaud(void) lctl &= ~EZ80_UARTLCTL_DLAB; ez80_outp(EZ80_UART_LCTL, lctl); } -#endif /* CONFIG_SUPPRESS_UART_CONFIG */ +#endif /* HAVE_SERIALCONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */ /**************************************************************************** * Public Functions @@ -151,14 +181,49 @@ static void ez80_setbaud(void) void up_lowuartinit(void) { -#ifndef CONFIG_SUPPRESS_UART_CONFIG - ubyte reg; +#ifdef HAVE_SERIAL + ubyte regval; + /* Configure pins for usage of UARTs (whether or not we have a console) */ + +#ifndef CONFIG_UART0_DISABLE + /* Set Port D, pins 0 and 1 for their alternate function (Mode 7) to enable UART0 */ + + regval = inp(EZ80_PD_DDR); + regval |= 3; + outp(EZ80_PD_DDR, regval); + + regval = inp(EZ80_PD_ALT1); + regval &= ~3; + outp(EZ80_PD_ALT1, regval); + + regval = inp(EZ80_PD_ALT2); + regval |= 3; + outp(EZ80_PD_ALT2, regval); +#endif + +#ifndef CONFIG_UART1_DISABLE + /* Set Port C, pins 0 and 1 for their alternate function (Mode 7) to enable UART1 */ + + regval = inp(EZ80_PC_DDR); + regval |= 3; + outp(EZ80_PC_DDR, regval); + + regval = inp(EZ80_PC_ALT1); + regval &= ~3; + outp(EZ80_PC_ALT1, regval); + + regval = inp(EZ80_PC_ALT2); + regval |= 3; + outp(EZ80_PC_ALT2, regval); +#endif + +#if defined(HAVE_SERIALCONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) /* Disable interrupts from the UART */ - reg = ez80_inp(EZ80_UART_IER); - reg &= ~EZ80_UARTEIR_INTMASK; - ez80_outp(EZ80_UART_IER, reg); + regval = ez80_inp(EZ80_UART_IER); + regval &= ~EZ80_UARTEIR_INTMASK; + ez80_outp(EZ80_UART_IER, regval); /* Set the baud rate */ @@ -167,22 +232,25 @@ void up_lowuartinit(void) /* Set the character properties */ - reg = ez80_inp(EZ80_UART_LCTL); - reg &= ~EZ80_UARTLCTL_MASK; - reg |= (CONFIG_UART_BITS | CONFIG_UART_2STOP | CONFIG_UART_PARITY); - ez80_outp(EZ80_UART_LCTL, reg); + regval = ez80_inp(EZ80_UART_LCTL); + regval &= ~EZ80_UARTLCTL_MASK; + regval |= (CONFIG_UART_BITS | CONFIG_UART_2STOP | CONFIG_UART_PARITY); + ez80_outp(EZ80_UART_LCTL, regval); /* Enable and flush the receive FIFO */ - reg = EZ80_UARTFCTL_FIFOEN; - ez80_outp(EZ80_UART_FCTL, reg); - reg |= (EZ80_UARTFCTL_CLRTxF|EZ80_UARTFCTL_CLRRxF); - ez80_outp(EZ80_UART_FCTL, reg); + regval = EZ80_UARTFCTL_FIFOEN; + ez80_outp(EZ80_UART_FCTL, regval); + regval |= (EZ80_UARTFCTL_CLRTxF|EZ80_UARTFCTL_CLRRxF); + ez80_outp(EZ80_UART_FCTL, regval); /* Set the receive trigger level to 1 */ - reg |= EZ80_UARTTRIG_1; - ez80_outp(EZ80_UART_FCTL, reg); -#endif /* CONFIG_SUPPRESS_UART_CONFIG */ + regval |= EZ80_UARTTRIG_1; + ez80_outp(EZ80_UART_FCTL, regval); + +#endif /* HAVE_SERIALCONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */ +#endif /* HAVE_SERIAL */ } + #endif /* CONFIG_USE_LOWUARTINIT */ diff --git a/arch/z80/src/ez80/ez80_serial.c b/arch/z80/src/ez80/ez80_serial.c index face96e424..139dd69398 100644 --- a/arch/z80/src/ez80/ez80_serial.c +++ b/arch/z80/src/ez80/ez80_serial.c @@ -116,13 +116,18 @@ struct uart_ops_s g_uart_ops = /* I/O buffers */ +#ifndef CONFIG_UART0_DISABLE static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE]; static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE]; +#endif +#ifndef CONFIG_UART1_DISABLE static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE]; static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE]; +#endif /* This describes the state of the UART0 port. */ +#ifndef CONFIG_UART0_DISABLE static struct ez80_dev_s g_uart0priv = { EZ80_UART0_BASE, /* uartbase */ @@ -163,9 +168,11 @@ static uart_dev_t g_uart0port = &g_uart_ops, /* ops */ &g_uart0priv, /* priv */ }; +#endif /* This describes the state of the UART1 port. */ +#ifndef CONFIG_UART1_DISABLE static struct ez80_dev_s g_uart1priv = { EZ80_UART1_BASE, /* uartbase */ @@ -206,17 +213,29 @@ static uart_dev_t g_uart1port = &g_uart_ops, /* ops */ &g_uart1priv, /* priv */ }; +#endif /* Now, which one with be tty0/console and which tty1? */ -#ifdef CONFIG_UART0_SERIAL_CONSOLE +#if defined(CONFIG_UART0_SERIAL_CONSOLE) && !defined(CONFIG_DISABLE_UART0) # define CONSOLE_DEV g_uart0port # define TTYS0_DEV g_uart0port -# define TTYS1_DEV g_uart1port -#else +# if !defined(CONFIG_UART1_DISABLE) +# define TTYS1_DEV g_uart1port +# endif +#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && !defined(CONFIG_DISABLE_UART1) # define CONSOLE_DEV g_uart1port # define TTYS0_DEV g_uart1port -# define TTYS1_DEV g_uart0port +# if !defined(CONFIG_UART0_DISABLE) +# define TTYS1_DEV g_uart0port +# endif +#elif !defined(CONFIG_DISABLE_UART0) +# define TTYS0_DEV g_uart0port +# if !defined(CONFIG_UART1_DISABLE) +# define TTYS1_DEV g_uart1port +# endif +#elif !defined(CONFIG_DISABLE_UART0) +# define TTYS0_DEV g_uart1port #endif /**************************************************************************** @@ -389,7 +408,7 @@ static int ez80_setup(struct uart_dev_s *dev) static void ez80_shutdown(struct uart_dev_s *dev) { - struct ez80_dev_s *priv = (struct ez80_dev_s*)CONSOLE_DEV.priv; + struct ez80_dev_s *priv = (struct ez80_dev_s*)dev->priv; ez80_disableuartint(priv); } @@ -644,11 +663,55 @@ static boolean ez80_txempty(struct uart_dev_s *dev) void up_earlyserialinit(void) { - ez80_disableuartint(TTYS0_DEV.priv); - ez80_disableuartint(TTYS1_DEV.priv); + ubyte regval; + /* Make sure that all UART interrupts are disabled */ + + ez80_disableuartint(TTYS0_DEV.priv); +#ifdef TTYS1DEV + ez80_disableuartint(TTYS1_DEV.priv); +#endif + + /* Configure pins for usage of UARTs */ + +#ifndef CONFIG_UART0_DISABLE + /* Set Port D, pins 0 and 1 for their alternate function (Mode 7) to enable UART0 */ + + regval = inp(EZ80_PD_DDR); + regval |= 3; + outp(EZ80_PD_DDR, regval); + + regval = inp(EZ80_PD_ALT1); + regval &= ~3; + outp(EZ80_PD_ALT1, regval); + + regval = inp(EZ80_PD_ALT2); + regval |= 3; + outp(EZ80_PD_ALT2, regval); +#endif + +#ifndef CONFIG_UART1_DISABLE + /* Set Port C, pins 0 and 1 for their alternate function (Mode 7) to enable UART1 */ + + regval = inp(EZ80_PC_DDR); + regval |= 3; + outp(EZ80_PC_DDR, regval); + + regval = inp(EZ80_PC_ALT1); + regval &= ~3; + outp(EZ80_PC_ALT1, regval); + + regval = inp(EZ80_PC_ALT2); + regval |= 3; + outp(EZ80_PC_ALT2, regval); +#endif + + /* If there is a console, then configure the console now */ + +#ifdef CONSOLE_DEV CONSOLE_DEV.isconsole = TRUE; ez80_setup(&CONSOLE_DEV); +#endif } /**************************************************************************** @@ -662,9 +725,13 @@ void up_earlyserialinit(void) void up_serialinit(void) { +#ifdef CONSOLE_DEV (void)uart_register("/dev/console", &CONSOLE_DEV); +#endif (void)uart_register("/dev/ttyS0", &TTYS0_DEV); +#ifdef TTYS1DEV (void)uart_register("/dev/ttyS1", &TTYS1_DEV); +#endif } /**************************************************************************** @@ -678,6 +745,7 @@ void up_serialinit(void) int up_putc(int ch) { +#ifdef CONSOLE_DEV struct ez80_dev_s *priv = (struct ez80_dev_s*)CONSOLE_DEV.priv; ubyte ier = ez80_serialin(priv, EZ80_UART_IER); @@ -703,6 +771,7 @@ int up_putc(int ch) ez80_waittxready(priv); ez80_restoreuartint(priv, ier); return ch; +#endif } #else /* CONFIG_USE_SERIALDRIVER */ diff --git a/configs/ez80f910200kitg/ostest/defconfig b/configs/ez80f910200kitg/ostest/defconfig index 81e8fb4c65..67f08b8755 100644 --- a/configs/ez80f910200kitg/ostest/defconfig +++ b/configs/ez80f910200kitg/ostest/defconfig @@ -85,6 +85,7 @@ CONFIG_ARCH_TIMERHOOK=n # # eZ80 specific device driver settings # +# CONFIG_UARTn_DISABLE - Disables all support for UARTn. # CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the # console and ttyS0 (default is the UART0). # CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. @@ -95,6 +96,8 @@ CONFIG_ARCH_TIMERHOOK=n # CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity # CONFIG_UARTn_2STOP - 0=1 stop bit; 1=Two stop bits # +CONFIG_UART0_DISABLE=n +CONFIG_UART1_DISABLE=y CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_UART1_SERIAL_CONSOLE=n CONFIG_UART0_TXBUFSIZE=0 diff --git a/configs/ez80f910200zco/nettest/defconfig b/configs/ez80f910200zco/nettest/defconfig index a6a62b2218..52ca534a26 100644 --- a/configs/ez80f910200zco/nettest/defconfig +++ b/configs/ez80f910200zco/nettest/defconfig @@ -85,6 +85,7 @@ CONFIG_ARCH_TIMERHOOK=y # # eZ80 specific device driver settings # +# CONFIG_UARTn_DISABLE - Disables all support for UARTn. # CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the # console and ttyS0 (default is the UART0). # CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. @@ -95,6 +96,8 @@ CONFIG_ARCH_TIMERHOOK=y # CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity # CONFIG_UARTn_2STOP - 0=1 stop bit; 1=Two stop bits # +CONFIG_UART0_DISABLE=n +CONFIG_UART1_DISABLE=y CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_UART1_SERIAL_CONSOLE=n CONFIG_UART0_TXBUFSIZE=0 diff --git a/configs/ez80f910200zco/ostest/defconfig b/configs/ez80f910200zco/ostest/defconfig index 7629b5b046..7e218d105a 100644 --- a/configs/ez80f910200zco/ostest/defconfig +++ b/configs/ez80f910200zco/ostest/defconfig @@ -85,6 +85,7 @@ CONFIG_ARCH_TIMERHOOK=y # # eZ80 specific device driver settings # +# CONFIG_UARTn_DISABLE - Disables all support for UARTn. # CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the # console and ttyS0 (default is the UART0). # CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. @@ -95,6 +96,8 @@ CONFIG_ARCH_TIMERHOOK=y # CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity # CONFIG_UARTn_2STOP - 0=1 stop bit; 1=Two stop bits # +CONFIG_UART0_DISABLE=n +CONFIG_UART1_DISABLE=y CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_UART1_SERIAL_CONSOLE=n CONFIG_UART0_TXBUFSIZE=0