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SAMA5D3/4: Fix two issues associated with PIO interrupts

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This commit is contained in:
Gregory Nutt 2014-07-07 14:16:29 -06:00
parent ae95f4e4d2
commit 14c90921b3
3 changed files with 38 additions and 26 deletions
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34
arch/arm/src/sama5/sam_pio.c
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@ -65,6 +65,22 @@
* Private Types * Private Types
****************************************************************************/ ****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/* SAM_PION_VBASE will only be defined if the PIO register blocks are
* contiguous. If not defined, then we need to do a table lookup.
*/
#ifndef SAM_PION_VBASE
const uintptr_t g_piobase[SAM_NPIO] =
{
SAM_PIOA_VBASE, SAM_PIOB_VBASE, SAM_PIOC_VBASE, SAM_PIOD_VBASE,
SAM_PIOE_VBASE
};
#endif
/**************************************************************************** /****************************************************************************
* Private Data * Private Data
****************************************************************************/ ****************************************************************************/
@ -115,20 +131,6 @@ static const bool g_piointerrupt[SAM_NPIO] =
#endif #endif
}; };
/* SAM_PION_VBASE will only be defined if the PIO register blocks are
* contiguous. If not defined, then we need to do a table lookup.
*/
#ifndef SAM_PION_VBASE
static const uintptr_t g_piobase[SAM_NPIO] =
{
SAM_PIOA_VBASE, SAM_PIOB_VBASE, SAM_PIOC_VBASE, SAM_PIOD_VBASE,
SAM_PIOE_VBASE
};
# define SAM_PION_VBASE(n) (g_piobase[(n)])
#endif
/**************************************************************************** /****************************************************************************
* Private Function Prototypes * Private Function Prototypes
****************************************************************************/ ****************************************************************************/
@ -146,7 +148,7 @@ static inline uintptr_t sam_piobase(pio_pinset_t cfgset)
if (port < SAM_NPIO) if (port < SAM_NPIO)
{ {
return SAM_PION_VBASE(port); return sam_pion_vbase(port);
} }
else else
{ {
@ -730,7 +732,7 @@ int sam_dumppio(uint32_t pinset, const char *msg)
/* Get the base address associated with the PIO port */ /* Get the base address associated with the PIO port */
port = (pinset & PIO_PORT_MASK) >> PIO_PORT_SHIFT; port = (pinset & PIO_PORT_MASK) >> PIO_PORT_SHIFT;
base = SAM_PION_VBASE(port); base = sam_pion_vbase(port);
/* The following requires exclusive access to the PIO registers */ /* The following requires exclusive access to the PIO registers */

20
arch/arm/src/sama5/sam_pio.h
View File

@ -51,11 +51,10 @@
************************************************************************************/ ************************************************************************************/
/* Configuration ********************************************************************/ /* Configuration ********************************************************************/
#undef CONFIG_SAMA5_PIO_IRQ #if !defined(CONFIG_SAMA5_PIOA_IRQ) && !defined(CONFIG_SAMA5_PIOB_IRQ) && \
#if defined(CONFIG_SAMA5_PIOA_IRQ) || defined(CONFIG_SAMA5_PIOB_IRQ) || \ !defined(CONFIG_SAMA5_PIOC_IRQ) && !defined(CONFIG_SAMA5_PIOD_IRQ) && \
defined(CONFIG_SAMA5_PIOC_IRQ) || defined(CONFIG_SAMA5_PIOD_IRQ) || \ !defined(CONFIG_SAMA5_PIOE_IRQ) && !defined(CONFIG_SAMA5_PIOF_IRQ)
defined(CONFIG_SAMA5_PIOD_IRQ) # undef CONFIG_SAMA5_PIO_IRQ
# define CONFIG_SAMA5_PIO_IRQ 1
#endif #endif
#ifndef CONFIG_DEBUG #ifndef CONFIG_DEBUG
@ -216,6 +215,17 @@
typedef uint32_t pio_pinset_t; typedef uint32_t pio_pinset_t;
/* SAM_PION_VBASE will only be defined if the PIO register blocks are contiguous.
* If not defined, then we need to do a table lookup.
*/
#ifndef SAM_PION_VBASE
extern const uintptr_t g_piobase[SAM_NPIO];
# define sam_pion_vbase(n) (g_piobase[(n)])
#else
# define sam_pion_vbase(n) SAM_PION_VBASE(n)
#endif
/************************************************************************************ /************************************************************************************
* Inline Functions * Inline Functions
************************************************************************************/ ************************************************************************************/

10
arch/arm/src/sama5/sam_pioirq.c
View File

@ -87,14 +87,14 @@
static inline uint32_t sam_piobase(pio_pinset_t pinset) static inline uint32_t sam_piobase(pio_pinset_t pinset)
{ {
int port = (pinset & PIO_PORT_MASK) >> PIO_PORT_SHIFT; int port = (pinset & PIO_PORT_MASK) >> PIO_PORT_SHIFT;
return SAM_PION_VBASE(port >> PIO_PORT_SHIFT); return sam_pion_vbase(port >> PIO_PORT_SHIFT);
} }
/**************************************************************************** /****************************************************************************
* Name: sam_piopin * Name: sam_piopin
* *
* Description: * Description:
* Returun the base address of the PIO register set * Return the base address of the PIO register set
* *
****************************************************************************/ ****************************************************************************/
@ -107,7 +107,7 @@ static inline int sam_piopin(pio_pinset_t pinset)
* Name: sam_irqbase * Name: sam_irqbase
* *
* Description: * Description:
* Return pio information associated with this IRQ * Return PIO information associated with this IRQ
* *
****************************************************************************/ ****************************************************************************/
@ -169,10 +169,10 @@ static int sam_irqbase(int irq, uint32_t *base, int *pin)
} }
/**************************************************************************** /****************************************************************************
* Name: sam_pioa/b/cinterrupt * Name: sam_pioa/b/c/d/e/finterrupt
* *
* Description: * Description:
* Receive PIOA/B/C interrupts * Receive PIOA/B/C/D/E/F interrupts
* *
****************************************************************************/ ****************************************************************************/