SAMA5D3/4: Fix two issues associated with PIO interrupts
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@ -65,6 +65,22 @@
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/* SAM_PION_VBASE will only be defined if the PIO register blocks are
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* contiguous. If not defined, then we need to do a table lookup.
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*/
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#ifndef SAM_PION_VBASE
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const uintptr_t g_piobase[SAM_NPIO] =
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{
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SAM_PIOA_VBASE, SAM_PIOB_VBASE, SAM_PIOC_VBASE, SAM_PIOD_VBASE,
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SAM_PIOE_VBASE
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};
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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@ -115,20 +131,6 @@ static const bool g_piointerrupt[SAM_NPIO] =
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#endif
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};
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/* SAM_PION_VBASE will only be defined if the PIO register blocks are
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* contiguous. If not defined, then we need to do a table lookup.
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*/
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#ifndef SAM_PION_VBASE
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static const uintptr_t g_piobase[SAM_NPIO] =
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{
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SAM_PIOA_VBASE, SAM_PIOB_VBASE, SAM_PIOC_VBASE, SAM_PIOD_VBASE,
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SAM_PIOE_VBASE
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};
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# define SAM_PION_VBASE(n) (g_piobase[(n)])
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#endif
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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@ -146,7 +148,7 @@ static inline uintptr_t sam_piobase(pio_pinset_t cfgset)
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if (port < SAM_NPIO)
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{
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return SAM_PION_VBASE(port);
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return sam_pion_vbase(port);
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}
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else
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{
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@ -730,7 +732,7 @@ int sam_dumppio(uint32_t pinset, const char *msg)
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/* Get the base address associated with the PIO port */
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port = (pinset & PIO_PORT_MASK) >> PIO_PORT_SHIFT;
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base = SAM_PION_VBASE(port);
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base = sam_pion_vbase(port);
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/* The following requires exclusive access to the PIO registers */
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@ -51,11 +51,10 @@
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************************************************************************************/
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/* Configuration ********************************************************************/
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#if !defined(CONFIG_SAMA5_PIOA_IRQ) && !defined(CONFIG_SAMA5_PIOB_IRQ) && \
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!defined(CONFIG_SAMA5_PIOC_IRQ) && !defined(CONFIG_SAMA5_PIOD_IRQ) && \
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!defined(CONFIG_SAMA5_PIOE_IRQ) && !defined(CONFIG_SAMA5_PIOF_IRQ)
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# undef CONFIG_SAMA5_PIO_IRQ
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#if defined(CONFIG_SAMA5_PIOA_IRQ) || defined(CONFIG_SAMA5_PIOB_IRQ) || \
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defined(CONFIG_SAMA5_PIOC_IRQ) || defined(CONFIG_SAMA5_PIOD_IRQ) || \
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defined(CONFIG_SAMA5_PIOD_IRQ)
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# define CONFIG_SAMA5_PIO_IRQ 1
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#endif
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#ifndef CONFIG_DEBUG
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@ -216,6 +215,17 @@
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typedef uint32_t pio_pinset_t;
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/* SAM_PION_VBASE will only be defined if the PIO register blocks are contiguous.
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* If not defined, then we need to do a table lookup.
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*/
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#ifndef SAM_PION_VBASE
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extern const uintptr_t g_piobase[SAM_NPIO];
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# define sam_pion_vbase(n) (g_piobase[(n)])
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#else
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# define sam_pion_vbase(n) SAM_PION_VBASE(n)
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#endif
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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@ -87,14 +87,14 @@
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static inline uint32_t sam_piobase(pio_pinset_t pinset)
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{
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int port = (pinset & PIO_PORT_MASK) >> PIO_PORT_SHIFT;
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return SAM_PION_VBASE(port >> PIO_PORT_SHIFT);
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return sam_pion_vbase(port >> PIO_PORT_SHIFT);
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}
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/****************************************************************************
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* Name: sam_piopin
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*
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* Description:
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* Returun the base address of the PIO register set
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* Return the base address of the PIO register set
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*
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****************************************************************************/
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@ -107,7 +107,7 @@ static inline int sam_piopin(pio_pinset_t pinset)
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* Name: sam_irqbase
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*
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* Description:
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* Return pio information associated with this IRQ
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* Return PIO information associated with this IRQ
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*
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****************************************************************************/
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@ -169,10 +169,10 @@ static int sam_irqbase(int irq, uint32_t *base, int *pin)
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}
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/****************************************************************************
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* Name: sam_pioa/b/cinterrupt
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* Name: sam_pioa/b/c/d/e/finterrupt
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*
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* Description:
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* Receive PIOA/B/C interrupts
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* Receive PIOA/B/C/D/E/F interrupts
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*
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****************************************************************************/
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