Update README
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@ -1309,7 +1309,9 @@ Configuration sub-directories
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configuration runs with the DCACHE in write back mode, but the SDRAM
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configuration fails. That is because the SDRAM initialization
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occurs after the D-Cache is initialized (I have not actually tried
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in write back mode, it just seems that there woulc be issues.
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in write back mode, it just seems that there woulc be issues. This
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could be eliminated by changing the order of some initialization in
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sam_start.c.
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System Type
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CONFIG_SAMV7_SDRAMC=y
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@ -1339,7 +1341,10 @@ Configuration sub-directories
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STATUS: I suspect that the RAM timing configuration is not perfect.
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If you run the above RAM test you will see occasional failures after
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booting into a certain state.
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booting into a certain state. Sometimes it boots and the RAM test
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fails 100% of the time. Other times it boots and the RAM test passes
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100% of the time. So it seems like some timing issue in the SRAM
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setup.
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5. The button test at apps/examples/buttons is included in the
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configuration. This configuration illustrates (1) use of the buttons
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@ -1465,7 +1470,7 @@ Configuration sub-directories
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CONFIG_ARMV7M_ICACHE=y : Instruction cache is enabled
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CONFIG_ARMV7M_DCACHE=y : Data cache is enabled
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CONFIG_ARMV7M_DCACHE_WRITETHROUGH=n : Write back mode
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CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y : Write through mode (see SDRAM discussion above)
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CONFIG_ARCH_FPU=y : H/W floating point support is enabled
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CONFIG_ARCH_DPFPU=y : 64-bit H/W floating point support is enabled
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