Dangle whitespace removal
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b9cf875752
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1502ba31b3
@ -2277,6 +2277,6 @@ struct dma_descriptor_s
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volatile void * volatile dstend; /* DMA destination address end */
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volatile void * volatile dstend; /* DMA destination address end */
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volatile uint32_t ctrl; /* DMA control register */
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volatile uint32_t ctrl; /* DMA control register */
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volatile uint32_t user; /* DMA padding register, available for user */
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volatile uint32_t user; /* DMA padding register, available for user */
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};
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};
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#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DMA_H */
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#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DMA_H */
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@ -646,7 +646,7 @@ void efm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
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/* Enable buffer-full requests for the channel */
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/* Enable buffer-full requests for the channel */
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putreg32(bit, EFM_DMA_CHREQMASKC);
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putreg32(bit, EFM_DMA_CHREQMASKC);
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}
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}
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else
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else
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{
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{
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@ -656,12 +656,12 @@ void efm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
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/* Disable buffer-full requests for the channel */
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/* Disable buffer-full requests for the channel */
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putreg32(bit, EFM_DMA_CHREQMASKS);
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putreg32(bit, EFM_DMA_CHREQMASKS);
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}
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}
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/* Use the primary data structure for channel 0 */
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/* Use the primary data structure for channel 0 */
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putreg32(bit, EFM_DMA_CHALTC);
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putreg32(bit, EFM_DMA_CHALTC);
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/* Enable the channel */
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/* Enable the channel */
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@ -1721,7 +1721,7 @@ static inline int sam_multiple(struct sam_xdmach_s *xdmach)
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{
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{
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regval |= XDMACH_CNDC_NDSUP;
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regval |= XDMACH_CNDC_NDSUP;
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}
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}
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/* Update the destination address if this is a *-to-memory transfer.
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/* Update the destination address if this is a *-to-memory transfer.
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*
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*
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* TYPE = 0 -> memory-to-memory
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* TYPE = 0 -> memory-to-memory
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@ -1887,7 +1887,7 @@ static int sam_xdmac_interrupt(struct sam_xdmac_s *xdmac)
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gpending &= !bit;
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gpending &= !bit;
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}
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}
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}
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}
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return OK;
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return OK;
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}
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}
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