Fix data region mappin
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2871 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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15254662e9
@ -84,6 +84,10 @@
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# endif
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#define PT_SIZE (PTE_NPAGES * 4)
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/* We position the data section PTE's just after the text section PTE's */
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#define PG_L2_DATA_PADDR (PG_L2_BASE_PADDR + 4*PG_TEXT_NPAGES)
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#endif /* CONFIG_PAGING */
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/****************************************************************************
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@ -100,20 +104,22 @@
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* written. This macro is used when CONFIG_PAGING is enable. This case,
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* it is used asfollows:
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*
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* ldr r0, =PG_LOCKED_PBASE
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* ldr r1, =CONFIG_PAGING_NLOCKED
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* ldr r2, =MMUFLAGS
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* ldr r0, =PG_L2_BASE_PADDR
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* ldr r1, =PG_LOCKED_PBASE
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* ldr r2, =CONFIG_PAGING_NLOCKED
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* ldr r3, =MMUFLAGS
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* pg_map r0, r1, r2, r3, r4
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*
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* Inputs:
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* l2 - Physical start address in the L2 page table (modified)
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* paddr - The physical address of the start of the region to span. Must
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* be aligned to 1Mb section boundaries (modified)
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* npages - Number of pages to write in the section (modified)
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* mmuflags - L2 MMU FLAGS
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*
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* Scratch registers (modified): tmp1, tmp2
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* tmp1 - Physical address in the L2 page table.
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* tmp2 - scratch
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* Scratch registers (modified): tmp
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* l2 - Physical address in the L2 page table.
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* tmp - scratch
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*
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* Assumptions:
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* - The MMU is not yet enabled
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@ -123,31 +129,25 @@
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****************************************************************************/
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#ifdef CONFIG_PAGING
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.macro pg_map, paddr, npages, mmuflags, tmp1, tmp2
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/* tmp1 = Physical address of the start of the L2 page table
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* tmp2 = MMU flags
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*/
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ldr \tmp1, =PG_L2_BASE_PADDR
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.macro pg_map, paddr, npages, mmuflags, l2, tmp
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b 2f
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1:
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/* Write the one L2 entries. First, get tmp2 = (paddr | mmuflags),
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/* Write the one L2 entries. First, get tmp = (paddr | mmuflags),
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* the value to write into the L2 PTE
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*/
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orr \tmp2, \paddr, \mmuflags
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orr \tmp, \paddr, \mmuflags
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/* Write value into table at the current table address */
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str \tmp2, [\tmp1], #4
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str \tmp, [\l2], #4
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/* Update the physical addresses that will correspond to the next
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* table entry.
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*/
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add \paddr, \paddr, #CONFIG_PAGING_PAGESIZE
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add \tmp1, \tmp1, #4
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add \l2, \l2, #4
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/* Decrement the number of pages written */
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@ -169,23 +169,25 @@
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* macro is used when CONFIG_PAGING is enable. This case, it is used as
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* follows:
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*
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* ldr r0, =PG_LOCKED_PBASE
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* ldr r1, =(CONFIG_PAGING_NLOCKED+CONFIG_PAGING_NPAGES)
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* ldr r2, =MMU_FLAGS
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* ldr r0, =PG_L2_BASE_PADDR
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* ldr r1, =PG_LOCKED_PBASE
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* ldr r2, =(CONFIG_PAGING_NLOCKED+CONFIG_PAGING_NPAGES)
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* ldr r3, =MMU_FLAGS
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* pg_span r0, r1, r2, r3, r4
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*
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* Inputs (unmodified unless noted):
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* l2 - Physical start address in the L2 page table (modified)
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* addr - The virtual address of the start of the region to span. Must
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* be aligned to 1Mb section boundaries (modified)
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* npages - Number of pages to required to span that memory region (modified)
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* mmuflags - L1 MMU flags to use
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*
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* Scratch registers (modified):
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* addr, npages, tmp1, tmp2
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* addr, npages, tmp
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* l2 - L2 page table physical address
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* addr - Physical address in the L1 page table.
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* npages - The number of pages remaining to be accounted for
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* tmp1 - L2 page table physical address
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* tmp2 - scratch
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* tmp - scratch
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*
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* Return:
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* Nothing of interest.
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@ -197,36 +199,32 @@
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****************************************************************************/
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#ifdef CONFIG_PAGING
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.macro pg_span, addr, npages, mmuflags, tmp1, tmp2
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/* tmp1 = Physical address of the start of the L2 page table */
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ldr \tmp1, =PG_L2_BASE_PADDR
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.macro pg_span, l2, addr, npages, mmuflags, tmp
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/* Get addr = the L1 page table address coresponding to the virtual
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* address of the start of memory region to be mapped.
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*/
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ldr \tmp2, =PGTABLE_BASE_PADDR
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ldr \tmp, =PGTABLE_BASE_PADDR
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lsr \addr, \addr, #20
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add \addr, \tmp2, \addr, lsl #2
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add \addr, \tmp, \addr, lsl #2
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b 2f
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1:
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/* Write the L1 table entry that refers to this (unmapped) coarse page
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* table.
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*
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* tmp2 = (paddr | mmuflags), the value to write into the page table
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* tmp = (paddr | mmuflags), the value to write into the page table
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*/
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orr \tmp2, \tmp1, \mmuflags
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orr \tmp, \l2, \mmuflags
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/* Write the value into the L1 table at the correct offset. */
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str \tmp2, [\addr], #4
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str \tmp, [\addr], #4
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/* Update the L2 page table address for the next L1 table entry. */
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add \tmp1, \tmp1, #PT_SIZE /* Next L2 page table start paddr */
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add \l2, \l2, #PT_SIZE /* Next L2 page table start paddr */
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/* Update the number of pages that we have account for (with
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* non-mappings
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@ -182,16 +182,14 @@ __start:
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#ifdef CONFIG_PAGING
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/* Populate the L1 table for the locked and paged text regions */
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ldr r0, =PG_LOCKED_PBASE
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ldr r1, =PG_TEXT_NPAGES
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ldr r2, =MMU_L1_TEXTFLAGS
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adr r0, .Ltxtspan
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ldmia r0, {r0, r1, r2, r3}
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pg_span r0, r1, r2, r3, r4
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/* Populate the L2 table for the locked text region only */
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ldr r0, =PG_LOCKED_PBASE
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ldr r1, =CONFIG_PAGING_NLOCKED
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ldr r2, =MMU_L2_TEXTFLAGS
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adr r0, .Ltxtmap
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ldmia r0, {r0, r1, r2, r3}
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pg_map r0, r1, r2, r3, r4
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#else
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/* Create a virtual single section mapping for the first MB of the .text
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@ -355,17 +353,15 @@ __start:
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#if defined(CONFIG_PAGING)
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/* Populate the L1 table for the data regions */
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ldr r0, =PG_PAGED_PBASE
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ldr r1, =PG_DATA_NPAGED
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ldr r2, =MMU_L1_DATAFLAGS
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adr r0, .Ldatamap
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ldmia r0, {r0, r1, r2, r3}
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pg_span r0, r1, r2, r3, r4
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/* Populate the L2 table for the data region */
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ldr r0, =PG_PAGED_PBASE
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ldr r1, =PG_DATA_NPAGED
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ldr r2, =MMU_L2_DATAFLAGS
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pg_map r0, r1, r2, r3, r4
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adr r0, .Ldatamap
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ldmia r0, {r0, r1, r2, r3, r4}
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pg_map r0, r1, r2, r4, r3
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#elif defined(CONFIG_BOOT_RUNFROMFLASH)
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# error "Logic not implemented"
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@ -440,7 +436,7 @@ __start:
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mov lr, #0
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b os_start
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/* Variables:
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/* Text-section constants:
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*
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* _sbss is the start of the BSS region (see ld.script)
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* _ebss is the end of the BSS regsion (see ld.script)
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@ -454,8 +450,31 @@ __start:
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.long _sbss
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.long _ebss
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.long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4
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#ifdef CONFIG_PAGING
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.Ltxtspan:
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.long PG_L2_BASE_PADDR
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.long PG_LOCKED_PBASE
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.long PG_TEXT_NPAGES
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.long MMU_L1_TEXTFLAGS
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.Ltxtmap:
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.long PG_L2_BASE_PADDR
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.long PG_LOCKED_PBASE
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.long CONFIG_PAGING_NLOCKED
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.long MMU_L2_TEXTFLAGS
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.Ldatamap:
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.long PG_L2_DATA_PADDR
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.long PG_DATA_PBASE
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.long PG_DATA_NPAGED
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.long MMU_L1_DATAFLAGS
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.long MMU_L2_DATAFLAGS
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#endif
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.size .Lvstart, .-.Lvstart
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/* Data section variables */
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/* This global variable is unsigned long g_heapbase and is
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* exported from here only because of its coupling to .Linitparms
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* above.
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