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This commit, initially for the imxrt1050, separates out the pinmux and iomux functions cleanly. For ease of conversion default IOMUX definitions have been added into imxrt_iomux.h. The change effectively does two things;

Browse Source 
(1) unifies the iomux definitions - previously some pins had them, and some didn't. This effectively made it impossible to use the pinmuxes without editing the header file in the standard distribution tree.

(2) unifies the pin definitions so that every pin now has a suffix. This makes it *much* easier to see when a pin is in use in your code, because it will always have a definition in your board.h file.

For anyone who is already using this CPU, a couple of small changes are needed to existing code;

In respect of (1) add IOMUX decorators to your pin definitions. You will find defaults in haardware/imxrt_iomux.h. Every pin should have a IOMUX decorator and in general the defaults should be OK. So while previously in your board.h file you might have had;

You will now have;

In respect of (2) you will need to add selectors for any function that previously only had one pinning option. There aren't many of those but LPUART1 is a good example. That just means adding into your board.h something like;
This commit is contained in:
Dave Marples 2019-11-08 17:08:48 -06:00 committed by Gregory Nutt
parent 93e11dacb8
commit 15c2951c0d
6 changed files with 716 additions and 735 deletions
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60
arch/arm/src/imxrt/hardware/imxrt_iomuxc.h
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@ -121,4 +121,64 @@
# define PADCTL_PUS_UP_22K (3 << PADCTL_PUS_SHIFT) /* 22K Ohm Pull Up */
#define PADCTL_HYS (1 << 16) /* Bit 16: Hysteresis Enable Field */
/* Defaults for drive conditions for each set of pins. These are a good
* starting point but should be updated once you've got real hardware
* to measure.
*/
#define IOMUX_UART_DEFAULT (IOMUX_PULL_UP_22K | IOMUX_DRIVE_40OHM | \
IOMUX_SLEW_SLOW | IOMUX_SPEED_LOW | IOMUX_SCHMITT_TRIGGER)
#define IOMUX_LPSPI_DEFAULT (IOMUX_PULL_UP_100K | IOMUX_DRIVE_40OHM | \
IOMUX_SLEW_FAST | IOMUX_SPEED_MEDIUM)
#define IOMUX_LPI2C_DEFAULT (GPIO_SION_ENABLE | IOMUX_OPENDRAIN | \
IOMUX_SPEED_MEDIUM | IOMUX_DRIVE_33OHM)
#define IOMUX_LCD_DEFAULT (IOMUX_PULL_UP_100K | IOMUX_DRIVE_40OHM | \
IOMUX_SLEW_SLOW | IOMUX_SPEED_MEDIUM | IOMUX_SCHMITT_TRIGGER)
#define IOMUX_LCD_BL_DEFAULT (IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
IOMUX_SLEW_SLOW)
#define IOMUX_LED_DEFAULT (IOMUX_SLEW_SLOW | \
IOMUX_DRIVE_50OHM | IOMUX_SPEED_LOW )
#define IOMUX_ENET_MDIO_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | IOMUX_OPENDRAIN | \
IOMUX_SPEED_LOW | IOMUX_PULL_UP_100K )
#define IOMUX_ENET_MDC_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | IOMUX_SPEED_MAX | \
IOMUX_PULL_UP_100K )
#define IOMUX_ENET_EN_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | IOMUX_SPEED_MAX | \
IOMUX_PULL_UP_100K )
#define IOMUX_ENET_RXERR_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | IOMUX_SPEED_MAX | \
IOMUX_PULL_UP_100K )
#define IOMUX_ENET_DATA_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | IOMUX_SPEED_MAX | \
IOMUX_PULL_UP_100K )
#define IOMUX_ENET_INT_DEFAULT (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | \
IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K)
#define IOMUX_ENET_RST_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | IOMUX_SPEED_MEDIUM | \
IOMUX_PULL_UP_100K )
#define IOMUX_ENET_TX_CLK_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_40OHM | IOMUX_SPEED_LOW | \
IOMUX_PULL_DOWN_100K | IOMUX_PULL_KEEP | GPIO_SION_ENABLE )
#define IOMUX_USDHC1_DATAX_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
#define IOMUX_USDHC1_CMD_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
#define IOMUX_USDHC1_CLK_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
IOMUX_SPEED_MAX)
#define IOMUX_USDHC1_CD_DEFAULT (IOMUX_PULL_UP_100K)
#define IOMUX_VSD_DEFAULT (IOMUX_SLEW_SLOW | IOMUX_DRIVE_90OHM | \
IOMUX_SPEED_MEDIUM)
#define IOMUX_SW_DEFAULT (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K )
#define IOMUX_GOUT_DEFAULT (IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
IOMUX_SLEW_SLOW)
#define IOMUX_USBOTG_ID_DEFAULT (IOMUX_PULL_UP_100K)
#define IOMUX_USBOTG_PWR_DEFAULT (IOMUX_SLEW_SLOW | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_LOW )
#define IOMUX_USBOTG_OC_DEFAULT (IOMUX_PULL_UP_100K)
#endif /* __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_IOMUXC_H */

1099
arch/arm/src/imxrt/hardware/rt105x/imxrt105x_pinmux.h
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165
boards/arm/imxrt/imxrt1050-evk/include/board.h
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@ -68,18 +68,20 @@
* 600Mhz = 600Mhz / 1
*
* PRE_PERIPH_CLK_SEL = PRE_PERIPH_CLK_SEL_PLL1
* PERIPH_CLK_SEL = 1 (0 select PERIPH_CLK2_PODF, 1 select PRE_PERIPH_CLK_SEL_PLL1)
* PERIPH_CLK_SEL = 1 (0 select PERIPH_CLK2_PODF,
* 1 select PRE_PERIPH_CLK_SEL_PLL1)
* PERIPH_CLK = 600Mhz
*
* IPG_CLOCK_ROOT = AHB_CLOCK_ROOT / IMXRT_IPG_PODF_DIVIDER
* IMXRT_IPG_PODF_DIVIDER = 4
* 150Mhz = 600Mhz / 4
*
* PRECLK_CLOCK_ROOT = IPG_CLOCK_ROOT / IMXRT_PERCLK_PODF_DIVIDER
* IMXRT_PERCLK_PODF_DIVIDER = 1
* 150Mhz = 150Mhz / 1
* PERCLK_CLOCK_ROOT = IPG_CLOCK_ROOT / IMXRT_PERCLK_PODF_DIVIDER
* IMXRT_PERCLK_PODF_DIVIDER = 9
* 16.6Mhz = 150Mhz / 9
*
* SEMC_CLK_ROOT = 600Mhz / IMXRT_SEMC_PODF_DIVIDER (labeled AIX_PODF in 18.2)
* SEMC_CLK_ROOT = 600Mhz / IMXRT_SEMC_PODF_DIVIDER
* (labeled AIX_PODF in 18.2)
* IMXRT_SEMC_PODF_DIVIDER = 8
* 75Mhz = 600Mhz / 8
*
@ -88,6 +90,12 @@
*
* Set USB1 PLL (PLL3) to fOut = (24Mhz * 20)
* 480Mhz = (24Mhz * 20)
*
* These clock frequencies can be verified via the CCM_CLKO1 pin and sending
* the appropriate clock to it with something like;
*
* putreg32( <Clk number> | CCM_CCOSR_CLKO1_EN , IMXRT_CCM_CCOSR);
* imxrt_config_gpio(GPIO_CCM_CLKO1);
*/
#define BOARD_XTAL_FREQUENCY 24000000
@ -178,21 +186,13 @@
* sure shapes are square with minimal ringing.
*/
#define USDHC1_DATAX_IOMUX (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
#define USDHC1_CMD_IOMUX (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER)
#define USDHC1_CLK_IOMUX (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \
IOMUX_SPEED_MAX)
#define USDHC1_CD_IOMUX (0)
#define PIN_USDHC1_D0 (GPIO_USDHC1_DATA0 | USDHC1_DATAX_IOMUX)
#define PIN_USDHC1_D1 (GPIO_USDHC1_DATA1 | USDHC1_DATAX_IOMUX)
#define PIN_USDHC1_D2 (GPIO_USDHC1_DATA2 | USDHC1_DATAX_IOMUX)
#define PIN_USDHC1_D3 (GPIO_USDHC1_DATA3 | USDHC1_DATAX_IOMUX)
#define PIN_USDHC1_DCLK (GPIO_USDHC1_CLK | USDHC1_CLK_IOMUX)
#define PIN_USDHC1_CMD (GPIO_USDHC1_CMD | USDHC1_CMD_IOMUX)
#define PIN_USDHC1_CD (GPIO_USDHC1_CD_2 | USDHC1_CD_IOMUX)
#define PIN_USDHC1_D0 (GPIO_USDHC1_DATA0 | IOMUX_USDHC1_DATAX_DEFAULT)
#define PIN_USDHC1_D1 (GPIO_USDHC1_DATA1 | IOMUX_USDHC1_DATAX_DEFAULT)
#define PIN_USDHC1_D2 (GPIO_USDHC1_DATA2 | IOMUX_USDHC1_DATAX_DEFAULT)
#define PIN_USDHC1_D3 (GPIO_USDHC1_DATA3 | IOMUX_USDHC1_DATAX_DEFAULT)
#define PIN_USDHC1_DCLK (GPIO_USDHC1_CLK | IOMUX_USDHC1_CLK_DEFAULT)
#define PIN_USDHC1_CMD (GPIO_USDHC1_CMD | IOMUX_USDHC1_CMD_DEFAULT)
#define PIN_USDHC1_CD (GPIO_USDHC1_CD_2 | IOMUX_USDHC1_CLK_DEFAULT)
/* 386 KHz for initial inquiry stuff */
@ -210,48 +210,94 @@
#define BOARD_USDHC_SD4MODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
#define BOARD_USDHC_SD4MODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
/* Buttons ****************************************************************/
#define GPIO_SW (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | \
IOMUX_SW_DEFAULT | \
GPIO_PORT5 | GPIO_PIN0 | ) /* WAKEUP */
/* Test Pins **************************************************************/
#define BOARD_NGPIOIN 0 /* Amount of GPIO Input pins */
#define BOARD_NGPIOOUT 4 /* Amount of GPIO Output pins */
#define BOARD_NGPIOINT 0 /* Amount of GPIO Input w/ Interruption pins */
#define GPIO_GOUT1 (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | IOMUX_GOUT_DEFAULT | \
GPIO_PORT1 | GPIO_PIN19)
#define GPIO_GOUT2 (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | IOMUX_GOUT_DEFAULT | \
GPIO_PIN18 | GPIO_PORT1)
#define GPIO_GOUT3 (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | IOMUX_GOUT_DEFAULT | \
GPIO_PIN10 | GPIO_PORT1)
#define GPIO_GOUT4 (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | IOMUX_GOUT_DEFAULT | \
GPIO_PIN9 | GPIO_PORT1)
/* LED Disambiguation *******************************************************/
#ifdef CONFIG_ARCH_LEDS
#define GPIO_LED (GPIO_OUTPUT | IOMUX_LED_DEFAULT | \
GPIO_OUTPUT_ZERO | GPIO_PORT1 | GPIO_PIN9) /* AD_BO_09 */
#endif
/* Backlight of LCD ********************************************************/
#define GPIO_LCD_BL (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GPIO_PORT2 | \
GPIO_PIN31 | IOMUX_LCD_BL_DEFAULT)
/* ETH Disambiguation *******************************************************/
#define GPIO_ENET_MDIO GPIO_ENET_MDIO_3
#define GPIO_ENET_MDC GPIO_ENET_MDC_3
#define GPIO_ENET_RX_EN GPIO_ENET_RX_EN_1
#define GPIO_ENET_RX_ER GPIO_ENET_RX_ER_1
#define GPIO_ENET_TX_CLK GPIO_ENET_TX_CLK_1
#define GPIO_ENET_TX_EN GPIO_ENET_TX_EN_1
#define GPIO_ENET_TX_DATA00 (GPIO_ENET_TX_DATA00_1| \
IOMUX_ENET_DATA_DEFAULT) /* GPIO_B1_07 */
#define GPIO_ENET_TX_DATA01 (GPIO_ENET_TX_DATA01_1| \
IOMUX_ENET_DATA_DEFAULT) /* GPIO_B1_08 */
#define GPIO_ENET_RX_DATA00 (GPIO_ENET_RX_DATA00_1| \
IOMUX_ENET_DATA_DEFAULT) /* GPIO_B1_04 */
#define GPIO_ENET_RX_DATA01 (GPIO_ENET_RX_DATA01_1| \
IOMUX_ENET_DATA_DEFAULT) /* GPIO_B1_05 */
#define GPIO_ENET_MDIO (GPIO_ENET_MDIO_3|IOMUX_ENET_MDIO_DEFAULT) /* GPIO_EMC_41 */
#define GPIO_ENET_MDC (GPIO_ENET_MDC_3|IOMUX_ENET_MDC_DEFAULT) /* GPIO_EMC_40 */
#define GPIO_ENET_RX_EN (GPIO_ENET_RX_EN_1|IOMUX_ENET_EN_DEFAULT) /* GPIO_B1_06 */
#define GPIO_ENET_RX_ER (GPIO_ENET_RX_ER_1|IOMUX_ENET_RXERR_DEFAULT) /* GPIO_B1_11 */
#define GPIO_ENET_TX_CLK (GPIO_ENET_REF_CLK_2|\
IOMUX_ENET_TX_CLK_DEFAULT) /* GPIO_B1_10 */
#define GPIO_ENET_TX_EN (GPIO_ENET_TX_EN_1|IOMUX_ENET_EN_DEFAULT) /* GPIO_B1_09 */
#define GPIO_ENET_INT (IOMUX_ENET_INT_DEFAULT | \
GPIO_PORT1 | GPIO_PIN10) /* AD_B0_10 */
#define GPIO_ENET_IRQ IMXRT_IRQ_GPIO1_10
#define GPIO_ENET_RST (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
GPIO_PORT1 | GPIO_PIN9 | IOMUX_ENET_RST_DEFAULT)
#ifdef CONFIG_ETH0_PHY_KSZ8081
#ifdef GPIO_LED
#warning LED interferes with ETH reset unless R323 is removed.
#endif
#endif
/* PIO Disambiguation *******************************************************/
/* LPUARTs
*
* Virtual console port provided by OpenSDA:
* Virtual console port provided by OpenSDA on UART1 and
* Arduino RS-232 Shield on UART3.
*
* UART1_TXD GPIO_AD_B0_12 LPUART1_TX
* UART1_RXD GPIO_AD_B0_13 LPUART1_RX
*
* NOTE: There are no alternative pin configurations for LPUART1.
*
* Arduino RS-232 Shield:
*
* J22 D0 UART_RX/D0 GPIO_AD_B1_07 LPUART3_RX
* J22 D1 UART_TX/D1 GPIO_AD_B1_06 LPUART3_TX
*/
#define GPIO_LPUART3_RX GPIO_LPUART3_RX_1 /* GPIO_AD_B1_07 */
#define GPIO_LPUART3_TX GPIO_LPUART3_TX_1 /* GPIO_AD_B1_06 */
#define GPIO_LPUART1_RX (GPIO_LPUART1_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_13 */
#define GPIO_LPUART1_TX (GPIO_LPUART1_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_12 */
#define GPIO_LPUART3_RX (GPIO_LPUART3_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B1_07 */
#define GPIO_LPUART3_TX (GPIO_LPUART3_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B1_06 */
/* LPI2Cs
*
* Arduino Connector
*
* J23 A4 A4/ADC4/SDA GPIO_AD_B1_01 LPI2C1_SDA
* J23 A5 A5/ADC5/SCL GPIO_AD_B1_00 LPI2C1_SCL
* Arduino Connector LPI2C1 and audio/gyro IO on LPI2C3.
*/
#define GPIO_LPI2C1_SDA GPIO_LPI2C1_SDA_2 /* GPIO_AD_B1_01 */
#define GPIO_LPI2C1_SCL GPIO_LPI2C1_SCL_2 /* GPIO_AD_B1_00 */
#define GPIO_LPI2C3_SDA GPIO_LPI2C3_SDA_2 /* GPIO_AD_B1_01 */
#define GPIO_LPI2C3_SCL GPIO_LPI2C3_SCL_2 /* GPIO_AD_B1_00 */
#define GPIO_LPI2C1_SDA (GPIO_LPI2C1_SDA_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_01 */
#define GPIO_LPI2C1_SCL (GPIO_LPI2C1_SCL_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_00 */
#define GPIO_LPI2C3_SDA (GPIO_LPI2C3_SDA_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_01 */
#define GPIO_LPI2C3_SCL (GPIO_LPI2C3_SCL_2|IOMUX_LPI2C_DEFAULT) /* GPIO_AD_B1_00 */
/* LPSPI
*
@ -262,9 +308,28 @@
* J24 D15 GPIO_AD_B0_00 LPSPI3_SCK
*/
#define GPIO_LPSPI3_SCK GPIO_LPSPI3_SCK_2 /* GPIO_AD_B0_00 */
#define GPIO_LPSPI3_MISO GPIO_LPSPI3_SDI_2 /* GPIO_AD_B0_02 */
#define GPIO_LPSPI3_MOSI GPIO_LPSPI3_SDO_2 /* GPIO_AD_B0_01 */
#define GPIO_LPSPI3_SCK (GPIO_LPSPI3_SCK_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_00 */
#define GPIO_LPSPI3_MISO (GPIO_LPSPI3_SDI_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_02 */
#define GPIO_LPSPI3_MOSI (GPIO_LPSPI3_SDO_2|IOMUX_LPSPI_DEFAULT) /* GPIO_AD_B0_01 */
#define IOMUX_LPSPI3_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
#define GPIO_LPSPI3_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
GPIO_PORT1 | GPIO_PIN3 | IOMUX_LPSPI3_CS) /* GPIO_AD_B0_03 */
/* LPSPI1 CS: GPIO_SD_B0_01 */
#define IOMUX_LPSPI1_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
#define GPIO_LPSPI1_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
GPIO_PORT3 | GPIO_PIN13 | IOMUX_LPSPI1_CS)
#define IOMUX_MMCSD_EN (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
#define GPIO_MMCSD_EN (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
GPIO_PORT3 | GPIO_PIN2 | IOMUX_MMCSD_EN)
/****************************************************************************
* Public Types

118
boards/arm/imxrt/imxrt1050-evk/src/imxrt1050-evk.h
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@ -55,124 +55,6 @@
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* i.MX RT 1050 GPIO Pin Definitions ****************************************/
/* Test points */
#define BOARD_NGPIOIN 0 /* Amount of GPIO Input pins */
#define BOARD_NGPIOOUT 4 /* Amount of GPIO Output pins */
#define BOARD_NGPIOINT 0 /* Amount of GPIO Input w/ Interruption pins */
#define IOMUX_GOUT (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \
IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
IOMUX_SLEW_SLOW)
#define GPIO_GOUT1 (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GPIO_PORT1 | \
GPIO_PIN19 | IOMUX_GOUT)
#define GPIO_GOUT2 (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GPIO_PORT1 | \
GPIO_PIN18 | IOMUX_GOUT)
#define GPIO_GOUT3 (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GPIO_PORT1 | \
GPIO_PIN10 | IOMUX_GOUT)
#define GPIO_GOUT4 (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GPIO_PORT1 | \
GPIO_PIN9 | IOMUX_GOUT)
/* LEDs
*
* There are four LED status indicators located on the EVK Board. The
* functions of these LEDs include:
*
* - Main Power Supply(D3)
* Green: DC 5V main supply is normal.
* Red: J2 input voltage is over 5.6V.
* Off: The board is not powered.
* - Reset RED LED(D15)
* - OpenSDA LED(D16)
* - USER LED(D18)
*
* Only a single LED, D18, is under software control. It connects to
* GPIO_AD_B0_09 which is shared with JTAG_TDI and ENET_RST. This pin
* must be configured as ALT5, GPIO1_IO09
*/
#define IOMUX_LED (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \
IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
IOMUX_SLEW_SLOW)
#define GPIO_LED (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GPIO_PORT1 | \
GPIO_PIN9 | IOMUX_LED)
/* Backlight of LCD */
#define IOMUX_LCD_BL (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \
IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
IOMUX_SLEW_SLOW)
#define GPIO_LCD_BL (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | GPIO_PORT2 | \
GPIO_PIN31 | IOMUX_LCD_BL)
/* Buttons
*
* The IMXRT board has one external user button
*
* 1. SW8 (IRQ88) GPIO5-00
*/
#define IOMUX_SW8 (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
#define GPIO_SW8 (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | \
GPIO_PORT5 | GPIO_PIN0 | IOMUX_SW8)
/* Ethernet Interrupt: GPIOAD_B0_10
*
* This pin has a week pull-up within the PHY, is open-drain, and requires
* an external 1k ohm pull-up resistor (present on the EVK). A falling
* edge then indicates a change in state of the PHY.
*/
#define IOMUX_ENET_INT (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K)
#define GPIO_ENET_INT (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | \
GPIO_PORT1 | GPIO_PIN10 | IOMUX_ENET_INT)
#define GPIO_ENET_IRQ IMXRT_IRQ_GPIO1_10
/* Ethernet Reset: GPIOAD_B0_09
*
* The #RST uses inverted logic. The initial value of zero will put the
* PHY into the reset state.
*/
#define IOMUX_ENET_RST (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
#define GPIO_ENET_RST (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
GPIO_PORT1 | GPIO_PIN9 | IOMUX_ENET_RST)
/* LPSPI1 CS: GPIO_SD_B0_01 */
#define IOMUX_LPSPI1_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
#define GPIO_LPSPI1_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
GPIO_PORT3 | GPIO_PIN13 | IOMUX_LPSPI1_CS)
#define IOMUX_MMCSD_EN (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
#define GPIO_MMCSD_EN (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
GPIO_PORT3 | GPIO_PIN2 | IOMUX_MMCSD_EN)
/* LPSPI3 CS: GPIO_AD_B0_03 */
#define IOMUX_LPSPI3_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
#define GPIO_LPSPI3_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
GPIO_PORT1 | GPIO_PIN3 | IOMUX_LPSPI3_CS)
/****************************************************************************
* Public Types
****************************************************************************/

7
boards/arm/imxrt/imxrt1050-evk/src/imxrt_ethernet.c
View File

@ -61,6 +61,8 @@
#include "imxrt1050-evk.h"
#include <arch/board/board.h>
#ifdef CONFIG_IMXRT_ENET
/****************************************************************************
@ -147,6 +149,10 @@ int imxrt_phy_boardinitialize(int intf)
* The #RST uses inverted logic. The initial value of zero will put the
* PHY into the reset state.
*/
#ifdef GPIO_ENET_RST
/* On the EVK the RST pin is combined with LED, so sometimes can't be
* accessed. Only stress about it if we've got a definition.
*/
phyinfo("Configuring reset: %08x\n", GPIO_ENET_RST);
imxrt_config_gpio(GPIO_ENET_RST);
@ -154,6 +160,7 @@ int imxrt_phy_boardinitialize(int intf)
/* Take the PHY out of reset. */
imxrt_gpio_write(GPIO_ENET_RST, true);
#endif
return OK;
}

2
boards/arm/imxrt/imxrt1050-evk/src/imxrt_userleds.c
View File

@ -59,7 +59,7 @@
#include <arch/board/board.h>
#ifndef CONFIG_ARCH_LEDS
#if !defined(CONFIG_ARCH_LEDS) && defined(GPIO_LED)
/****************************************************************************
* Public Functions