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arch/arm: Fix error: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'uint32_t' {aka 'long unsigned int'}

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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao 2023-09-25 20:28:59 +08:00 committed by GUIDINGLI
parent 5d6f6f2d47
commit 167c4ae2a4
9 changed files with 19 additions and 19 deletions
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8
arch/arm/src/armv7-a/arm_dataabort.c
View File

@ -138,8 +138,8 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
return regs;
segfault:
_alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
_alert("Data abort. PC: %08" PRIx32 " DFAR: %08" PRIx32 " DFSR: %08"
PRIx32 "\n", regs[REG_PC], dfar, dfsr);
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */
}
@ -156,8 +156,8 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
/* Crash -- possibly showing diagnostic debug information. */
_alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
_alert("Data abort. PC: %08" PRIx32 " DFAR: %08" PRIx32 " DFSR: %08"
PRIx32 "\n", regs[REG_PC], dfar, dfsr);
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */
}

8
arch/arm/src/armv7-a/arm_prefetchabort.c
View File

@ -109,8 +109,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
}
else
{
_alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
_alert("Prefetch abort. PC: %08" PRIx32 " IFAR: %08" PRIx32
" IFSR: %08" PRIx32 "\n", regs[REG_PC], ifar, ifsr);
PANIC_WITH_REGS("panic", regs);
}
@ -129,8 +129,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
/* Crash -- possibly showing diagnostic debug information. */
_alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
_alert("Prefetch abort. PC: %08" PRIx32 " IFAR: %08" PRIx32 " IFSR: %08"
PRIx32 "\n", regs[REG_PC], ifar, ifsr);
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */
}

2
arch/arm/src/armv7-a/arm_undefinedinsn.c
View File

@ -42,7 +42,7 @@
uint32_t *arm_undefinedinsn(uint32_t *regs)
{
_alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
_alert("Undefined instruction at 0x%" PRIx32 "\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */

4
arch/arm/src/armv7-r/arm_dataabort.c
View File

@ -61,8 +61,8 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
/* Crash -- possibly showing diagnostic debug information. */
_alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
_alert("Data abort. PC: %08" PRIx32 " DFAR: %08" PRIx32 " DFSR: %08"
PRIx32 "\n", regs[REG_PC], dfar, dfsr);
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */
}

4
arch/arm/src/armv7-r/arm_prefetchabort.c
View File

@ -57,8 +57,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
/* Crash -- possibly showing diagnostic debug information. */
_alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
_alert("Prefetch abort. PC: %08" PRIx32 " IFAR: %08" PRIx32 " IFSR: %08"
PRIx32 "\n", regs[REG_PC], ifar, ifsr);
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */
}

2
arch/arm/src/armv7-r/arm_undefinedinsn.c
View File

@ -42,7 +42,7 @@
uint32_t *arm_undefinedinsn(uint32_t *regs)
{
_alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
_alert("Undefined instruction at 0x%" PRIx32 "\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */

4
arch/arm/src/armv8-r/arm_dataabort.c
View File

@ -61,8 +61,8 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
/* Crash -- possibly showing diagnostic debug information. */
_alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
_alert("Data abort. PC: %08" PRIx32 " DFAR: %08" PRIx32 " DFSR: %08"
PRIx32 "\n", regs[REG_PC], dfar, dfsr);
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */
}

4
arch/arm/src/armv8-r/arm_prefetchabort.c
View File

@ -57,8 +57,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
/* Crash -- possibly showing diagnostic debug information. */
_alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
_alert("Prefetch abort. PC: %08" PRIx32 " IFAR: %08" PRIx32 " IFSR: %08"
PRIx32 "\n", regs[REG_PC], ifar, ifsr);
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */
}

2
arch/arm/src/armv8-r/arm_undefinedinsn.c
View File

@ -42,7 +42,7 @@
uint32_t *arm_undefinedinsn(uint32_t *regs)
{
_alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
_alert("Undefined instruction at 0x%" PRIx32 "\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC_WITH_REGS("panic", regs);
return regs; /* To keep the compiler happy */