diff --git a/arch/arm/src/armv7-a/arm_dataabort.c b/arch/arm/src/armv7-a/arm_dataabort.c
index 2b9aa45ce1..2c2952b129 100644
--- a/arch/arm/src/armv7-a/arm_dataabort.c
+++ b/arch/arm/src/armv7-a/arm_dataabort.c
@@ -138,8 +138,8 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
   return regs;
 
 segfault:
-  _alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
-        regs[REG_PC], dfar, dfsr);
+  _alert("Data abort. PC: %08" PRIx32 " DFAR: %08" PRIx32 " DFSR: %08"
+         PRIx32 "\n", regs[REG_PC], dfar, dfsr);
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */
 }
@@ -156,8 +156,8 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  _alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
-        regs[REG_PC], dfar, dfsr);
+  _alert("Data abort. PC: %08" PRIx32 " DFAR: %08" PRIx32 " DFSR: %08"
+         PRIx32 "\n", regs[REG_PC], dfar, dfsr);
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */
 }
diff --git a/arch/arm/src/armv7-a/arm_prefetchabort.c b/arch/arm/src/armv7-a/arm_prefetchabort.c
index 734b703b85..b071b7c14e 100644
--- a/arch/arm/src/armv7-a/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-a/arm_prefetchabort.c
@@ -109,8 +109,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
     }
   else
     {
-      _alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
-            regs[REG_PC], ifar, ifsr);
+      _alert("Prefetch abort. PC: %08" PRIx32 " IFAR: %08" PRIx32
+             " IFSR: %08" PRIx32 "\n", regs[REG_PC], ifar, ifsr);
       PANIC_WITH_REGS("panic", regs);
     }
 
@@ -129,8 +129,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  _alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
-        regs[REG_PC], ifar, ifsr);
+  _alert("Prefetch abort. PC: %08" PRIx32 " IFAR: %08" PRIx32 " IFSR: %08"
+         PRIx32 "\n", regs[REG_PC], ifar, ifsr);
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */
 }
diff --git a/arch/arm/src/armv7-a/arm_undefinedinsn.c b/arch/arm/src/armv7-a/arm_undefinedinsn.c
index ddd927914c..5bba8b4113 100644
--- a/arch/arm/src/armv7-a/arm_undefinedinsn.c
+++ b/arch/arm/src/armv7-a/arm_undefinedinsn.c
@@ -42,7 +42,7 @@
 
 uint32_t *arm_undefinedinsn(uint32_t *regs)
 {
-  _alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
+  _alert("Undefined instruction at 0x%" PRIx32 "\n", regs[REG_PC]);
   CURRENT_REGS = regs;
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-r/arm_dataabort.c b/arch/arm/src/armv7-r/arm_dataabort.c
index 558a1c0fa5..f055e0c5f7 100644
--- a/arch/arm/src/armv7-r/arm_dataabort.c
+++ b/arch/arm/src/armv7-r/arm_dataabort.c
@@ -61,8 +61,8 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  _alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
-        regs[REG_PC], dfar, dfsr);
+  _alert("Data abort. PC: %08" PRIx32 " DFAR: %08" PRIx32 " DFSR: %08"
+         PRIx32 "\n", regs[REG_PC], dfar, dfsr);
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */
 }
diff --git a/arch/arm/src/armv7-r/arm_prefetchabort.c b/arch/arm/src/armv7-r/arm_prefetchabort.c
index ac030a6d17..d6742350db 100644
--- a/arch/arm/src/armv7-r/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-r/arm_prefetchabort.c
@@ -57,8 +57,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  _alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
-        regs[REG_PC], ifar, ifsr);
+  _alert("Prefetch abort. PC: %08" PRIx32 " IFAR: %08" PRIx32 " IFSR: %08"
+         PRIx32 "\n", regs[REG_PC], ifar, ifsr);
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */
 }
diff --git a/arch/arm/src/armv7-r/arm_undefinedinsn.c b/arch/arm/src/armv7-r/arm_undefinedinsn.c
index 4bc9367c5d..77b54b0bff 100644
--- a/arch/arm/src/armv7-r/arm_undefinedinsn.c
+++ b/arch/arm/src/armv7-r/arm_undefinedinsn.c
@@ -42,7 +42,7 @@
 
 uint32_t *arm_undefinedinsn(uint32_t *regs)
 {
-  _alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
+  _alert("Undefined instruction at 0x%" PRIx32 "\n", regs[REG_PC]);
   CURRENT_REGS = regs;
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv8-r/arm_dataabort.c b/arch/arm/src/armv8-r/arm_dataabort.c
index 4df2a002aa..7ca88492be 100644
--- a/arch/arm/src/armv8-r/arm_dataabort.c
+++ b/arch/arm/src/armv8-r/arm_dataabort.c
@@ -61,8 +61,8 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  _alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
-        regs[REG_PC], dfar, dfsr);
+  _alert("Data abort. PC: %08" PRIx32 " DFAR: %08" PRIx32 " DFSR: %08"
+         PRIx32 "\n", regs[REG_PC], dfar, dfsr);
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */
 }
diff --git a/arch/arm/src/armv8-r/arm_prefetchabort.c b/arch/arm/src/armv8-r/arm_prefetchabort.c
index d851f0a688..e9250cf7bc 100644
--- a/arch/arm/src/armv8-r/arm_prefetchabort.c
+++ b/arch/arm/src/armv8-r/arm_prefetchabort.c
@@ -57,8 +57,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
 
   /* Crash -- possibly showing diagnostic debug information. */
 
-  _alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
-        regs[REG_PC], ifar, ifsr);
+  _alert("Prefetch abort. PC: %08" PRIx32 " IFAR: %08" PRIx32 " IFSR: %08"
+         PRIx32 "\n", regs[REG_PC], ifar, ifsr);
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */
 }
diff --git a/arch/arm/src/armv8-r/arm_undefinedinsn.c b/arch/arm/src/armv8-r/arm_undefinedinsn.c
index 97d24ed448..f227946abc 100644
--- a/arch/arm/src/armv8-r/arm_undefinedinsn.c
+++ b/arch/arm/src/armv8-r/arm_undefinedinsn.c
@@ -42,7 +42,7 @@
 
 uint32_t *arm_undefinedinsn(uint32_t *regs)
 {
-  _alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
+  _alert("Undefined instruction at 0x%" PRIx32 "\n", regs[REG_PC]);
   CURRENT_REGS = regs;
   PANIC_WITH_REGS("panic", regs);
   return regs; /* To keep the compiler happy */