nxstyle errors fixed
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52097a4345
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@ -614,6 +614,7 @@
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# define TIVA_UDMA_BASE (TIVA_PERIPH1_BASE + 0xff000) /* -0xfffff: Micro Direct Memory Access */
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/* Peripheral region 2 */
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/* -0x2ffff: Reserved */
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# define TIVA_CCM_BASE (TIVA_PERIPH2_BASE + 0x30000) /* -0x30fff: CRC/Cryptographic Control */
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/* -0x33fff: Reserved */
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@ -626,7 +627,9 @@
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# define TIVA_EPHY_BASE (TIVA_PERIPH2_BASE + 0x54000) /* -0x54fff: EPHY */
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/* -0xfffff: Reserved */
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#elif defined(CONFIG_ARCH_CHIP_TM4C1294NCPDT)
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/* Peripheral region 1 */
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# define TIVA_WDOG0_BASE (TIVA_PERIPH1_BASE + 0x00000) /* -0x00fff: Watchdog Timer 0 */
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# define TIVA_WDOG1_BASE (TIVA_PERIPH1_BASE + 0x01000) /* -0x00fff: Watchdog Timer 1 */
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/* -0x03fff: Reserved */
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@ -718,13 +721,16 @@
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# define TIVA_UDMA_BASE (TIVA_PERIPH1_BASE + 0xff000) /* -0xfffff: Micro Direct Memory Access */
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/* Peripheral region 2 */
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/* -0x2ffff: Reserved */
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# define TIVA_CCM_BASE (TIVA_PERIPH2_BASE + 0x30000) /* -0x30fff: CRC/Cryptographic Control */
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/* -0x53fff: Reserved */
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# define TIVA_EPHY_BASE (TIVA_PERIPH2_BASE + 0x54000) /* -0x54fff: EPHY 0 */
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/* -0xfffff: Reserved */
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#elif defined(CONFIG_ARCH_CHIP_TM4C129ENCPDT)
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/* Peripheral region 1 */
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# define TIVA_WDOG0_BASE (TIVA_PERIPH1_BASE + 0x00000) /* -0x00fff: Watchdog Timer 0 */
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# define TIVA_WDOG1_BASE (TIVA_PERIPH1_BASE + 0x01000) /* -0x00fff: Watchdog Timer 1 */
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/* -0x03fff: Reserved */
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@ -816,6 +822,7 @@
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# define TIVA_UDMA_BASE (TIVA_PERIPH1_BASE + 0xff000) /* -0xfffff: Micro Direct Memory Access */
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/* Peripheral region 2 */
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/* -0x2ffff: Reserved */
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# define TIVA_CCM_BASE (TIVA_PERIPH2_BASE + 0x30000) /* -0x30fff: CRC/Cryptographic Control */
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/* -0x53fff: Reserved */
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@ -921,6 +928,7 @@
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# define TIVA_UDMA_BASE (TIVA_PERIPH1_BASE + 0xff000) /* -0xfffff: Micro Direct Memory Access */
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/* Peripheral region 2 */
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/* -0x2ffff: Reserved */
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# define TIVA_CCM_BASE (TIVA_PERIPH2_BASE + 0x30000) /* -0x30fff: CRC/Cryptographic Control */
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/* -0x33fff: Reserved */
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@ -45,6 +45,7 @@
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Alternate Pin Functions. All members of the TM4C family share the same pin
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* multiplexing (although they may differ in the pins physically available).
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*
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@ -3041,8 +3042,8 @@
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* Public Data
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************************************************************************************/
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/****************************************************************************
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/************************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TM4C_TM4C_PINMAP_H */
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