Add support for testing multiple ADC, PWM, and QE devices
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4993 42af7a65-404d-4744-a932-0658087f49c3
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@ -124,7 +124,7 @@
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/* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */
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/* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */
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# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM3_QE) || \
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# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM3_QE) || \
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# defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM32_TIM8_QE)
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defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM32_TIM8_QE)
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# define HAVE_16BIT_TIMERS 1
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# define HAVE_16BIT_TIMERS 1
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# endif
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# endif
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@ -734,8 +734,10 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
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uint16_t ccmr1;
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uint16_t ccmr1;
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uint16_t ccer;
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uint16_t ccer;
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uint16_t cr1;
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uint16_t cr1;
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#ifdef HAVE_16BIT_TIMERS
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uint16_t regval;
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uint16_t regval;
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int ret;
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int ret;
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#endif
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/* NOTE: Clocking should have been enabled in the low-level RCC logic at boot-up */
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/* NOTE: Clocking should have been enabled in the low-level RCC logic at boot-up */
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