arch/arm/src/max326xx/max32660/max32660_serial.c: Using wrong register to check interrupt status. Still problems; I think we are not getting FIFO interrupts.
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7fd62cb239
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@ -506,7 +506,9 @@ static int max326_interrupt(int irq, void *context, FAR void *arg)
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{
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struct uart_dev_s *dev = (struct uart_dev_s *)arg;
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struct max326_dev_s *priv;
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uint32_t regval;
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uint32_t intfl;
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uint32_t inten;
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uint32_t stat;
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bool handled;
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int passes;
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@ -522,17 +524,29 @@ static int max326_interrupt(int irq, void *context, FAR void *arg)
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{
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handled = false;
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/* Read and clear FIFO interrupt status */
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regval = max326_serialin(priv, MAX326_UART_STAT_OFFSET);
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max326_serialout(priv, MAX326_UART_STAT_OFFSET,
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regval & UART_INT_ALL);
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/* Handle incoming, receive bytes.
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* Check if the received FIFO is not empty.
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/* Read pending interrupt flags, interrupt enables, and UART status
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* registers.
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*/
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if ((regval & UART_INT_RX) != 0)
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intfl = max326_serialin(priv, MAX326_UART_INTFL_OFFSET);
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inten = max326_serialin(priv, MAX326_UART_INTEN_OFFSET);
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stat = max326_serialin(priv, MAX326_UART_STAT_OFFSET);
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/* Clear pending interrupt flags */
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max326_serialout(priv, MAX326_UART_STAT_OFFSET,
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intfl & UART_INT_ALL);
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/* Handle incoming, receive bytes.
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* Check if the Rx FIFO level interrupt is enabled and the Rx FIFO is
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* not empty.
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*/
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#if 0
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if ((intfl & UART_INT_RX) != 0) /* Should work too */
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#else
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if ((inten & UART_INT_RX) != 0 && (stat & UART_STAT_RXEMPTY) == 0)
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#endif
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{
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/* Process incoming bytes */
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@ -541,10 +555,11 @@ static int max326_interrupt(int irq, void *context, FAR void *arg)
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}
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/* Handle outgoing, transmit bytes.
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* Check if the received FIFO is not full.
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* Check if the Tx FIFO level interrupt is enabled and the Tx FIFO is
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* not full.
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*/
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if ((regval & UART_INT_TX) != 0)
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if ((inten & UART_INT_TX) != 0 && (stat & UART_STAT_TXFULL) == 0)
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{
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/* Process outgoing bytes */
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@ -555,11 +570,12 @@ static int max326_interrupt(int irq, void *context, FAR void *arg)
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#ifdef CONFIG_DEBUG_FEATURES
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/* Check for RX error conditions */
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if ((regval & UART_INT_RXERRORS) != 0)
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if ((intfl & UART_INT_RXERRORS) != 0)
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{
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/* And now do... what? Should we reset FIFOs on a FIFO error? */
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#warning Misssing logic
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handled = true;
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}
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#endif
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}
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