sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

This commit implements RS485 RX/TX switching and RTS/CTS flow control for the IMXRT family. It has been tested on 1020 but I don't see any reason for issues on any other family member.

Browse Source
This commit is contained in:
Dave Marples 2019-05-30 13:44:08 -06:00 committed by Gregory Nutt
parent 64feadfc21
commit 173897afb9
6 changed files with 430 additions and 101 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

40
arch/arm/src/imxrt/imxrt_lowputc.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/imxrt/imxrt_lowputc.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved.
* Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
@ -118,7 +118,8 @@
#endif
/* Clocking *****************************************************************/
/* the UART module receives two clocks, a peripheral_clock (ipg_clk) and the
/* The UART module receives two clocks, a peripheral_clock (ipg_clk) and the
* module_clock (ipg_perclk). The peripheral_clock is used as write clock
* of the TxFIFO, read clock of the RxFIFO and synchronization of the modem
* control input pins. It must always be running when UART is enabled.
@ -458,12 +459,12 @@ int imxrt_lpuart_configure(uint32_t base,
if (baud_diff > ((config->baud / 100) * 3))
{
/* Unacceptable baud rate difference of more than 3%*/
/* Unacceptable baud rate difference of more than 3% */
return ERROR;
}
/* Enable lpuart clock*/
/* Enable lpuart clock */
imxrt_lpuart_clock_enable(base);
@ -471,10 +472,10 @@ int imxrt_lpuart_configure(uint32_t base,
regval = getreg32(base + IMXRT_LPUART_GLOBAL_OFFSET);
regval |= LPUART_GLOBAL_RST;
putreg32(regval,base + IMXRT_LPUART_GLOBAL_OFFSET);
putreg32(regval, base + IMXRT_LPUART_GLOBAL_OFFSET);
regval &= ~LPUART_GLOBAL_RST;
putreg32(regval,base + IMXRT_LPUART_GLOBAL_OFFSET);
putreg32(regval, base + IMXRT_LPUART_GLOBAL_OFFSET);
regval = 0;
@ -524,20 +525,21 @@ int imxrt_lpuart_configure(uint32_t base,
}
#endif /* HAVE_LPUART_DEVICE */
/************************************************************************************
/****************************************************************************
* Name: imxrt_lowputc
*
* Description:
* Output a byte with as few system dependencies as possible. This will even work
* BEFORE the console is initialized if we are booting from U-Boot (and the same
* UART is used for the console, of course.)
* Output a byte with as few system dependencies as possible. This will
* even work BEFORE the console is initialized if we are booting from U-
* Boot (and the same UART is used for the console, of course.)
*
************************************************************************************/
****************************************************************************/
#if defined(HAVE_LPUART_DEVICE) && defined(CONFIG_DEBUG_FEATURES)
void imxrt_lowputc(int ch)
{
while ((getreg32(IMXRT_CONSOLE_BASE + IMXRT_LPUART_STAT_OFFSET) & LPUART_STAT_TDRE) == 0)
while ((getreg32(IMXRT_CONSOLE_BASE + IMXRT_LPUART_STAT_OFFSET) &
LPUART_STAT_TDRE) == 0)
{
}
@ -549,11 +551,12 @@ void imxrt_lowputc(int ch)
putreg32((uint32_t)'\r', IMXRT_CONSOLE_BASE + IMXRT_LPUART_DATA_OFFSET);
/* Wait for the transmit register to be emptied. When the TXFE bit is non-zero,
* the TX Buffer FIFO is empty.
/* Wait for the transmit register to be emptied. When the TXFE bit is
* non-zero, the TX Buffer FIFO is empty.
*/
while ((getreg32(IMXRT_CONSOLE_BASE + IMXRT_LPUART_STAT_OFFSET) & LPUART_STAT_TDRE) == 0)
while ((getreg32(IMXRT_CONSOLE_BASE + IMXRT_LPUART_STAT_OFFSET) &
LPUART_STAT_TDRE) == 0)
{
}
}
@ -562,11 +565,12 @@ void imxrt_lowputc(int ch)
putreg32((uint32_t)ch, IMXRT_CONSOLE_BASE + IMXRT_LPUART_DATA_OFFSET);
/* Wait for the transmit register to be emptied. When the TXFE bit is non-zero,
* the TX Buffer FIFO is empty.
/* Wait for the transmit register to be emptied. When the TXFE bit is
* non-zero, the TX Buffer FIFO is empty.
*/
while ((getreg32(IMXRT_CONSOLE_BASE + IMXRT_LPUART_STAT_OFFSET) & LPUART_STAT_TDRE) == 0)
while ((getreg32(IMXRT_CONSOLE_BASE + IMXRT_LPUART_STAT_OFFSET) &
LPUART_STAT_TDRE) == 0)
{
}
}

23
arch/arm/src/imxrt/imxrt_lowputc.h
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/imxrt/imxrt_lowputc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved.
* Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
@ -64,6 +64,10 @@ struct uart_config_s
uint8_t parity; /* 0=none, 1=odd, 2=even */
uint8_t bits; /* Number of bits (5-9) */
bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
bool userts; /* True: Assert RTS when there are data to be sent */
bool invrts; /* True: Invert sense of RTS pin (true=active high) */
bool usects; /* True: Condition transmission on CTS asserted */
bool users485; /* True: Assert RTS while transmission progresses */
};
#endif
@ -84,27 +88,28 @@ struct uart_config_s
void imxrt_lowsetup(void);
/************************************************************************************
/****************************************************************************
* Name: imxrt_lpuart_configure
*
* Description:
* Configure a UART for non-interrupt driven operation
*
************************************************************************************/
****************************************************************************/
#ifdef HAVE_LPUART_DEVICE
int imxrt_lpuart_configure(uint32_t base, FAR const struct uart_config_s *config);
int imxrt_lpuart_configure(uint32_t base,
FAR const struct uart_config_s *config);
#endif
/************************************************************************************
/****************************************************************************
* Name: imxrt_lowputc
*
* Description:
* Output a byte with as few system dependencies as possible. This will even work
* BEFORE the console is initialized if we are booting from U-Boot (and the same
* UART is used for the console, of course.)
* Output a byte with as few system dependencies as possible. This will
* even work BEFORE the console is initialized if we are booting from U-
* Boot (and the same UART is used for the console, of course.)
*
************************************************************************************/
****************************************************************************/
#if defined(HAVE_LPUART_DEVICE) && defined(CONFIG_DEBUG_FEATURES)
void imxrt_lowputc(int ch);

128
arch/arm/src/imxrt/imxrt_serial.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/imxrt/imxrt_serial.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved.
* Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
@ -315,18 +315,6 @@
# define PM_IDLE_DOMAIN 0 /* Revisit */
#endif
#ifdef CONFIG_SERIAL_IFLOWCONTROL
# define IFLOW 1
#else
# define IFLOW 0
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
# define OFLOW 1
#else
# define OFLOW 0
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -339,7 +327,8 @@ struct imxrt_uart_s
uint8_t irq; /* IRQ associated with this UART */
uint8_t parity; /* 0=none, 1=odd, 2=even */
uint8_t bits; /* Number of bits (7 or 8) */
#ifdef CONFIG_SERIAL_IFLOWCONTROL
#if defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL)
uint8_t inviflow:1; /* Invert RTS sense */
const uint32_t rts_gpio; /* U[S]ART RTS GPIO pin configuration */
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
@ -353,7 +342,9 @@ struct imxrt_uart_s
#ifdef CONFIG_SERIAL_OFLOWCONTROL
uint8_t oflow:1; /* output flow control (CTS) enabled */
#endif
uint8_t reserved:(7 - IFLOW + OFLOW);
#ifdef CONFIG_SERIAL_RS485CONTROL
uint8_t rs485mode:1; /* We are in RS485 (RTS on TX) mode */
#endif
};
/****************************************************************************
@ -474,8 +465,20 @@ static struct imxrt_uart_s g_uart1priv =
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART1_IFLOWCONTROL)
.iflow = 1,
#endif
# if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART1_RS485RTSCONTROL)) \
|| (defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART1_IFLOWCONTROL)))
.rts_gpio = GPIO_LPUART1_RTS,
#endif
#if (((defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL))) \
&& defined(CONFIG_LPUART1_INVERTIFLOWCONTROL))
.inviflow = 1,
#endif
#if defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART1_RS485RTSCONTROL)
.rs485mode = 1,
#endif
};
static struct uart_dev_s g_uart1port =
@ -512,8 +515,19 @@ static struct imxrt_uart_s g_uart2priv =
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART2_IFLOWCONTROL)
.iflow = 1,
#endif
# if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART2_RS485RTSCONTROL)) \
|| (defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART2_IFLOWCONTROL)))
.rts_gpio = GPIO_LPUART2_RTS,
#endif
#if (((defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL))) \
&& defined(CONFIG_LPUART2_INVERTIFLOWCONTROL))
.inviflow = 1,
#endif
#if defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART2_RS485RTSCONTROL)
.rs485mode = 1,
#endif
};
static struct uart_dev_s g_uart2port =
@ -548,8 +562,19 @@ static struct imxrt_uart_s g_uart3priv =
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART3_IFLOWCONTROL)
.iflow = 1,
#endif
# if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART3_RS485RTSCONTROL)) \
|| (defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART3_IFLOWCONTROL)))
.rts_gpio = GPIO_LPUART3_RTS,
#endif
#if (((defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL))) \
&& defined(CONFIG_LPUART3_INVERTIFLOWCONTROL))
.inviflow = 1,
#endif
#if defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART3_RS485RTSCONTROL)
.rs485mode = 1,
#endif
};
static struct uart_dev_s g_uart3port =
@ -584,8 +609,19 @@ static struct imxrt_uart_s g_uart4priv =
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART4_IFLOWCONTROL)
.iflow = 1,
#endif
# if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART4_RS485RTSCONTROL)) \
|| (defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART4_IFLOWCONTROL)))
.rts_gpio = GPIO_LPUART4_RTS,
#endif
#if (((defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL))) \
&& defined(CONFIG_LPUART4_INVERTIFLOWCONTROL))
.inviflow = 1,
#endif
#if defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART4_RS485RTSCONTROL)
.rs485mode = 1,
#endif
};
static struct uart_dev_s g_uart4port =
@ -620,8 +656,19 @@ static struct imxrt_uart_s g_uart5priv =
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART5_IFLOWCONTROL)
.iflow = 1,
#endif
# if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART5_RS485RTSCONTROL)) \
|| (defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART5_IFLOWCONTROL)))
.rts_gpio = GPIO_LPUART5_RTS,
#endif
#if (((defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL))) \
&& defined(CONFIG_LPUART5_INVERTIFLOWCONTROL))
.inviflow = 1,
#endif
#if defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART5_RS485RTSCONTROL)
.rs485mode = 1,
#endif
};
static struct uart_dev_s g_uart5port =
@ -656,8 +703,19 @@ static struct imxrt_uart_s g_uart6priv =
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART6_IFLOWCONTROL)
.iflow = 1,
#endif
# if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART6_RS485RTSCONTROL)) \
|| (defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART6_IFLOWCONTROL)))
.rts_gpio = GPIO_LPUART6_RTS,
#endif
#if (((defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL))) \
&& defined(CONFIG_LPUART6_INVERTIFLOWCONTROL))
.inviflow = 1,
#endif
#if defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART6_RS485RTSCONTROL)
.rs485mode = 1,
#endif
};
static struct uart_dev_s g_uart6port =
@ -692,8 +750,19 @@ static struct imxrt_uart_s g_uart7priv =
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART7_IFLOWCONTROL)
.iflow = 1,
#endif
# if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART7_RS485RTSCONTROL)) \
|| (defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART7_IFLOWCONTROL)))
.rts_gpio = GPIO_LPUART7_RTS,
#endif
#if (((defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL))) \
&& defined(CONFIG_LPUART7_INVERTIFLOWCONTROL))
.inviflow = 1,
#endif
#if defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART7_RS485RTSCONTROL)
.rs485mode = 1,
#endif
};
static struct uart_dev_s g_uart7port =
@ -728,8 +797,19 @@ static struct imxrt_uart_s g_uart8priv =
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART8_IFLOWCONTROL)
.iflow = 1,
#endif
# if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART8_RS485RTSCONTROL)) \
|| (defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART8_IFLOWCONTROL)))
.rts_gpio = GPIO_LPUART8_RTS,
#endif
#if (((defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL))) \
&& defined(CONFIG_LPUART8_INVERTIFLOWCONTROL))
.inviflow = 1,
#endif
#if defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART8_RS485RTSCONTROL)
.rs485mode = 1,
#endif
};
static struct uart_dev_s g_uart8port =
@ -842,7 +922,10 @@ static int imxrt_setup(struct uart_dev_s *dev)
{
struct imxrt_uart_s *priv = (struct imxrt_uart_s *)dev->priv;
#ifndef CONFIG_SUPPRESS_LPUART_CONFIG
struct uart_config_s config;
struct uart_config_s config =
{
0
};
int ret;
/* Configure the UART */
@ -851,6 +934,18 @@ static int imxrt_setup(struct uart_dev_s *dev)
config.parity = priv->parity; /* 0=none, 1=odd, 2=even */
config.bits = priv->bits; /* Number of bits (5-9) */
config.stopbits2 = priv->stopbits2; /* true: Configure with 2 stop bits instead of 1 */
#ifdef CONFIG_SERIAL_IFLOWCONTROL
config.usects = priv->iflow; /* Flow control on inbound side */
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
config.userts = priv->oflow; /* Flow control on outbound side */
#endif
#ifdef CONFIG_SERIAL_RS485CONTROL
config.users485 = priv->rs485mode; /* Switch into RS485 mode */
#endif
#if defined(CONFIG_SERIAL_RS485CONTROL) || defined(CONFIG_SERIAL_IFLOWCONTROL)
config.invrts = priv->inviflow; /* Inversion of outbound flow control */
#endif
ret = imxrt_lpuart_configure(priv->uartbase, &config);
@ -1436,6 +1531,7 @@ static void up_pm_notify(struct pm_callback_s *cb, int domain,
default:
/* Should not get here */
break;
}
}

4
configs/sabre-6quad/README.txt
View File

@ -163,10 +163,10 @@ Status
configuration, you will see a crash due to memory corruption consistently,
specially in the nested signal test (apps/examples/ostest/signest.c).
2018-06-20: There is a problem with the Interrupt Stack for SMP in
2018-06-20: There was a problem with the Interrupt Stack for SMP in
arch/arm/src/armv7-a/arm_vectors.S: There is only one interrupt stack for
all CPUs! A fix for this was put in place on 2018-06-21. Big Improvement!
Bit this does not completely eliminate instabilities which seem to be
But this does not completely eliminate instabilities which seem to be
related to memory corruption -- mm_mallinfo() asserts.
Platform Features

6
drivers/serial/Kconfig
View File

@ -81,6 +81,12 @@ config SERIAL_IFLOWCONTROL
bool
default n
config SERIAL_RS485CONTROL
bool
default n
---help---
Use RTS pin to control RS485 direction (Asserted while transmitting).
config SERIAL_OFLOWCONTROL
bool
default n

330
drivers/serial/Kconfig-lpuart
View File

@ -53,6 +53,8 @@ config LPUART8_SERIALDRIVER
default n
select MCU_SERIAL
#####################################################################################
menu "LPUART0 Configuration"
depends on LPUART0_SERIALDRIVER
@ -84,40 +86,64 @@ config LPUART0_BITS
config LPUART0_PARITY
int "Parity setting"
range 0 2
default 0
range 0 2
---help---
0=no parity, 1=odd parity, 2=even parity
config LPUART0_2STOP
int "use 2 stop bits"
int "Uses 2 stop bits"
default 0
---help---
1=Two stop bits
choice
prompt "IFLOW Control"
default LPUART0_NOIFLOWCONTROL
config LPUART0_NOIFLOWCONTROL
bool "No IFLOW control"
---help---
No IFLOW control
config LPUART0_RS485RTSCONTROL
bool "RTS for RS485 Direction"
select SERIAL_RS485CONTROL
---help---
Use RTS pin for RS485 direction switching
config LPUART0_IFLOWCONTROL
bool "LPUART0 RTS flow control"
default n
bool "RTS for IFLOW control"
select SERIAL_IFLOWCONTROL
---help---
Enable LPUART0 RTS flow control
Enable RTS flow control
endchoice
config LPUART0_INVERTIFLOWCONTROL
depends on LPUART0_RS485RTSCONTROL || LPUART0_IFLOWCONTROL
bool "Invert sense of RTS bit"
default n
---help---
Make RTS bit active high rather than active low
config LPUART0_OFLOWCONTROL
bool "LPUART0 CTS flow control"
depends on !LPUART0_RS485RTSCONTROL
bool "CTS OFLOW control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable LPUART0 CTS flow control
Enable CTS flow control
config LPUART0_DMA
bool "LPUART0 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on LPUART0
Enable DMA transfers
endmenu
#####################################################################################
menu "LPUART1 Configuration"
depends on LPUART1_SERIALDRIVER
@ -159,30 +185,56 @@ config LPUART1_2STOP
default 0
---help---
1=Two stop bits
choice
prompt "IFLOW Control"
default LPUART1_NOIFLOWCONTROL
config LPUART1_NOIFLOWCONTROL
bool "No IFLOW control"
---help---
No IFLOW control
config LPUART1_RS485RTSCONTROL
bool "RTS for RS485 Direction"
select SERIAL_RS485CONTROL
---help---
Use RTS pin for RS485 direction switching
config LPUART1_IFLOWCONTROL
bool "LPUART1 RTS flow control"
default n
bool "RTS for IFLOW control"
select SERIAL_IFLOWCONTROL
---help---
Enable LPUART1 RTS flow control
Enable RTS flow control
endchoice
config LPUART1_INVERTIFLOWCONTROL
depends on LPUART1_RS485RTSCONTROL || LPUART1_IFLOWCONTROL
bool "Invert sense of RTS bit"
default n
---help---
Make RTS bit active high rather than active low
config LPUART1_OFLOWCONTROL
bool "LPUART1 CTS flow control"
depends on !LPUART1_RS485RTSCONTROL
bool "CTS OFLOW control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable LPUART1 CTS flow control
Enable CTS flow control
config LPUART1_DMA
bool "LPUART1 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on LPUART1
Enable DMA transfers
endmenu
#####################################################################################
#####################################################################################
menu "LPUART2 Configuration"
depends on LPUART2_SERIALDRIVER
@ -224,30 +276,54 @@ config LPUART2_2STOP
default 0
---help---
1=Two stop bits
choice
prompt "IFLOW Control"
default LPUART2_NOIFLOWCONTROL
config LPUART2_NOIFLOWCONTROL
bool "No IFLOW control"
---help---
No IFLOW control
config LPUART2_RS485RTSCONTROL
bool "RTS for RS485 Direction"
select SERIAL_RS485CONTROL
---help---
Use RTS pin for RS485 direction switching
config LPUART2_IFLOWCONTROL
bool "LPUART2 RTS flow control"
default n
bool "RTS for IFLOW control"
select SERIAL_IFLOWCONTROL
---help---
Enable LPUART2 RTS flow control
Enable RTS flow control
endchoice
config LPUART2_INVERTIFLOWCONTROL
depends on LPUART2_RS485RTSCONTROL || LPUART2_IFLOWCONTROL
bool "Invert sense of RTS bit"
default n
---help---
Make RTS bit active high rather than active low
config LPUART2_OFLOWCONTROL
bool "LPUART2 CTS flow control"
depends on !LPUART2_RS485RTSCONTROL
bool "CTS OFLOW control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable LPUART2 CTS flow control
Enable CTS flow control
config LPUART2_DMA
bool "LPUART2 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on LPUART2
Enable DMA transfers
endmenu
#####################################################################################
menu "LPUART3 Configuration"
depends on LPUART3_SERIALDRIVER
@ -289,30 +365,54 @@ config LPUART3_2STOP
default 0
---help---
1=Two stop bits
choice
prompt "IFLOW Control"
default LPUART3_NOIFLOWCONTROL
config LPUART3_NOIFLOWCONTROL
bool "No IFLOW control"
---help---
No IFLOW control
config LPUART3_RS485RTSCONTROL
bool "RTS for RS485 Direction"
select SERIAL_RS485CONTROL
---help---
Use RTS pin for RS485 direction switching
config LPUART3_IFLOWCONTROL
bool "LPUART3 RTS flow control"
default n
bool "RTS for IFLOW control"
select SERIAL_IFLOWCONTROL
---help---
Enable LPUART3 RTS flow control
Enable RTS flow control
endchoice
config LPUART3_INVERTIFLOWCONTROL
depends on LPUART3_RS485RTSCONTROL || LPUART3_IFLOWCONTROL
bool "Invert sense of RTS bit"
default n
---help---
Make RTS bit active high rather than active low
config LPUART3_OFLOWCONTROL
bool "LPUART3 CTS flow control"
depends on !LPUART3_RS485RTSCONTROL
bool "CTS OFLOW control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable LPUART3 CTS flow control
Enable CTS flow control
config LPUART3_DMA
bool "LPUART3 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on LPUART3
Enable DMA transfers
endmenu
#####################################################################################
menu "LPUART4 Configuration"
depends on LPUART4_SERIALDRIVER
@ -354,30 +454,54 @@ config LPUART4_2STOP
default 0
---help---
1=Two stop bits
choice
prompt "IFLOW Control"
default LPUART4_NOIFLOWCONTROL
config LPUART4_NOIFLOWCONTROL
bool "No IFLOW control"
---help---
No IFLOW control
config LPUART4_RS485RTSCONTROL
bool "RTS for RS485 Direction"
select SERIAL_RS485CONTROL
---help---
Use RTS pin for RS485 direction switching
config LPUART4_IFLOWCONTROL
bool "LPUART4 RTS flow control"
default n
bool "RTS for IFLOW control"
select SERIAL_IFLOWCONTROL
---help---
Enable LPUART4 RTS flow control
Enable RTS flow control
endchoice
config LPUART4_INVERTIFLOWCONTROL
depends on LPUART4_RS485RTSCONTROL || LPUART4_IFLOWCONTROL
bool "Invert sense of RTS bit"
default n
---help---
Make RTS bit active high rather than active low
config LPUART4_OFLOWCONTROL
bool "LPUART4 CTS flow control"
depends on !LPUART4_RS485RTSCONTROL
bool "CTS OFLOW control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable LPUART4 CTS flow control
Enable CTS flow control
config LPUART4_DMA
bool "LPUART4 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on LPUART4
Enable DMA transfers
endmenu
#####################################################################################
menu "LPUART5 Configuration"
depends on LPUART5_SERIALDRIVER
@ -419,30 +543,54 @@ config LPUART5_2STOP
default 0
---help---
1=Two stop bits
choice
prompt "IFLOW Control"
default LPUART5_NOIFLOWCONTROL
config LPUART5_NOIFLOWCONTROL
bool "No IFLOW control"
---help---
No IFLOW control
config LPUART5_RS485RTSCONTROL
bool "RTS for RS485 Direction"
select SERIAL_RS485CONTROL
---help---
Use RTS pin for RS485 direction switching
config LPUART5_IFLOWCONTROL
bool "LPUART5 RTS flow control"
default n
bool "RTS for IFLOW control"
select SERIAL_IFLOWCONTROL
---help---
Enable LPUART5 RTS flow control
Enable RTS flow control
endchoice
config LPUART5_INVERTIFLOWCONTROL
depends on LPUART5_RS485RTSCONTROL || LPUART5_IFLOWCONTROL
bool "Invert sense of RTS bit"
default n
---help---
Make RTS bit active high rather than active low
config LPUART5_OFLOWCONTROL
bool "LPUART5 CTS flow control"
depends on !LPUART5_RS485RTSCONTROL
bool "CTS OFLOW control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable LPUART5 CTS flow control
Enable CTS flow control
config LPUART5_DMA
bool "LPUART5 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on LPUART5
Enable DMA transfers
endmenu
#####################################################################################
menu "LPUART6 Configuration"
depends on LPUART6_SERIALDRIVER
@ -484,30 +632,54 @@ config LPUART6_2STOP
default 0
---help---
1=Two stop bits
choice
prompt "IFLOW Control"
default LPUART6_NOIFLOWCONTROL
config LPUART6_NOIFLOWCONTROL
bool "No IFLOW control"
---help---
No IFLOW control
config LPUART6_RS485RTSCONTROL
bool "RTS for RS485 Direction"
select SERIAL_RS485CONTROL
---help---
Use RTS pin for RS485 direction switching
config LPUART6_IFLOWCONTROL
bool "LPUART6 RTS flow control"
default n
bool "RTS for IFLOW control"
select SERIAL_IFLOWCONTROL
---help---
Enable LPUART6 RTS flow control
Enable RTS flow control
endchoice
config LPUART6_INVERTIFLOWCONTROL
depends on LPUART6_RS485RTSCONTROL || LPUART6_IFLOWCONTROL
bool "Invert sense of RTS bit"
default n
---help---
Make RTS bit active high rather than active low
config LPUART6_OFLOWCONTROL
bool "LPUART6 CTS flow control"
depends on !LPUART6_RS485RTSCONTROL
bool "CTS OFLOW control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable LPUART6 CTS flow control
Enable CTS flow control
config LPUART6_DMA
bool "LPUART6 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on LPUART6
Enable DMA transfers
endmenu
#####################################################################################
menu "LPUART7 Configuration"
depends on LPUART7_SERIALDRIVER
@ -549,30 +721,54 @@ config LPUART7_2STOP
default 0
---help---
1=Two stop bits
choice
prompt "IFLOW Control"
default LPUART7_NOIFLOWCONTROL
config LPUART7_NOIFLOWCONTROL
bool "No IFLOW control"
---help---
No IFLOW control
config LPUART7_RS485RTSCONTROL
bool "RTS for RS485 Direction"
select SERIAL_RS485CONTROL
---help---
Use RTS pin for RS485 direction switching
config LPUART7_IFLOWCONTROL
bool "LPUART7 RTS flow control"
default n
bool "RTS for IFLOW control"
select SERIAL_IFLOWCONTROL
---help---
Enable LPUART7 RTS flow control
Enable RTS flow control
endchoice
config LPUART7_INVERTIFLOWCONTROL
depends on LPUART7_RS485RTSCONTROL || LPUART7_IFLOWCONTROL
bool "Invert sense of RTS bit"
default n
---help---
Make RTS bit active high rather than active low
config LPUART7_OFLOWCONTROL
bool "LPUART7 CTS flow control"
depends on !LPUART7_RS485RTSCONTROL
bool "CTS OFLOW control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable LPUART7 CTS flow control
Enable CTS flow control
config LPUART7_DMA
bool "LPUART7 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on LPUART7
Enable DMA transfers
endmenu
#####################################################################################
menu "LPUART8 Configuration"
depends on LPUART8_SERIALDRIVER
@ -614,26 +810,48 @@ config LPUART8_2STOP
default 0
---help---
1=Two stop bits
choice
prompt "IFLOW Control"
default LPUART8_NOIFLOWCONTROL
config LPUART8_NOIFLOWCONTROL
bool "No IFLOW control"
---help---
No IFLOW control
config LPUART8_RS485RTSCONTROL
bool "RTS for RS485 Direction"
select SERIAL_RS485CONTROL
---help---
Use RTS pin for RS485 direction switching
config LPUART8_IFLOWCONTROL
bool "LPUART8 RTS flow control"
default n
bool "RTS for IFLOW control"
select SERIAL_IFLOWCONTROL
---help---
Enable LPUART8 RTS flow control
Enable RTS flow control
endchoice
config LPUART8_INVERTIFLOWCONTROL
depends on LPUART8_RS485RTSCONTROL || LPUART8_IFLOWCONTROL
bool "Invert sense of RTS bit"
default n
---help---
Make RTS bit active high rather than active low
config LPUART8_OFLOWCONTROL
bool "LPUART8 CTS flow control"
depends on !LPUART8_RS485RTSCONTROL
bool "CTS OFLOW control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable LPUART8 CTS flow control
Enable CTS flow control
config LPUART8_DMA
bool "LPUART8 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on LPUART8
Enable DMA transfers
endmenu