Add GPIO header file and EFM32 Gecko Starter Kit LED support
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Gregory Nutt
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8eb85ce1f8
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arch/arm/src/efm32/efm32_gpio.h
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337
arch/arm/src/efm32/efm32_gpio.h
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/************************************************************************************
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* arch/arm/src/efm32/efm32_gpio.h
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_EFM32_EFM32_GPIO_H
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#define __ARCH_ARM_SRC_EFM32_EFM32_GPIO_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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#if !defined(CONFIG_EFM32_GPIOA_IRQ) && !defined(CONFIG_EFM32_GPIOB_IRQ) && \
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!defined(CONFIG_EFM32_GPIOC_IRQ) && !defined(CONFIG_EFM32_GPIOD_IRQ) && \
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!defined(CONFIG_EFM32_GPIOE_IRQ) && !defined(CONFIG_EFM32_GPIOF_IRQ)
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# undef CONFIG_EFM32_GPIO_IRQ
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#endif
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_GPIO
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#endif
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#define EFM32_NGPIO 5 /* (5) GPIOA-F */
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/* Bit-encoded input to efm32_configgpio() *******************************************/
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/* 16-bit Encoding:
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*
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* Input: MMMM OII. .PPP BBBB
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* Output: MMMM VDD. .PPP BBBB
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*/
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/* Port mode:
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*
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* MMMM O... .... ....
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*/
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#define GPIO_MODE_SHIFT (12) /* Bits 12-15: Port mode */
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#define GPIO_MODE_MASK (15 << GPIO_MODE_SHIFT)
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#define GPIO_MODE_DOUT (1 << 11) /* DOUT input mode modifier */
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/* Input modes */
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# define _GPIO_DISABLE (0 << GPIO_MODE_SHIFT)
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# define _GPIO_INPUT (1 << GPIO_MODE_SHIFT)
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# define _GPIO_INPUT_PULL (2 << GPIO_MODE_SHIFT)
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# define _GPIO_INPUT_PULL_FILTER (3 << GPIO_MODE_SHIFT)
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# define GPIO_PULLUP \
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(_GPIO_DISABLE | GPIO_MODE_DOUT)
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# define GPIO_INPUT \
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_GPIO_INPUT
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# define GPIO_INPUT_FILTER \
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(_GPIO_INPUT | GPIO_MODE_DOUT)
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# define GPIO_INPUT_PULLDOWN \
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_GPIO_INPUT_PULL
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# define GPIO_INPUT_PULLUP \
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(_GPIO_INPUT_PULL | GPIO_MODE_DOUT)
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# define GPIO_INPUT_PULLDOWN_FILTER \
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_GPIO_INPUT_PULL_FILTER
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# define GPIO_INPUT_PULLUP_FILTER \
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(_GPIO_INPUT_PULL_FILTER | GPIO_MODE_DOUT)
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/* Output modes */
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# define GPIO_OUTPUT_PUSHPULL \
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(4 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_PUSHPULL_DRIVE \
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(5 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDOR \
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(6 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDOR_PULLDOWN \
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(7 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDAND \
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(8 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDAND_FILTER \
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(9 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDAND_PULLUP \
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(10 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDAND_PULLUP_FILTER \
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(11 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDAND_DRIVE \
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(12 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDAND_DRIVE_FILTER \
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(13 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDAND_DRIVE_PULLUP \
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(14 << GPIO_MODE_SHIFT)
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# define GPIO_OUTPUT_WIREDAND_DRIVE_PULLUP_FILTER \
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(15 << GPIO_MODE_SHIFT)
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/* If the pin is an PIO output, then this identifies the initial output value:
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*
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* .... V... .... ....
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*/
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#define GPIO_OUTPUT_SET (1 << 11) /* Bit 11: Initial value of output */
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#define GPIO_OUTPUT_CLEAR (0)
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/* Output drive:
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*
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* .... .DD. .... ....
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*/
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#define GPIO_DRIVE_SHIFT (9) /* Bits 9-10: Output drive strength */
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#define GPIO_DRIVE_MASK (3 << GPIO_MODE_SHIFT)
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# define GPIO_DRIVE_STANDARD (0 << GPIO_MODE_SHIFT) /* 6 mA drive current */
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# define GPIO_DRIVE_LOWEST (1 << GPIO_MODE_SHIFT) /* 0.5 mA drive current */
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# define GPIO_DRIVE_HIGH (2 << GPIO_MODE_SHIFT) /* 20 mA drive current */
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# define GPIO_DRIVE_LOW (3 << GPIO_MODE_SHIFT) /* 2 mA drive current */
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/* Interrupt Mode (Input only):
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*
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* .... .II. .... ....
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*/
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#define GPIO_INT_SHIFT (9) /* Bits 9-10: Interrupt mode */
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#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT)
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# define GPIO_INT_RISING (1 << GPIO_INT_SHIFT)
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# define GPIO_INT_FALLING (2 << GPIO_INT_SHIFT)
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# define GPIO_INT_BOTH (3 << GPIO_INT_SHIFT)
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/* This identifies the PIO port:
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*
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* .... .... .PPP ....
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*/
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#define GPIO_PORT_SHIFT (4) /* Bit 4-7: Port number */
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#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
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# define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
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# define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
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# define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
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# define GPIO_PORTD (3 << GPIO_PORT_SHIFT)
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# define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
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# define GPIO_PORTF (5 << GPIO_PORT_SHIFT)
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/* This identifies the pin in the port:
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*
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* .... .... .... BBBB
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*/
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#define GPIO_PIN_SHIFT (0) /* Bits 0-3: Pin number: 0-15 */
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#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
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#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
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#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
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#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
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#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
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#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
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#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
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#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
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#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
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#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
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#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
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#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
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#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
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#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
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#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/* Must be big enough to hold the 16-bit encoding */
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typedef uint16_t gpio_pinset_t;
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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/************************************************************************************
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* Name: efm32_gpioirqinitialize
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*
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* Description:
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* Initialize logic to support a second level of interrupt decoding for PIO pins.
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*
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************************************************************************************/
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#ifdef CONFIG_EFM32_GPIO_IRQ
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void efm32_gpioirqinitialize(void);
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#else
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# define efm32_gpioirqinitialize()
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#endif
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/************************************************************************************
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* Name: efm32_configgpio
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*
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* Description:
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* Configure a PIO pin based on bit-encoded description of the pin.
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*
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************************************************************************************/
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int efm32_configgpio(gpio_pinset_t cfgset);
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/************************************************************************************
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* Name: efm32_gpiowrite
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*
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* Description:
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* Write one or zero to the selected PIO pin
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*
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************************************************************************************/
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void efm32_gpiowrite(gpio_pinset_t pinset, bool value);
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/************************************************************************************
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* Name: efm32_gpioread
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*
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* Description:
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* Read one or zero from the selected PIO pin
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*
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************************************************************************************/
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bool efm32_gpioread(gpio_pinset_t pinset);
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/************************************************************************************
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* Name: efm32_gpioirq
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*
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* Description:
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* Configure an interrupt for the specified PIO pin.
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*
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************************************************************************************/
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#ifdef CONFIG_EFM32_GPIO_IRQ
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void efm32_gpioirq(gpio_pinset_t pinset);
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#else
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# define efm32_gpioirq(pinset)
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#endif
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/************************************************************************************
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* Name: efm32_gpioirqenable
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*
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* Description:
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* Enable the interrupt for specified PIO IRQ
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*
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************************************************************************************/
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#ifdef CONFIG_EFM32_GPIO_IRQ
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void efm32_gpioirqenable(int irq);
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#else
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# define efm32_gpioirqenable(irq)
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#endif
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/************************************************************************************
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* Name: efm32_gpioirqdisable
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*
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* Description:
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* Disable the interrupt for specified PIO IRQ
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*
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************************************************************************************/
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#ifdef CONFIG_EFM32_GPIO_IRQ
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void efm32_gpioirqdisable(int irq);
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#else
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# define efm32_gpioirqdisable(irq)
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#endif
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/************************************************************************************
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* Function: efm32_dumpgpio
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*
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* Description:
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* Dump all PIO registers associated with the base address of the provided pinset.
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*
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************************************************************************************/
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#ifdef CONFIG_DEBUG_GPIO
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int efm32_dumpgpio(uint32_t pinset, const char *msg);
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#else
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# define efm32_dumpgpio(p,m)
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_EFM32_EFM32_GPIO_H */
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