boards/arm/s32k1xx/s32k118evb: More build fixes.
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@ -36,8 +36,9 @@
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# Common ARM source files
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HEAD_ASRC =
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CMN_ASRCS = up_allocateheap.c up_exit.c up_initialize.c up_interruptcontext.c
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CMN_ASRCS += up_lowputs.c up_mdelay.c up_modifyreg8.c up_modifyreg16.c
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CMN_ASRCS =
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CMN_CSRCS = up_allocateheap.c up_exit.c up_initialize.c up_interruptcontext.c
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CMN_CSRCS += up_lowputs.c up_mdelay.c up_modifyreg8.c up_modifyreg16.c
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CMN_CSRCS += up_modifyreg32.c up_puts.c up_releasestack.c up_stackframe.c
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CMN_CSRCS += up_task_start.c up_udelay.c up_usestack.c up_vfork.c
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@ -192,7 +192,6 @@ void __start(void)
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{
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const uint32_t *src;
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uint32_t *dest;
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uint32_t regval;
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/* Make sure that interrupts are disabled */
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@ -48,8 +48,8 @@ CONFIG_NUNGET_CHARS=0
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CONFIG_PREALLOC_TIMERS=0
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CONFIG_PREALLOC_WDOGS=4
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CONFIG_PTHREAD_STACK_DEFAULT=1536
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CONFIG_RAM_SIZE=16384
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CONFIG_RAM_START=0x20000000
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CONFIG_RAM_SIZE=23552
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CONFIG_RAM_START=0x1ffffc00
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_S32K1XX_LPUART0=y
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@ -34,7 +34,7 @@
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****************************************************************************/
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/* The S32K118 has 256KB of FLASH beginning at address 0x0000:0000 and
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* 25KB of SRAM beginning at address 0x1fff:fc00 (incl. 2Kb of FlexRAM)
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* 23KB of SRAM beginning at address 0x1fff:fc00 (plus 2Kb of FlexRAM)
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*
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* The on-chip RAM is split in two regions: SRAM_L and SRAM_U. The RAM is
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* implemented such that the SRAM_L and SRAM_U ranges form a contiguous
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@ -46,7 +46,7 @@
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MEMORY
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{
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flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K
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sram (rwx) : ORIGIN = 0x20000000, LENGTH = 23K
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sram (rwx) : ORIGIN = 0x1ffffc00, LENGTH = 23K
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}
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OUTPUT_ARCH(arm)
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@ -55,75 +55,83 @@ ENTRY(_stext)
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > flash
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.text :
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{
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > flash
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.init_section : {
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_sinit = ABSOLUTE(.);
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*(.init_array .init_array.*)
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_einit = ABSOLUTE(.);
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} > flash
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.init_section :
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{
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_sinit = ABSOLUTE(.);
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*(.init_array .init_array.*)
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_einit = ABSOLUTE(.);
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} > flash
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.ARM.extab : {
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*(.ARM.extab*)
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} >flash
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.ARM.extab :
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{
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*(.ARM.extab*)
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} >flash
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__exidx_start = ABSOLUTE(.);
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.ARM.exidx : {
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*(.ARM.exidx*)
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} >flash
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__exidx_end = ABSOLUTE(.);
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__exidx_start = ABSOLUTE(.);
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.ARM.exidx :
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{
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*(.ARM.exidx*)
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} >flash
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__exidx_end = ABSOLUTE(.);
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.data : {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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_edata = ABSOLUTE(.);
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} > sram AT > flash
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.data :
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{
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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_edata = ABSOLUTE(.);
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} > sram AT > flash
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_eronly = LOADADDR(.data);
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_eronly = LOADADDR(.data);
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.ramfunc ALIGN(4): {
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_sramfuncs = ABSOLUTE(.);
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*(.ramfunc .ramfunc.*)
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_eramfuncs = ABSOLUTE(.);
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} > sram AT > flash
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.ramfunc ALIGN(4):
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{
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_sramfuncs = ABSOLUTE(.);
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*(.ramfunc .ramfunc.*)
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_eramfuncs = ABSOLUTE(.);
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} > sram AT > flash
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_framfuncs = LOADADDR(.ramfunc);
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_framfuncs = LOADADDR(.ramfunc);
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.bss : {
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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_ebss = ABSOLUTE(.);
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} > sram
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.bss :
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{
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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_ebss = ABSOLUTE(.);
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} > sram
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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@ -49,7 +49,7 @@
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#include "chip.h"
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#include "up_arch.h"
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#include "up_internal.h"
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#include "stm32.h"
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#include "s32k118evb.h"
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#ifdef CONFIG_ARCH_LEDS
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@ -39,6 +39,7 @@
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <sys/mount.h>
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#include <syslog.h>
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