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Add framework for lower half STM32 PWM driver; updates to the STM32 ADC driver

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4192 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-12-16 19:29:41 +00:00
parent 03d2638916
commit 18a285adb5
2 changed files with 74 additions and 1 deletions
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33
configs/stm3210e-eval/README.txt
View File

@ -481,6 +481,39 @@ STM3210E-EVAL-specific Configuration Options
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion.
CONFIG_STM32_TIM1_PWM
CONFIG_STM32_TIM2_PWM
CONFIG_STM32_TIM3_PWM
CONFIG_STM32_TIM4_PWM
CONFIG_STM32_TIM5_PWM
CONFIG_STM32_TIM6_PWM
CONFIG_STM32_TIM7_PWM
CONFIG_STM32_TIM8_PWM
CONFIG_STM32_TIM1_ADC
CONFIG_STM32_TIM2_ADC
CONFIG_STM32_TIM3_ADC
CONFIG_STM32_TIM4_ADC
CONFIG_STM32_TIM5_ADC
CONFIG_STM32_TIM6_ADC
CONFIG_STM32_TIM7_ADC
CONFIG_STM32_TIM8_ADC
CONFIG_STM32_TIM1_DAC
CONFIG_STM32_TIM2_DAC
CONFIG_STM32_TIM3_DAC
CONFIG_STM32_TIM4_DAC
CONFIG_STM32_TIM5_DAC
CONFIG_STM32_TIM6_DAC
CONFIG_STM32_TIM7_DAC
CONFIG_STM32_TIM8_DAC
Alternate pin mappings (should not be used with the STM3210E-EVAL board):
CONFIG_STM32_TIM1_FULL_REMAP

40
configs/stm3240g-eval/README.txt
View File

@ -360,7 +360,47 @@ STM3240G-EVAL-specific Configuration Options
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion.
CONFIG_STM32_TIM1_PWM
CONFIG_STM32_TIM2_PWM
CONFIG_STM32_TIM3_PWM
CONFIG_STM32_TIM4_PWM
CONFIG_STM32_TIM5_PWM
CONFIG_STM32_TIM6_PWM
CONFIG_STM32_TIM7_PWM
CONFIG_STM32_TIM8_PWM
CONFIG_STM32_TIM9_PWM
CONFIG_STM32_TIM10_PWM
CONFIG_STM32_TIM11_PWM
CONFIG_STM32_TIM12_PWM
CONFIG_STM32_TIM13_PWM
CONFIG_STM32_TIM14_PWM
CONFIG_STM32_TIM1_ADC
CONFIG_STM32_TIM2_ADC
CONFIG_STM32_TIM3_ADC
CONFIG_STM32_TIM4_ADC
CONFIG_STM32_TIM5_ADC
CONFIG_STM32_TIM6_ADC
CONFIG_STM32_TIM7_ADC
CONFIG_STM32_TIM8_ADC
CONFIG_STM32_TIM1_DAC
CONFIG_STM32_TIM2_DAC
CONFIG_STM32_TIM3_DAC
CONFIG_STM32_TIM4_DAC
CONFIG_STM32_TIM5_DAC
CONFIG_STM32_TIM6_DAC
CONFIG_STM32_TIM7_DAC
CONFIG_STM32_TIM8_DAC
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.