4.5.15 up_addrenv_kstackalloc():
Allocate the process kernel stack.
@@ -3699,7 +3699,7 @@ void lpwork_restorepriority(uint8_t reqprio);
-According to Wikipedia: "Symmetric multiprocessing (SMP) involves a symmetric multiprocessor system hardware and software architecture where two or more identical processors connect to a single, shared main memory, have full access to all I/O devices, and are controlled by a single operating system instance that treats all processors equally, reserving none for special purposes. Most multiprocessor systems today use an SMP architecture. In the case of multi-core processors, the SMP architecture applies to the cores, treating them as separate processors.
+According to Wikipedia: "Symmetric multiprocessing (SMP) involves a symmetric multiprocessor system hardware and software architecture where two or more identical processors connect to a single, shared main memory, have full access to all I/O devices, and are controlled by a single operating system instance that treats all processors equally, reserving none for special purposes. Most multiprocessor systems today use an SMP architecture. In the case of multi-core processors, the SMP architecture applies to the cores, treating them as separate processors.
"SMP systems are tightly coupled multiprocessor systems with a pool of homogeneous processors running independently, each processor executing different programs and working on different data and with capability of sharing common resources (memory, I/O device, interrupt system and so on) and connected using a system bus or a crossbar."
@@ -3735,7 +3735,7 @@ spinlock_t up_testset(volatile FAR spinlock_t *lock);
Returned Value:
- The spinlock is always locked upon return.
+ The spinlock is always locked upon return.
The value of previous value of the spinlock variable is returned, either SP_LOCKED if the spinlock was previously locked (meaning that the test-and-set operation failed to obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked (meaning that we successfully obtained the lock)
diff --git a/TODO b/TODO
index 090e12c2ac..23d360bcf7 100644
--- a/TODO
+++ b/TODO
@@ -1239,7 +1239,6 @@ o Network (net/, drivers/net)
be supported in order to support ping6 on a 6LoWPAN network.
If RFC 6775 were implemented, then arbitrary IPv6 addresses,
including addresses from DHCPv6 could be used.
- can
UPDATE: With IPv6 neighbor discovery, any IPv6 address may
be associated with any short or extended address. In fact,
diff --git a/arch/arm/include/stm32l4/chip.h b/arch/arm/include/stm32l4/chip.h
index 99f13d2baa..585d8605e5 100644
--- a/arch/arm/include/stm32l4/chip.h
+++ b/arch/arm/include/stm32l4/chip.h
@@ -55,7 +55,7 @@
* - L486 has AES
* - L496, L4A6 has 320 Kib SRAM, 2xCAN and CameraIF. Most (all?) of these have I2C4.
* - L4A6 has AES and HASH
- *
+ *
* ----------- ---------------- ----- ------ ------ ---- ---- -----
* PART PACKAGE GPIOs LCD Tamper FSMC CapS AdcCh
* ----------- ---------------- ----- ------ ------ ---- ---- -----
diff --git a/arch/arm/src/armv7-a/gtm.h b/arch/arm/src/armv7-a/gtm.h
index 054d37f178..347085f673 100644
--- a/arch/arm/src/armv7-a/gtm.h
+++ b/arch/arm/src/armv7-a/gtm.h
@@ -112,7 +112,7 @@ extern "C"
#endif
/****************************************************************************
- * Name:
+ * Name:
*
* Description:
*
diff --git a/arch/arm/src/armv7-m/arch_clean_dcache.c b/arch/arm/src/armv7-m/arch_clean_dcache.c
index 735623b4cd..0c2828d2b5 100644
--- a/arch/arm/src/armv7-m/arch_clean_dcache.c
+++ b/arch/arm/src/armv7-m/arch_clean_dcache.c
@@ -119,7 +119,7 @@ void arch_clean_dcache(uintptr_t start, uintptr_t end)
int32_t tmpways = ways;
/* Isolate the cache line associated with this address. For example
- * if the cache line size is 32 bytes and the cache size is 16KB, then
+ * if the cache line size is 32 bytes and the cache size is 16KB, then
*
* sshift = 5 : Offset to the beginning of the set field
* smask = 0x007f : Mask of the set field
diff --git a/arch/arm/src/armv7-m/arch_flush_dcache.c b/arch/arm/src/armv7-m/arch_flush_dcache.c
index c884eec041..28ab2a00a0 100644
--- a/arch/arm/src/armv7-m/arch_flush_dcache.c
+++ b/arch/arm/src/armv7-m/arch_flush_dcache.c
@@ -119,7 +119,7 @@ void arch_flush_dcache(uintptr_t start, uintptr_t end)
int32_t tmpways = ways;
/* Isolate the cache line associated with this address. For example
- * if the cache line size is 32 bytes and the cache size is 16KB, then
+ * if the cache line size is 32 bytes and the cache size is 16KB, then
*
* sshift = 5 : Offset to the beginning of the set field
* smask = 0x007f : Mask of the set field
diff --git a/arch/arm/src/armv7-m/arch_invalidate_dcache.c b/arch/arm/src/armv7-m/arch_invalidate_dcache.c
index 899252cde7..d6175f2d10 100644
--- a/arch/arm/src/armv7-m/arch_invalidate_dcache.c
+++ b/arch/arm/src/armv7-m/arch_invalidate_dcache.c
@@ -120,7 +120,7 @@ void arch_invalidate_dcache(uintptr_t start, uintptr_t end)
int32_t tmpways = ways;
/* Isolate the cache line associated with this address. For example
- * if the cache line size is 32 bytes and the cache size is 16KB, then
+ * if the cache line size is 32 bytes and the cache size is 16KB, then
*
* sshift = 5 : Offset to the beginning of the set field
* smask = 0x007f : Mask of the set field
diff --git a/arch/arm/src/armv7-m/dwt.h b/arch/arm/src/armv7-m/dwt.h
index 6cd66c9594..0d15a613c6 100644
--- a/arch/arm/src/armv7-m/dwt.h
+++ b/arch/arm/src/armv7-m/dwt.h
@@ -26,7 +26,7 @@
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
- *
+ *
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Author: Pierre-noel Bouteville
*
diff --git a/arch/arm/src/armv7-m/iar/up_fullcontextrestore.S b/arch/arm/src/armv7-m/iar/up_fullcontextrestore.S
index 9a50acb206..045c903a32 100644
--- a/arch/arm/src/armv7-m/iar/up_fullcontextrestore.S
+++ b/arch/arm/src/armv7-m/iar/up_fullcontextrestore.S
@@ -78,7 +78,7 @@
************************************************************************************/
THUMB
-
+
up_fullcontextrestore:
/* Perform the System call with R0=1 and R1=regs */
@@ -90,5 +90,5 @@ up_fullcontextrestore:
/* This call should not return */
bx lr /* Unnecessary ... will not return */
-
+
END
diff --git a/arch/arm/src/armv7-m/up_itm.c b/arch/arm/src/armv7-m/up_itm.c
index 695360a1e7..c3774ac6f5 100644
--- a/arch/arm/src/armv7-m/up_itm.c
+++ b/arch/arm/src/armv7-m/up_itm.c
@@ -111,7 +111,7 @@ uint32_t itm_sendchar(uint32_t ch)
/****************************************************************************
* Name: itm_receivechar
- *
+ *
* Description:
*
* Input Parameters:
@@ -122,7 +122,7 @@ uint32_t itm_sendchar(uint32_t ch)
*
****************************************************************************/
-int32_t itm_receivechar(void)
+int32_t itm_receivechar(void)
{
int32_t ch = -1; /* Assume no character available */
@@ -150,7 +150,7 @@ int32_t itm_receivechar(void)
*
****************************************************************************/
-int32_t itm_checkchar (void)
+int32_t itm_checkchar (void)
{
return (g_itm_rxbuffer != ITM_RXBUFFER_EMPTY);
}
diff --git a/arch/arm/src/common/up_createstack.c b/arch/arm/src/common/up_createstack.c
index 4503e15532..6643f94def 100644
--- a/arch/arm/src/common/up_createstack.c
+++ b/arch/arm/src/common/up_createstack.c
@@ -223,7 +223,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4;
/* The ARM stack must be aligned to 8-byte alignment for EABI.
- * If necessary top_of_stack must be rounded down to the next
+ * If necessary top_of_stack must be rounded down to the next
* boundary
*/
diff --git a/arch/arm/src/common/up_usestack.c b/arch/arm/src/common/up_usestack.c
index f8072a66d4..55c6a0526f 100644
--- a/arch/arm/src/common/up_usestack.c
+++ b/arch/arm/src/common/up_usestack.c
@@ -133,7 +133,7 @@ int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size)
top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4;
/* The ARM stack must be aligned to 8-byte alignment for EABI.
- * If necessary top_of_stack must be rounded down to the next
+ * If necessary top_of_stack must be rounded down to the next
* boundary
*/
diff --git a/arch/arm/src/efm32/Make.defs b/arch/arm/src/efm32/Make.defs
index 0b5ae3819f..e02561c77b 100644
--- a/arch/arm/src/efm32/Make.defs
+++ b/arch/arm/src/efm32/Make.defs
@@ -98,7 +98,7 @@ CHIP_CSRCS = efm32_start.c efm32_clockconfig.c efm32_irq.c efm32_timerisr.c
CHIP_CSRCS += efm32_gpio.c efm32_lowputc.c efm32_timer.c efm32_i2c.c
ifeq ($(CONFIG_EFM32_FLASHPROG),y)
-CHIP_CSRCS += efm32_flash.c
+CHIP_CSRCS += efm32_flash.c
endif
ifeq ($(CONFIG_EFM32_BITBAND),y)
diff --git a/arch/arm/src/efm32/chip/efm32_calibrate.h b/arch/arm/src/efm32/chip/efm32_calibrate.h
index 7fb84d1e31..508d0b56e9 100644
--- a/arch/arm/src/efm32/chip/efm32_calibrate.h
+++ b/arch/arm/src/efm32/chip/efm32_calibrate.h
@@ -88,6 +88,6 @@ struct efm32_calibrate_s
{
const uint32_t address; /* Address of calibration register */
const uint32_t value; /* Default value for calibration register */
-};
+};
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_CALIBRATE_H */
diff --git a/arch/arm/src/efm32/chip/efm32_devinfo.h b/arch/arm/src/efm32/chip/efm32_devinfo.h
index 501e34741c..024b5b2674 100644
--- a/arch/arm/src/efm32/chip/efm32_devinfo.h
+++ b/arch/arm/src/efm32/chip/efm32_devinfo.h
@@ -79,16 +79,16 @@
/* MSC Register Offsets ********************************************************************************************************/
-#define EFM32_DEVINFO_CAL_OFFSET 0x0000
-#define EFM32_DEVINFO_ADC0CALn_OFFSET(n) (0x0004+(n)*4)
-#define EFM32_DEVINFO_DAC0CALn_OFFSET(n) (0x0018+(n)*4)
-#define EFM32_DEVINFO_AUXHFRCOCALn_OFFSET(n) (0x0024+(n)*4)
-#define EFM32_DEVINFO_HFRCOCALn_OFFSET(n) (0x002c+(n)*4)
-#define EFM32_DEVINFO_MEMINFO_PAGE_SIZE_OFFSET 0x0034
-#define EFM32_DEVINFO_UNIQUEL_OFFSET 0x0040
-#define EFM32_DEVINFO_UNIQUEH_OFFSET 0x0044
-#define EFM32_DEVINFO_MEMINFO_SIZE_OFFSET 0x0048
-#define EFM32_DEVINFO_PART_OFFSET 0x004c
+#define EFM32_DEVINFO_CAL_OFFSET 0x0000
+#define EFM32_DEVINFO_ADC0CALn_OFFSET(n) (0x0004+(n)*4)
+#define EFM32_DEVINFO_DAC0CALn_OFFSET(n) (0x0018+(n)*4)
+#define EFM32_DEVINFO_AUXHFRCOCALn_OFFSET(n) (0x0024+(n)*4)
+#define EFM32_DEVINFO_HFRCOCALn_OFFSET(n) (0x002c+(n)*4)
+#define EFM32_DEVINFO_MEMINFO_PAGE_SIZE_OFFSET 0x0034
+#define EFM32_DEVINFO_UNIQUEL_OFFSET 0x0040
+#define EFM32_DEVINFO_UNIQUEH_OFFSET 0x0044
+#define EFM32_DEVINFO_MEMINFO_SIZE_OFFSET 0x0048
+#define EFM32_DEVINFO_PART_OFFSET 0x004c
/* MSC Register Addresses ******************************************************************************************************/
@@ -121,7 +121,7 @@
#define _DEVINFO_CAL_CRC_SHIFT 0 /* Integrity CRC checksum shift */
#define _DEVINFO_CAL_TEMP_MASK 0x00FF0000UL /* Calibration temperature, DegC, mask */
#define _DEVINFO_CAL_TEMP_SHIFT 16 /* Calibration temperature shift */
-
+
#define _DEVINFO_ADC0CAL0_1V25_GAIN_MASK 0x00007F00UL /* Gain for 1V25 reference, mask */
#define _DEVINFO_ADC0CAL0_1V25_GAIN_SHIFT 8 /* Gain for 1V25 reference, shift */
#define _DEVINFO_ADC0CAL0_1V25_OFFSET_MASK 0x0000007FUL /* Offset for 1V25 reference, mask */
@@ -130,7 +130,7 @@
#define _DEVINFO_ADC0CAL0_2V5_GAIN_SHIFT 24 /* Gain for 2V5 reference, shift */
#define _DEVINFO_ADC0CAL0_2V5_OFFSET_MASK 0x007F0000UL /* Offset for 2V5 reference, mask */
#define _DEVINFO_ADC0CAL0_2V5_OFFSET_SHIFT 16 /* Offset for 2V5 reference, shift */
-
+
#define _DEVINFO_ADC0CAL1_VDD_GAIN_MASK 0x00007F00UL /* Gain for VDD reference, mask */
#define _DEVINFO_ADC0CAL1_VDD_GAIN_SHIFT 8 /* Gain for VDD reference, shift */
#define _DEVINFO_ADC0CAL1_VDD_OFFSET_MASK 0x0000007FUL /* Offset for VDD reference, mask */
@@ -139,33 +139,33 @@
#define _DEVINFO_ADC0CAL1_5VDIFF_GAIN_SHIFT 24 /* Gain for 5VDIFF reference, mask */
#define _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_MASK 0x007F0000UL /* Offset for 5VDIFF reference, mask */
#define _DEVINFO_ADC0CAL1_5VDIFF_OFFSET_SHIFT 16 /* Offset for 5VDIFF reference, shift */
-
+
#define _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_MASK 0x0000007FUL /* Offset for 2XVDDVSS reference, mask */
#define _DEVINFO_ADC0CAL2_2XVDDVSS_OFFSET_SHIFT 0 /* Offset for 2XVDDVSS reference, shift */
#define _DEVINFO_ADC0CAL2_TEMP1V25_MASK 0xFFF00000UL /* Temperature reading at 1V25 reference, mask */
#define _DEVINFO_ADC0CAL2_TEMP1V25_SHIFT 20 /* Temperature reading at 1V25 reference, DegC */
-
+
#define _DEVINFO_DAC0CAL0_1V25_GAIN_MASK 0x007F0000UL /* Gain for 1V25 reference, mask */
#define _DEVINFO_DAC0CAL0_1V25_GAIN_SHIFT 16 /* Gain for 1V25 reference, shift */
#define _DEVINFO_DAC0CAL0_1V25_CH1_OFFSET_MASK 0x00003F00UL /* Channel 1 offset for 1V25 reference, mask */
#define _DEVINFO_DAC0CAL0_1V25_CH1_OFFSET_SHIFT 8 /* Channel 1 offset for 1V25 reference, shift */
#define _DEVINFO_DAC0CAL0_1V25_CH0_OFFSET_MASK 0x0000003FUL /* Channel 0 offset for 1V25 reference, mask */
#define _DEVINFO_DAC0CAL0_1V25_CH0_OFFSET_SHIFT 0 /* Channel 0 offset for 1V25 reference, shift */
-
+
#define _DEVINFO_DAC0CAL1_2V5_GAIN_MASK 0x007F0000UL /* Gain for 2V5 reference, mask */
#define _DEVINFO_DAC0CAL1_2V5_GAIN_SHIFT 16 /* Gain for 2V5 reference, shift */
#define _DEVINFO_DAC0CAL1_2V5_CH1_OFFSET_MASK 0x00003F00UL /* Channel 1 offset for 2V5 reference, mask */
#define _DEVINFO_DAC0CAL1_2V5_CH1_OFFSET_SHIFT 8 /* Channel 1 offset for 2V5 reference, shift */
#define _DEVINFO_DAC0CAL1_2V5_CH0_OFFSET_MASK 0x0000003FUL /* Channel 0 offset for 2V5 reference, mask */
#define _DEVINFO_DAC0CAL1_2V5_CH0_OFFSET_SHIFT 0 /* Channel 0 offset for 2V5 reference, shift */
-
+
#define _DEVINFO_DAC0CAL2_VDD_GAIN_MASK 0x007F0000UL /* Gain for VDD reference, mask */
#define _DEVINFO_DAC0CAL2_VDD_GAIN_SHIFT 16 /* Gain for VDD reference, shift */
#define _DEVINFO_DAC0CAL2_VDD_CH1_OFFSET_MASK 0x00003F00UL /* Channel 1 offset for VDD reference, mask */
#define _DEVINFO_DAC0CAL2_VDD_CH1_OFFSET_SHIFT 8 /* Channel 1 offset for VDD reference, shift */
#define _DEVINFO_DAC0CAL2_VDD_CH0_OFFSET_MASK 0x0000003FUL /* Channel 0 offset for VDD reference, mask */
#define _DEVINFO_DAC0CAL2_VDD_CH0_OFFSET_SHIFT 0 /* Channel 0 offset for VDD reference, shift*/
-
+
#define _DEVINFO_AUXHFRCOCAL0_BAND1_MASK 0x000000FFUL /* 1MHz tuning value for AUXHFRCO, mask */
#define _DEVINFO_AUXHFRCOCAL0_BAND1_SHIFT 0 /* 1MHz tuning value for AUXHFRCO, shift */
#define _DEVINFO_AUXHFRCOCAL0_BAND7_MASK 0x0000FF00UL /* 7MHz tuning value for AUXHFRCO, mask */
@@ -174,12 +174,12 @@
#define _DEVINFO_AUXHFRCOCAL0_BAND11_SHIFT 16 /* 11MHz tuning value for AUXHFRCO, shift */
#define _DEVINFO_AUXHFRCOCAL0_BAND14_MASK 0xFF000000UL /* 14MHz tuning value for AUXHFRCO, mask */
#define _DEVINFO_AUXHFRCOCAL0_BAND14_SHIFT 24 /* 14MHz tuning value for AUXHFRCO, shift */
-
+
#define _DEVINFO_AUXHFRCOCAL1_BAND21_MASK 0x000000FFUL /* 21MHz tuning value for AUXHFRCO, mask */
#define _DEVINFO_AUXHFRCOCAL1_BAND21_SHIFT 0 /* 21MHz tuning value for AUXHFRCO, shift */
#define _DEVINFO_AUXHFRCOCAL1_BAND28_MASK 0x0000FF00UL /* 28MHz tuning value for AUXHFRCO, shift */
#define _DEVINFO_AUXHFRCOCAL1_BAND28_SHIFT 8 /* 28MHz tuning value for AUXHFRCO, mask */
-
+
#define _DEVINFO_HFRCOCAL0_BAND1_MASK 0x000000FFUL /* 1MHz tuning value for HFRCO, mask */
#define _DEVINFO_HFRCOCAL0_BAND1_SHIFT 0 /* 1MHz tuning value for HFRCO, shift */
#define _DEVINFO_HFRCOCAL0_BAND7_MASK 0x0000FF00UL /* 7MHz tuning value for HFRCO, mask */
@@ -188,26 +188,26 @@
#define _DEVINFO_HFRCOCAL0_BAND11_SHIFT 16 /* 11MHz tuning value for HFRCO, shift */
#define _DEVINFO_HFRCOCAL0_BAND14_MASK 0xFF000000UL /* 14MHz tuning value for HFRCO, mask */
#define _DEVINFO_HFRCOCAL0_BAND14_SHIFT 24 /* 14MHz tuning value for HFRCO, shift */
-
+
#define _DEVINFO_HFRCOCAL1_BAND21_MASK 0x000000FFUL /* 21MHz tuning value for HFRCO, mask */
#define _DEVINFO_HFRCOCAL1_BAND21_SHIFT 0 /* 21MHz tuning value for HFRCO, shift */
#define _DEVINFO_HFRCOCAL1_BAND28_MASK 0x0000FF00UL /* 28MHz tuning value for HFRCO, shift */
#define _DEVINFO_HFRCOCAL1_BAND28_SHIFT 8 /* 28MHz tuning value for HFRCO, mask */
-
+
#define _DEVINFO_MEMINFO_FLASH_PAGE_SIZE_MASK 0xFF000000UL /* Flash page size (refer to ref.man for encoding) mask */
#define _DEVINFO_MEMINFO_FLASH_PAGE_SIZE_SHIFT 24 /* Flash page size shift */
-
+
#define _DEVINFO_UNIQUEL_MASK 0xFFFFFFFFUL /* Lower part of 64-bit device unique number */
#define _DEVINFO_UNIQUEL_SHIFT 0 /* Unique Low 32-bit shift */
-
+
#define _DEVINFO_UNIQUEH_MASK 0xFFFFFFFFUL /* High part of 64-bit device unique number */
#define _DEVINFO_UNIQUEH_SHIFT 0 /* Unique High 32-bit shift */
-
+
#define _DEVINFO_MEMINFO_SIZE_SRAM_MASK 0xFFFF0000UL /* Flash size in kilobytes */
#define _DEVINFO_MEMINFO_SIZE_SRAM_SHIFT 16 /* Bit position for flash size */
#define _DEVINFO_MEMINFO_SIZE_FLASH_MASK 0x0000FFFFUL /* SRAM size in kilobytes */
#define _DEVINFO_MEMINFO_SIZE_FLASH_SHIFT 0 /* Bit position for SRAM size */
-
+
#define _DEVINFO_PART_PROD_REV_MASK 0xFF000000UL /* Production revision */
#define _DEVINFO_PART_PROD_REV_SHIFT 24 /* Bit position for production revision */
#define _DEVINFO_PART_DEVICE_FAMILY_MASK 0x00FF0000UL /* Device Family, 0x47 for Gecko */
diff --git a/arch/arm/src/efm32/chip/efm32_flash.h b/arch/arm/src/efm32/chip/efm32_flash.h
index 5c9f153be0..48cd8ee9e0 100644
--- a/arch/arm/src/efm32/chip/efm32_flash.h
+++ b/arch/arm/src/efm32/chip/efm32_flash.h
@@ -52,6 +52,6 @@
# define EFM32_FLASH_PAGESIZE 512
#elif defined(CONFIG_EFM32_EFM32TG)
# define EFM32_FLASH_PAGESIZE 512
-#endif
+#endif
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_FLASH_H */
diff --git a/arch/arm/src/efm32/chip/efm32_gpio.h b/arch/arm/src/efm32/chip/efm32_gpio.h
index ba3b7ebc0b..f631de0409 100644
--- a/arch/arm/src/efm32/chip/efm32_gpio.h
+++ b/arch/arm/src/efm32/chip/efm32_gpio.h
@@ -284,7 +284,7 @@
#endif
/* GPIO Register Bit Field Definitions *****************************************************************************************/
-
+
/* Bit fields for GPIO P_CTRL */
#define _GPIO_P_CTRL_RESETVALUE 0x00000000UL /* Default value for GPIO_P_CTRL */
diff --git a/arch/arm/src/efm32/chip/efm32_romtable.h b/arch/arm/src/efm32/chip/efm32_romtable.h
index 209fbd7d8d..42ed83cbc8 100644
--- a/arch/arm/src/efm32/chip/efm32_romtable.h
+++ b/arch/arm/src/efm32/chip/efm32_romtable.h
@@ -109,6 +109,6 @@ struct efm32_romtable_s
const uint32_t pid2; /* Chip minor rev MSB, JEP_106_PRESENT, JEP_106_NO */
const uint32_t pid3; /* Chip minor rev LSB */
const uint32_t cid0; /* Unused */
-};
+};
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ROMTABLE_H */
diff --git a/arch/arm/src/efm32/efm32_leserial.c b/arch/arm/src/efm32/efm32_leserial.c
index de8d157c8a..2303f7ce72 100644
--- a/arch/arm/src/efm32/efm32_leserial.c
+++ b/arch/arm/src/efm32/efm32_leserial.c
@@ -152,7 +152,7 @@ struct efm32_leuart_s
****************************************************************************/
static inline uint32_t efm32_serialin(struct efm32_leuart_s *priv, int offset);
-static inline void efm32_serialout(struct efm32_leuart_s *priv, int offset,
+static inline void efm32_serialout(struct efm32_leuart_s *priv, int offset,
uint32_t value);
static inline void efm32_setuartint(struct efm32_leuart_s *priv);
diff --git a/arch/arm/src/efm32/efm32_pwm.c b/arch/arm/src/efm32/efm32_pwm.c
index 180fe04e00..b9c7bd0271 100644
--- a/arch/arm/src/efm32/efm32_pwm.c
+++ b/arch/arm/src/efm32/efm32_pwm.c
@@ -66,7 +66,7 @@
#if defined(CONFIG_EFM32_TIMER0_PWM) || \
defined(CONFIG_EFM32_TIMER1_PWM) || \
defined(CONFIG_EFM32_TIMER2_PWM) || \
- defined(CONFIG_EFM32_TIMER3_PWM)
+ defined(CONFIG_EFM32_TIMER3_PWM)
/****************************************************************************
* Pre-processor Definitions
diff --git a/arch/arm/src/efm32/efm32_pwm.h b/arch/arm/src/efm32/efm32_pwm.h
index 61e4f5f116..909137c9c0 100644
--- a/arch/arm/src/efm32/efm32_pwm.h
+++ b/arch/arm/src/efm32/efm32_pwm.h
@@ -36,9 +36,9 @@
#ifndef __ARCH_ARM_SRC_EFM32_EFM32_PWM_H
#define __ARCH_ARM_SRC_EFM32_EFM32_PWM_H
-/* The EFM32 does not have dedicated PWM hardware. Rather, pulsed output
- * control is a capability of the EFM32 timers. The logic in this file
- * implements the lower half of the standard, NuttX PWM interface using the
+/* The EFM32 does not have dedicated PWM hardware. Rather, pulsed output
+ * control is a capability of the EFM32 timers. The logic in this file
+ * implements the lower half of the standard, NuttX PWM interface using the
* EFM32 timers. That interface is described in include/nuttx/drivers/pwm.h.
*/
@@ -55,9 +55,9 @@
****************************************************************************/
/* Configuration **************************************************************/
/* Timer devices may be used for different purposes. One special purpose is
- * to generate modulated outputs for such things as motor control.
- * If CONFIG_EFM32_TIMERn is defined then the CONFIG_EFM32_TIMERn_PWM must also
- * be defined to indicate that timer "n" is intended to be used for pulsed
+ * to generate modulated outputs for such things as motor control.
+ * If CONFIG_EFM32_TIMERn is defined then the CONFIG_EFM32_TIMERn_PWM must also
+ * be defined to indicate that timer "n" is intended to be used for pulsed
* output signal generation.
*/
diff --git a/arch/arm/src/efm32/efm32_serial.c b/arch/arm/src/efm32/efm32_serial.c
index a13bfe4d58..133974d6f6 100644
--- a/arch/arm/src/efm32/efm32_serial.c
+++ b/arch/arm/src/efm32/efm32_serial.c
@@ -243,7 +243,7 @@ struct efm32_usart_s
****************************************************************************/
static inline uint32_t efm32_serialin(struct efm32_usart_s *priv, int offset);
-static inline void efm32_serialout(struct efm32_usart_s *priv, int offset,
+static inline void efm32_serialout(struct efm32_usart_s *priv, int offset,
uint32_t value);
static inline void efm32_setuartint(struct efm32_usart_s *priv);
@@ -897,7 +897,7 @@ static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_SERIAL_IFLOWCONTROL
priv->iflow = (termiosp->c_cflag & CRTS_IFLOW) != 0;
#endif
-#endif
+#endif
/* Note that only cfgetispeed is used because we have knowledge
* that only one speed is supported.
diff --git a/arch/arm/src/imx6/imx_ecspi.c b/arch/arm/src/imx6/imx_ecspi.c
index 2018c410bb..9b6b34ceff 100644
--- a/arch/arm/src/imx6/imx_ecspi.c
+++ b/arch/arm/src/imx6/imx_ecspi.c
@@ -136,7 +136,7 @@
****************************************************************************/
/* Per SPI callouts to board-specific logic */
-
+
typedef CODE void (*imx_select_t)(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected);
typedef CODE uint8_t (*imx_status_t)(FAR struct spi_dev_s *dev,
diff --git a/arch/arm/src/imx6/imx_iomuxc.h b/arch/arm/src/imx6/imx_iomuxc.h
index 2a28fdf1cf..dc7a7082d1 100644
--- a/arch/arm/src/imx6/imx_iomuxc.h
+++ b/arch/arm/src/imx6/imx_iomuxc.h
@@ -143,7 +143,7 @@ typedef uint16_t iomux_pinset_t;
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
-
+
/****************************************************************************
* Name: imx_padmux_map
*
diff --git a/arch/arm/src/imx6/imx_timerisr.c b/arch/arm/src/imx6/imx_timerisr.c
index 36cd8cced0..7d2cfba7e1 100644
--- a/arch/arm/src/imx6/imx_timerisr.c
+++ b/arch/arm/src/imx6/imx_timerisr.c
@@ -230,7 +230,7 @@ void arm_timer_initialize(void)
putreg32(GPT_OCR3_VALUE, IMX_GPT_OCR3);
putreg32(GPT_PR_VALUE - 1, IMX_GPT_PR);
-
+
/* Configure restart mode. Interrupts will be received on OC3, then OC2,
* then OC1 when the counter will be reset to zero and the whole sequence
* starts again.
diff --git a/arch/arm/src/kinetis/chip/kinetis_usbotg.h b/arch/arm/src/kinetis/chip/kinetis_usbotg.h
index 16cecc2261..490eae1ff7 100644
--- a/arch/arm/src/kinetis/chip/kinetis_usbotg.h
+++ b/arch/arm/src/kinetis/chip/kinetis_usbotg.h
@@ -153,11 +153,11 @@
#ifdef KINETIS_K64
# define KINETIS_USB_USBFRMADJUST \
- (KINETIS_USB0_BASE+KINETIS_USB_USBFRMADJUST_OFFSET)
+ (KINETIS_USB0_BASE+KINETIS_USB_USBFRMADJUST_OFFSET)
# define KINETIS_USB_USB0_CLK_RECOVER_CTRL \
- (KINETIS_USB0_BASE+KINETIS_USB_USB0_CLK_RECOVER_CTRL_OFFSET)
+ (KINETIS_USB0_BASE+KINETIS_USB_USB0_CLK_RECOVER_CTRL_OFFSET)
# define KINETIS_USB_USB0_CLK_RECOVER_IRC_EN \
- (KINETIS_USB0_BASE+KINETIS_USB_USB0_CLK_RECOVER_IRC_EN_OFFSET)
+ (KINETIS_USB0_BASE+KINETIS_USB_USB0_CLK_RECOVER_IRC_EN_OFFSET)
# define KINETIS_USB_USB0_CLK_RECOVER_INT_STATUS \
(KINETIS_USB0_BASE+KINETIS_USB_USB0_CLK_RECOVER_INT_STATUS_OFFSET)
#endif
diff --git a/arch/arm/src/kinetis/kinetis_enet.c b/arch/arm/src/kinetis/kinetis_enet.c
index 1a13ab856a..76e12a9b05 100644
--- a/arch/arm/src/kinetis/kinetis_enet.c
+++ b/arch/arm/src/kinetis/kinetis_enet.c
@@ -170,7 +170,7 @@
#define BOARD_PHY_100BASET(s) (((s) & (2 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
#define BOARD_PHY_ISDUPLEX(s) (((s) & (4 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
-/* Estimate the MII_SPEED in order to get an MDC close to 2.5MHz,
+/* Estimate the MII_SPEED in order to get an MDC close to 2.5MHz,
based on the internal module (ENET) clock:
*
* MII_SPEED = ENET_FREQ/5000000 -1
@@ -1761,7 +1761,7 @@ static inline int kinetis_initphy(struct kinetis_driver_s *priv)
usleep(LINK_WAITUS);
}
- if (phydata & MII_MSR_ANEGCOMPLETE)
+ if (phydata & MII_MSR_ANEGCOMPLETE)
{
ninfo("%s: Autonegotiation complete\n", BOARD_PHY_NAME);
ninfo("%s: MII_MSR: %04x\n", BOARD_PHY_NAME, phydata);
@@ -1769,14 +1769,14 @@ static inline int kinetis_initphy(struct kinetis_driver_s *priv)
else
{
/* TODO: Autonegotitation has right now failed. Maybe the Eth cable is not connected.
- PHY chip have mechanisms to configure link OK. We should leave autconf on,
+ PHY chip have mechanisms to configure link OK. We should leave autconf on,
and find a way to re-configure MCU whenever the link is ready. */
ninfo("%s: Autonegotiation failed [%d] (is cable plugged-in ?), default to 10Mbs mode\n", \
BOARD_PHY_NAME, retries);
/* Stop auto negotiation */
-
+
kinetis_writemii(priv, phyaddr, MII_MCR, 0);
}
diff --git a/arch/arm/src/kinetis/kinetis_usbdev.c b/arch/arm/src/kinetis/kinetis_usbdev.c
index ace2400ae1..4d10d422fd 100644
--- a/arch/arm/src/kinetis/kinetis_usbdev.c
+++ b/arch/arm/src/kinetis/kinetis_usbdev.c
@@ -1651,7 +1651,7 @@ static int khci_rdsetup(struct khci_ep_s *privep, uint8_t *dest, int readlen)
/* Then give the BDT to the USB */
- bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+ bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
epno, bdtout, status, bdtout->addr);
bdtout->status = status;
diff --git a/arch/arm/src/lpc2378/chip.h b/arch/arm/src/lpc2378/chip.h
index 1f213eaeab..0902ae2cad 100644
--- a/arch/arm/src/lpc2378/chip.h
+++ b/arch/arm/src/lpc2378/chip.h
@@ -101,7 +101,7 @@
#define LPC23XX_EMAC_BASE 0xFFE00000 /* Ethernet MAC base address */
#define LPC23XX_USB_BASE 0xFFE0C200 /* USB base address */
#define LPC23XX_SCB_BASE 0xE01FC000 /* System Control Block (SBC) base address */
-#define LPC23XX_EXT_BASE 0xe01fc140 /* External Interrupt base address */
+#define LPC23XX_EXT_BASE 0xe01fc140 /* External Interrupt base address */
/* AHB Register block base addresses */
@@ -367,7 +367,7 @@
#define CAN1RID_OFFSET 0x24
#define CAN1RDA_OFFSET 0x28
#define CAN1RDB_OFFSET 0x2C
-
+
#define CAN1TFI1_OFFSET 0x30
#define CAN1TID1_OFFSET 0x34
#define CAN1TDA1_OFFSET 0x38
@@ -394,7 +394,7 @@
#define CAN2RID_OFFSET 0x24
#define CAN2RDA_OFFSET 0x28
#define CAN2RDB_OFFSET 0x2C
-
+
#define CAN2TFI1_OFFSET 0x30
#define CAN2TID1_OFFSET 0x34
#define CAN2TDA1_OFFSET 0x38
diff --git a/arch/arm/src/lpc43xx/spifi/changelog.txt b/arch/arm/src/lpc43xx/spifi/changelog.txt
index f96920a1f5..34e149edc1 100644
--- a/arch/arm/src/lpc43xx/spifi/changelog.txt
+++ b/arch/arm/src/lpc43xx/spifi/changelog.txt
@@ -24,7 +24,7 @@ renamed from lib_llpcspifi_Mx.a to lib_lpcspifi_Mx.a]
LPCSpifilib version <1.01>
==========================
Release date <12/11/2014>
-1. Changed reported device string on S25FL512S from "S25FL512S 256kSec" to "S25FL512S".
+1. Changed reported device string on S25FL512S from "S25FL512S 256kSec" to "S25FL512S".
2. Changelog update: Added support for MX25L1635E, MX25L6435E, MX25L8035E, S25FL016K, S25FL064P, S25FL128S, S25FL256S,
S25FL512S, W25Q16DV, and W25Q64FV devices.
3. Changelog update: Changed maxRead to 16128 (was 32768).
@@ -66,9 +66,9 @@ Change Log:
2. Added support for Winbond W25Q80BV.
3. Added API's to return max speed for specific functions:
Read, QuadRead, Program, Quad Program.
-4. Added prvGetStatus, prvSetStatus and prvSetQuadMode Functions to device definition structure.
+4. Added prvGetStatus, prvSetStatus and prvSetQuadMode Functions to device definition structure.
5. Added spifiDevGetCount function.
-6. Consolidated MX25L3235E and S25FL164K support into spifilib_fam_standard_cmd module
+6. Consolidated MX25L3235E and S25FL164K support into spifilib_fam_standard_cmd module
(removed SPIFI_REG_FAMILY_xxx registration functions and replaced with
spifi_REG_FAMILY_StandardCommandSet function).
7. Fixed bug in spifiRegisterFamily where NULL was being returned instead of the
diff --git a/arch/arm/src/sam34/sam4cm_cpustart.c b/arch/arm/src/sam34/sam4cm_cpustart.c
index 3f6a4c6a19..591760b8c7 100644
--- a/arch/arm/src/sam34/sam4cm_cpustart.c
+++ b/arch/arm/src/sam34/sam4cm_cpustart.c
@@ -231,7 +231,7 @@ int up_cpu_start(int cpu)
putreg32(0x1, SAM_IPC0_IECR); /* enable : write-only */
irq_attach(SAM_IRQ_IPC0, arm_pause_handler, NULL);
up_enable_irq(SAM_IRQ_IPC0);
-
+
spin_lock(&g_cpu1_boot);
/* CPU1 boot done */
diff --git a/arch/arm/src/sama5/chip/sam_emaca.h b/arch/arm/src/sama5/chip/sam_emaca.h
index 2681b0567c..3e4bb7409c 100644
--- a/arch/arm/src/sama5/chip/sam_emaca.h
+++ b/arch/arm/src/sama5/chip/sam_emaca.h
@@ -1,6 +1,6 @@
/************************************************************************************
* arch/arm/src/sama5/chip/sam_emaca.h
- * This is the form of the EMAC interface used the SAMA5D3
+ * This is the form of the EMAC interface used the SAMA5D3
*
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
diff --git a/arch/arm/src/sama5/chip/sam_flexcom.h b/arch/arm/src/sama5/chip/sam_flexcom.h
index 1e690d1ba5..990a73b1c7 100644
--- a/arch/arm/src/sama5/chip/sam_flexcom.h
+++ b/arch/arm/src/sama5/chip/sam_flexcom.h
@@ -123,5 +123,5 @@
/* Flexcom TWI Register Definitions *************************************************/
#include "chip/sam_flexcom_twi.h"
-
+
#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_H */
diff --git a/arch/arm/src/sama5/chip/sam_matrix.h b/arch/arm/src/sama5/chip/sam_matrix.h
index e68e85fddf..f1da282685 100644
--- a/arch/arm/src/sama5/chip/sam_matrix.h
+++ b/arch/arm/src/sama5/chip/sam_matrix.h
@@ -814,7 +814,7 @@
#if defined(ATSAMA5D2) || defined(ATSAMA5D4)
/* Master Error Interrupt Enable Register, Master Error Interrupt Disable Register,
- * Master Error Interrupt Mask Register, and Master Error Status Register
+ * Master Error Interrupt Mask Register, and Master Error Status Register
*/
# define MATRIX_MEINT_MERR(n) (1 << (n)) /* Master x Access Error, n=0..9 */
diff --git a/arch/arm/src/sama5/chip/sam_xdmac.h b/arch/arm/src/sama5/chip/sam_xdmac.h
index 06b055ccbc..41ed95453e 100644
--- a/arch/arm/src/sama5/chip/sam_xdmac.h
+++ b/arch/arm/src/sama5/chip/sam_xdmac.h
@@ -283,7 +283,7 @@
#define XDMAC_CHINT_DI (1 << 2) /* Bit 2: End of Disable Interrupt */
#define XDMAC_CHINT_FI (1 << 3) /* Bit 3: End of Flush Interrupt */
#define XDMAC_CHINT_RBI (1 << 4) /* Bit 4: Read Bus Error Interrupt */
-#define XDMAC_CHINT_WBI (1 << 5) /* Bit 5: Write Bus Error Interrupt */
+#define XDMAC_CHINT_WBI (1 << 5) /* Bit 5: Write Bus Error Interrupt */
#define XDMAC_CHINT_ROI (1 << 6) /* Bit 6: Request Overflow Error Interrupt Disable Bit */
#define XDMAC_CHINT_ERRORS (0x00000070)
diff --git a/arch/arm/src/sama5/sam_emacb.c b/arch/arm/src/sama5/sam_emacb.c
index c08725216c..c9fb251aca 100644
--- a/arch/arm/src/sama5/sam_emacb.c
+++ b/arch/arm/src/sama5/sam_emacb.c
@@ -3,7 +3,7 @@
* 10/100 Base-T Ethernet driver for the SAMA5D4.
*
* The SAMA5D3 and SAMA5D4 EMAC implementations differ in register naming
- * and in register layout but are functionally equivalent. Here they are
+ * and in register layout but are functionally equivalent. Here they are
* distinguished as 'A' and 'B'. For now, the 'A' and 'B' drivers are kept
* separate (mostly because the 'B' driver needs to support two EMAC blocks.
* But the 'B' driver should replace the 'A' driver someday.
diff --git a/arch/arm/src/samdl/chip/saml_dmac.h b/arch/arm/src/samdl/chip/saml_dmac.h
index 191e888a7d..a8df353074 100644
--- a/arch/arm/src/samdl/chip/saml_dmac.h
+++ b/arch/arm/src/samdl/chip/saml_dmac.h
@@ -173,9 +173,9 @@
# define DMAC_QOSCTRL_DQOS_LOW (1 << DMAC_QOSCTRL_DQOS_SHIFT) /* Sensitive bandwidth */
# define DMAC_QOSCTRL_DQOS_MEDIUM (2 << DMAC_QOSCTRL_DQOS_SHIFT) /* Sensitive latency */
# define DMAC_QOSCTRL_DQOS_HIGH (3 << DMAC_QOSCTRL_DQOS_SHIFT) /* Critical latency */
-
+
/* Common bit definitions for: Software Trigger Control Register, Interrupt Status Register,
- * Busy Channels Register, and Pending Channels Register
+ * Busy Channels Register, and Pending Channels Register
*/
#define DMAC_CHAN(n) (1 << (n)) /* DMAC Channel n, n=0-15 */
diff --git a/arch/arm/src/samv7/chip/sam_usbhs.h b/arch/arm/src/samv7/chip/sam_usbhs.h
index 04c9c4db51..3661ca91e7 100644
--- a/arch/arm/src/samv7/chip/sam_usbhs.h
+++ b/arch/arm/src/samv7/chip/sam_usbhs.h
@@ -335,7 +335,7 @@
* Device Endpoint Mask Register
* Device Endpoint Enable Register
*
- * (1) Control, Bulk, Interrupt endpoints
+ * (1) Control, Bulk, Interrupt endpoints
* (2) Isochronous endpoints only
*/
@@ -464,7 +464,7 @@
* (1) Not clear or set registers
* (2) Not clear register
*/
-
+
#define USBHS_HSTINT_DCONNI (1 << 0) /* Bit 0: Device Connection Interrupt */
#define USBHS_HSTINT_DDISCI (1 << 1) /* Bit 1: Device Disconnection Interrupt */
#define USBHS_HSTINT_RSTI (1 << 2) /* Bit 2: USB Reset Sent Interrupt */
@@ -644,7 +644,7 @@
*/
/* All registers */
-
+
#define USBHS_HSTPIPINT_RXINI (1 << 0) /* Bit 0: Received IN Data Interrupt */
#define USBHS_HSTPIPINT_TXOUTI (1 << 1) /* Bit 1: Transmitted OUT Data Interrupt */
#define USBHS_HSTPIPINT_TXSTPI (1 << 2) /* Bit 2: Transmitted SETUP Interrupt (1) */
diff --git a/arch/arm/src/samv7/chip/sam_xdmac.h b/arch/arm/src/samv7/chip/sam_xdmac.h
index cac9a5857a..1cf968fbd8 100644
--- a/arch/arm/src/samv7/chip/sam_xdmac.h
+++ b/arch/arm/src/samv7/chip/sam_xdmac.h
@@ -244,7 +244,7 @@
#define XDMAC_CHINT_DI (1 << 2) /* Bit 2: End of Disable Interrupt */
#define XDMAC_CHINT_FI (1 << 3) /* Bit 3: End of Flush Interrupt */
#define XDMAC_CHINT_RBI (1 << 4) /* Bit 4: Read Bus Error Interrupt */
-#define XDMAC_CHINT_WBI (1 << 5) /* Bit 5: Write Bus Error Interrupt */
+#define XDMAC_CHINT_WBI (1 << 5) /* Bit 5: Write Bus Error Interrupt */
#define XDMAC_CHINT_ROI (1 << 6) /* Bit 6: Request Overflow Error Interrupt Disable Bit */
#define XDMAC_CHINT_ERRORS (0x00000070)
diff --git a/arch/arm/src/samv7/sam_progmem.c b/arch/arm/src/samv7/sam_progmem.c
index 41126bff7a..535817bdff 100644
--- a/arch/arm/src/samv7/sam_progmem.c
+++ b/arch/arm/src/samv7/sam_progmem.c
@@ -709,7 +709,7 @@ ssize_t up_progmem_write(size_t address, const void *buffer, size_t buflen)
for (i = 0; i < (SAMV7_PAGE_SIZE / sizeof(uint32_t)); i++)
{
- *dest++ = *src++;
+ *dest++ = *src++;
ARM_DMB();
}
diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c
index d2904fc96c..d27dafd5cc 100644
--- a/arch/arm/src/samv7/sam_usbdevhs.c
+++ b/arch/arm/src/samv7/sam_usbdevhs.c
@@ -2545,7 +2545,7 @@ static void sam_dma_interrupt(struct sam_usbdev_s *priv, int epno)
if (byct > 0 || nbusybk > 0)
{
- /* Not all of the data has been sent to the host. A NBUSYBKE
+ /* Not all of the data has been sent to the host. A NBUSYBKE
* interrupt will be generated later. It has already been enabled.
* Now wait for the transfer to complete.
*/
diff --git a/arch/arm/src/stm32/chip/stm32_otghs.h b/arch/arm/src/stm32/chip/stm32_otghs.h
index 95b4772a37..2e8f124f5c 100644
--- a/arch/arm/src/stm32/chip/stm32_otghs.h
+++ b/arch/arm/src/stm32/chip/stm32_otghs.h
@@ -169,7 +169,7 @@
#define STM32_OTGHS_DVBUSPULSE_OFFSET 0x082c /* Device VBUS pulsing time register */
#define STM32_OTGHS_DIEPEMPMSK_OFFSET 0x0834 /* Device IN endpoint FIFO empty interrupt mask register */
-#define STM32_OTGHS_DIEP_OFFSET(n) (0x0900 + ((n) << 5))
+#define STM32_OTGHS_DIEP_OFFSET(n) (0x0900 + ((n) << 5))
#define STM32_OTGHS_DIEPCTL_EPOFFSET 0x0000 /* Device endpoint control register */
#define STM32_OTGHS_DIEPINT_EPOFFSET 0x0008 /* Device endpoint interrupt register */
#define STM32_OTGHS_DIEPTSIZ_EPOFFSET 0x0010 /* Device IN endpoint transfer size register */
diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
index d44c664edb..c5a4c4d5d3 100644
--- a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
+++ b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h
@@ -426,7 +426,7 @@
#define GPIO_I2C3_SDA_2 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN8)
#if defined(CONFIG_STM32_STM32F411)
# define GPIO_I2C3_SDA_3 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN4)
-# define GPIO_I2C3_SDA_4 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN8)
+# define GPIO_I2C3_SDA_4 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN8)
#endif
#define GPIO_I2C3_SMBA_1 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9)
#define GPIO_I2C3_SMBA_2 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN9)
diff --git a/arch/arm/src/stm32/stm32_capture.h b/arch/arm/src/stm32/stm32_capture.h
index 5c81e77d9c..004f953fe7 100644
--- a/arch/arm/src/stm32/stm32_capture.h
+++ b/arch/arm/src/stm32/stm32_capture.h
@@ -91,7 +91,7 @@ typedef enum
STM32_CAP_MAPPED_TI1 = (1< 0));
for (i = 0; i < cchannels - 1; i ++)
{
diff --git a/arch/arm/src/stm32/stm32_sdadc.h b/arch/arm/src/stm32/stm32_sdadc.h
index b2f7ffedd9..24b89dbf9e 100644
--- a/arch/arm/src/stm32/stm32_sdadc.h
+++ b/arch/arm/src/stm32/stm32_sdadc.h
@@ -114,8 +114,8 @@
/* SDADC Channels/DMA ******************************************************
* The maximum number of channels that can be sampled at each scan.
- * If DMA support is not enabled, then only a single channel
- * ought to be sampled.
+ * If DMA support is not enabled, then only a single channel
+ * ought to be sampled.
* Otherwise, unless sampling frequency is reduced,
* data overruns would occur.
*/
diff --git a/arch/arm/src/stm32/stm32_tickless.c b/arch/arm/src/stm32/stm32_tickless.c
index 6d7a004693..9696ac81a8 100644
--- a/arch/arm/src/stm32/stm32_tickless.c
+++ b/arch/arm/src/stm32/stm32_tickless.c
@@ -248,7 +248,7 @@ static int stm32_tickless_setchannel(uint8_t channel)
*/
ccmr_val = (ATIM_CCMR_MODE_FRZN << ATIM_CCMR1_OC1M_SHIFT);
-
+
/* Set polarity */
ccer_val |= ATIM_CCER_CC1P << (channel << 2);
@@ -913,7 +913,7 @@ int up_timer_start(FAR const struct timespec *ts)
*/
g_tickless.period = (uint16_t)(period + count);
-
+
STM32_TIM_SETCOMPARE(g_tickless.tch, g_tickless.channel,
g_tickless.period);
diff --git a/arch/arm/src/stm32/stm32f37xxx_rcc.c b/arch/arm/src/stm32/stm32f37xxx_rcc.c
index 6b83ee316c..7cb9300e0f 100644
--- a/arch/arm/src/stm32/stm32f37xxx_rcc.c
+++ b/arch/arm/src/stm32/stm32f37xxx_rcc.c
@@ -598,7 +598,7 @@ static void stm32_stdclockconfig(void)
#endif
#if defined(CONFIG_RTC_LSECLOCK)
- /* Low speed external clock source LSE
+ /* Low speed external clock source LSE
*
* TODO: There is another case where the LSE needs to
* be enabled: if the MCO pin selects LSE as source.
diff --git a/arch/arm/src/stm32f0/stm32f0_hsi48.c b/arch/arm/src/stm32f0/stm32f0_hsi48.c
index 2a33b9cf85..74230b25aa 100644
--- a/arch/arm/src/stm32f0/stm32f0_hsi48.c
+++ b/arch/arm/src/stm32f0/stm32f0_hsi48.c
@@ -176,7 +176,7 @@ void stm32f0_disable_hsi48(void)
regval = getreg32(STM32F0_CRS_CFGR);
regval &= ~CRS_CFGR_SYNCSRC_MASK;
putreg32(regval, STM32F0_CRS_CFGR);
-
+
regval = getreg32(STM32F0_CRS_CR);
regval &= ~CRS_CR_AUTOTRIMEN;
putreg32(regval, STM32F0_CRS_CR);
diff --git a/arch/arm/src/stm32f0/stm32f0_hsi48.h b/arch/arm/src/stm32f0/stm32f0_hsi48.h
index d299db13e1..6c9eb38b10 100644
--- a/arch/arm/src/stm32f0/stm32f0_hsi48.h
+++ b/arch/arm/src/stm32f0/stm32f0_hsi48.h
@@ -53,7 +53,7 @@ enum syncsrc_e
{
SYNCSRC_GPIO = 0, /* GPIO selected as SYNC signal source */
SYNCSRC_LSE, /* LSE selected as SYNC signal source */
- SYNCSRC_USB, /* USB SOF selected as SYNC signal source */
+ SYNCSRC_USB, /* USB SOF selected as SYNC signal source */
};
/************************************************************************************
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h
index 889cf23192..41675c60b3 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h
@@ -210,6 +210,6 @@
*/
#define STM32_DEBUGMCU_BASE 0xe0042000
-
+
#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XXX75XXX_MEMORYMAP_H */
diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_tim.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_tim.h
index eca76e95aa..5fad1f5a78 100644
--- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_tim.h
+++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_tim.h
@@ -678,7 +678,7 @@
#define ATIM_CCMR3_OC6CE (1 << 15) /* Bit 15: Output Compare 7 Clear Enable */
#define ATIM_CCMR3_OC5M (1 << 16) /* Bit 16: Output Compare 5 mode - bit 3 */
#define ATIM_CCMR3_OC6M (1 << 24) /* Bit 24: Output Compare 6 mode - bit 3 */
-
+
/* Capture/compare enable register */
diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h
index 81f3512fe6..db2ca6d3a9 100644
--- a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h
+++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h
@@ -216,6 +216,6 @@
*/
#define STM32_DEBUGMCU_BASE 0xe0042000
-
+
#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XXX75XXX_MEMORYMAP_H */
diff --git a/arch/arm/src/stm32f7/stm32_sdmmc.c b/arch/arm/src/stm32f7/stm32_sdmmc.c
index 9225312bd1..6be8f5f496 100644
--- a/arch/arm/src/stm32f7/stm32_sdmmc.c
+++ b/arch/arm/src/stm32f7/stm32_sdmmc.c
@@ -2886,7 +2886,7 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
/* Configure the RX DMA */
stm32_configxfrints(priv, STM32_SDMMC_DMARECV_MASK);
-
+
sdmmc_modifyreg32(priv, STM32_SDMMC_DCTRL_OFFSET, 0, STM32_SDMMC_DCTRL_DMAEN);
stm32_dmasetup(priv->dma, priv->base + STM32_SDMMC_FIFO_OFFSET,
(uint32_t)buffer, (buflen + 3) >> 2,
@@ -3312,7 +3312,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
{
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
-
+
mcinfo("cdstatus: %02x\n", priv->cdstatus);
leave_critical_section(flags);
}
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_tim.h b/arch/arm/src/stm32l4/chip/stm32l4_tim.h
index 23ff67ad4f..83f6902aae 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4_tim.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4_tim.h
@@ -651,7 +651,7 @@
#define ATIM_CCMR3_OC6M_MASK (7 << ATIM_CCMR3_OC6M_SHIFT)
/* (See common (unshifted) bit field definitions below) */
#define ATIM_CCMR3_OC6CE (1 << 15) /* Bit 15: Output Compare 7 Clear Enable */
-
+
#define ATIM_CCMR3_OC5M (1 << 16) /* Bit 16: Output Compare 5 mode - bit 3 */
#define ATIM_CCMR3_OC6M (1 << 24) /* Bit 24: Output Compare 6 mode - bit 3 */
diff --git a/arch/arm/src/stm32l4/stm32l4_can.h b/arch/arm/src/stm32l4/stm32l4_can.h
index b5db2c4286..ded35c173b 100644
--- a/arch/arm/src/stm32l4/stm32l4_can.h
+++ b/arch/arm/src/stm32l4/stm32l4_can.h
@@ -62,7 +62,7 @@
# undef CONFIG_STM32L4_CAN1
#endif
-#if defined(CONFIG_CAN) && defined(CONFIG_STM32L4_CAN1)
+#if defined(CONFIG_CAN) && defined(CONFIG_STM32L4_CAN1)
/* CAN BAUD */
diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot.c b/arch/arm/src/stm32l4/stm32l4_oneshot.c
index 9a7eb87b61..2c5191404d 100644
--- a/arch/arm/src/stm32l4/stm32l4_oneshot.c
+++ b/arch/arm/src/stm32l4/stm32l4_oneshot.c
@@ -238,7 +238,7 @@ int stm32l4_oneshot_initialize(FAR struct stm32l4_oneshot_s *oneshot,
*
****************************************************************************/
-int stm32l4_oneshot_max_delay(FAR struct stm32l4_oneshot_s *oneshot,
+int stm32l4_oneshot_max_delay(FAR struct stm32l4_oneshot_s *oneshot,
FAR uint64_t *usec)
{
DEBUGASSERT(oneshot != NULL && usec != NULL);
diff --git a/arch/arm/src/stm32l4/stm32l4_pwm.c b/arch/arm/src/stm32l4/stm32l4_pwm.c
index 71c4f1dad2..c0879f676c 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwm.c
+++ b/arch/arm/src/stm32l4/stm32l4_pwm.c
@@ -643,7 +643,7 @@ static uint16_t stm32l4pwm_getreg(struct stm32l4_pwmtimer_s *priv, int offset)
*
****************************************************************************/
-static void stm32l4pwm_putreg(struct stm32l4_pwmtimer_s *priv, int offset,
+static void stm32l4pwm_putreg(struct stm32l4_pwmtimer_s *priv, int offset,
uint16_t value)
{
if (priv->timtype == TIMTYPE_GENERAL32 &&
@@ -2027,7 +2027,7 @@ static int stm32l4pwm_stop(FAR struct pwm_lowerhalf_s *dev)
*
****************************************************************************/
-static int stm32l4pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd,
+static int stm32l4pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd,
unsigned long arg)
{
#ifdef CONFIG_DEBUG_PWM_INFO
diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.c b/arch/arm/src/stm32l4/stm32l4_pwr.c
index bc9a022fa0..816392895c 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwr.c
+++ b/arch/arm/src/stm32l4/stm32l4_pwr.c
@@ -81,7 +81,7 @@ static inline void stm32l4_pwr_modifyreg(uint8_t offset, uint16_t clearbits, uin
* Enable/disable the clock to the power control peripheral. Enabling must be done
* after the APB1 clock is validly configured, and prior to using any functionality
* controlled by the PWR block (i.e. much of anything else provided by this module).
- *
+ *
* Input Parameters:
* enable - True: enable the clock to the Power control (PWR) block.
*
@@ -94,7 +94,7 @@ bool stm32l4_pwr_enableclk(bool enable)
{
uint32_t regval;
bool wasenabled;
-
+
regval = getreg32(STM32L4_RCC_APB1ENR1);
wasenabled = ((regval & RCC_APB1ENR1_PWREN) != 0);
@@ -114,7 +114,7 @@ bool stm32l4_pwr_enableclk(bool enable)
regval |= RCC_APB1ENR1_PWREN;
putreg32(regval, STM32L4_RCC_APB1ENR1);
}
-
+
return wasenabled;
}
diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.h b/arch/arm/src/stm32l4/stm32l4_pwr.h
index 14891fe00a..77d87b3dfe 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwr.h
+++ b/arch/arm/src/stm32l4/stm32l4_pwr.h
@@ -73,7 +73,7 @@ extern "C"
* Enable/disable the clock to the power control peripheral. Enabling must be done
* after the APB1 clock is validly configured, and prior to using any functionality
* controlled by the PWR block (i.e. much of anything else provided by this module).
- *
+ *
* Input Parameters:
* enable - True: enable the clock to the Power control (PWR) block.
*
diff --git a/arch/arm/src/stm32l4/stm32l4_qspi.c b/arch/arm/src/stm32l4/stm32l4_qspi.c
index 0f55e764a0..07bff36906 100644
--- a/arch/arm/src/stm32l4/stm32l4_qspi.c
+++ b/arch/arm/src/stm32l4/stm32l4_qspi.c
@@ -240,7 +240,7 @@ struct qspi_xctnspec_s
uint8_t isddr; /* true if 'double data rate' */
uint8_t issioo; /* true if 'send instruction only once' mode */
-
+
#ifdef STM32L4_QSPI_INTERRUPTS
uint8_t function; /* functional mode; to distinguish a read or write */
int8_t disposition; /* how it all turned out */
@@ -1059,8 +1059,8 @@ static void qspi_ccrconfig(struct stm32l4_qspidev_s *priv,
* automatic status polling, etc.
*
* Input Parameters:
- * irq -
- * context -
+ * irq -
+ * context -
*
* Returned Value:
* OK means we handled it
@@ -1072,21 +1072,21 @@ static int qspi0_interrupt(int irq, void *context, FAR void *arg)
uint32_t status;
uint32_t cr;
uint32_t regval;
-
+
/* Let's find out what is going on */
-
+
status = qspi_getreg(&g_qspi0dev, STM32L4_QUADSPI_SR_OFFSET);
cr = qspi_getreg(&g_qspi0dev, STM32L4_QUADSPI_CR_OFFSET);
-
+
/* Is it 'FIFO Threshold'? */
-
+
if ((status & QSPI_SR_FTF) && (cr & QSPI_CR_FTIE))
{
volatile uint32_t *datareg = (volatile uint32_t*)(g_qspi0dev.base + STM32L4_QUADSPI_DR_OFFSET);
if (g_qspi0dev.xctn->function == CCR_FMODE_INDWR)
{
/* Write data until we have no more or have no place to put it */
-
+
while((regval = qspi_getreg(&g_qspi0dev, STM32L4_QUADSPI_SR_OFFSET)) & QSPI_SR_FTF)
{
if (g_qspi0dev.xctn->idxnow < g_qspi0dev.xctn->datasize)
@@ -1097,7 +1097,7 @@ static int qspi0_interrupt(int irq, void *context, FAR void *arg)
else
{
/* Fresh out of data to write */
-
+
break;
}
}
@@ -1105,7 +1105,7 @@ static int qspi0_interrupt(int irq, void *context, FAR void *arg)
else if (g_qspi0dev.xctn->function == CCR_FMODE_INDRD)
{
/* Read data until we have no more or have no place to put it */
-
+
while((regval = qspi_getreg(&g_qspi0dev, STM32L4_QUADSPI_SR_OFFSET)) & QSPI_SR_FTF)
{
if (g_qspi0dev.xctn->idxnow < g_qspi0dev.xctn->datasize)
@@ -1116,7 +1116,7 @@ static int qspi0_interrupt(int irq, void *context, FAR void *arg)
else
{
/* no room at the inn */
-
+
break;
}
}
@@ -1124,27 +1124,27 @@ static int qspi0_interrupt(int irq, void *context, FAR void *arg)
}
/* Is it 'Transfer Complete'? */
-
+
if ((status & QSPI_SR_TCF) && (cr & QSPI_CR_TCIE))
{
/* Acknowledge interrupt */
-
+
qspi_putreg(&g_qspi0dev, QSPI_FCR_CTCF, STM32L4_QUADSPI_FCR);
/* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */
-
+
regval = qspi_getreg(&g_qspi0dev, STM32L4_QUADSPI_CR_OFFSET);
regval &= ~(QSPI_CR_TEIE | QSPI_CR_TCIE | QSPI_CR_FTIE);
qspi_putreg(&g_qspi0dev, regval, STM32L4_QUADSPI_CR_OFFSET);
-
+
/* Do the last bit of read if needed */
-
+
if (g_qspi0dev.xctn->function == CCR_FMODE_INDRD)
{
volatile uint32_t *datareg = (volatile uint32_t*)(g_qspi0dev.base + STM32L4_QUADSPI_DR_OFFSET);
/* Read any remaining data */
-
+
while(((regval = qspi_getreg(&g_qspi0dev, STM32L4_QUADSPI_SR_OFFSET)) & QSPI_SR_FLEVEL_MASK) != 0)
{
if (g_qspi0dev.xctn->idxnow < g_qspi0dev.xctn->datasize)
@@ -1162,42 +1162,42 @@ static int qspi0_interrupt(int irq, void *context, FAR void *arg)
}
/* Use 'abort' to ditch any stray fifo contents and clear BUSY flag */
-
+
qspi_abort(&g_qspi0dev);
/* Set success status */
-
+
g_qspi0dev.xctn->disposition = OK;
-
+
/* Signal complete */
-
+
sem_post(&g_qspi0dev.op_sem);
}
/* Is it 'Status Match'? */
-
+
if ((status & QSPI_SR_SMF) && (cr & QSPI_CR_SMIE))
{
/* Acknowledge interrupt */
-
+
qspi_putreg(&g_qspi0dev, QSPI_FCR_CSMF, STM32L4_QUADSPI_FCR);
-
+
/* If 'automatic poll mode stop' is activated, we're done */
-
+
if (cr & QSPI_CR_APMS)
{
/* Disable the QSPI Transfer Error and Status Match Interrupts */
-
+
regval = qspi_getreg(&g_qspi0dev, STM32L4_QUADSPI_CR_OFFSET);
regval &= ~(QSPI_CR_TEIE | QSPI_CR_SMIE);
qspi_putreg(&g_qspi0dev, regval, STM32L4_QUADSPI_CR_OFFSET);
/* Set success status */
-
+
g_qspi0dev.xctn->disposition = OK;
-
+
/* Signal complete */
-
+
sem_post(&g_qspi0dev.op_sem);
}
else
@@ -1207,15 +1207,15 @@ static int qspi0_interrupt(int irq, void *context, FAR void *arg)
}
/* Is it' Transfer Error'? :( */
-
+
if ((status & QSPI_SR_TEF) && (cr & QSPI_CR_TEIE))
{
/* Acknowledge interrupt */
-
+
qspi_putreg(&g_qspi0dev, QSPI_FCR_CTEF, STM32L4_QUADSPI_FCR);
-
+
/* Disable all the QSPI Interrupts */
-
+
regval = qspi_getreg(&g_qspi0dev, STM32L4_QUADSPI_CR_OFFSET);
regval &= ~(QSPI_CR_TEIE | QSPI_CR_TCIE | QSPI_CR_FTIE | QSPI_CR_SMIE | QSPI_CR_TOIE);
qspi_putreg(&g_qspi0dev, regval, STM32L4_QUADSPI_CR_OFFSET);
@@ -1225,22 +1225,22 @@ static int qspi0_interrupt(int irq, void *context, FAR void *arg)
* presumably relative to the FSIZE field in CCR; the manual is not
* explicit, but what else could it be?
*/
-
+
g_qspi0dev.xctn->disposition = - EIO;
/* Signal complete */
-
+
sem_post(&g_qspi0dev.op_sem);
}
/* Is it 'Timeout'? */
-
+
if ((status & QSPI_SR_TOF) && (cr & QSPI_CR_TOIE))
{
/* Acknowledge interrupt */
-
+
qspi_putreg(&g_qspi0dev, QSPI_FCR_CTOF, STM32L4_QUADSPI_FCR);
-
+
/* XXX this interrupt simply means that, in 'memory mapped mode',
* the QSPI memory has not been accessed for a while, and the
* IP block was configured to automatically de-assert CS after
@@ -1400,7 +1400,7 @@ static int qspi_memory_dma(struct stm32l4_qspidev_s *priv,
if (QSPIMEM_ISWRITE(meminfo->flags))
{
/* Setup the DMA (memory-to-peripheral) */
-
+
dmaflags = (QSPI_DMA_PRIO | DMA_CCR_MSIZE_8BITS | DMA_CCR_PSIZE_8BITS | DMA_CCR_MINC | DMA_CCR_DIR);
}
else
@@ -1409,7 +1409,7 @@ static int qspi_memory_dma(struct stm32l4_qspidev_s *priv,
dmaflags = (QSPI_DMA_PRIO | DMA_CCR_MSIZE_8BITS | DMA_CCR_PSIZE_8BITS | DMA_CCR_MINC );
}
-
+
stm32l4_dmasetup(priv->dmach, qspi_regaddr(priv, STM32L4_QUADSPI_DR_OFFSET),
(uint32_t)meminfo->buffer, meminfo->buflen, dmaflags);
@@ -1825,7 +1825,7 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
*/
return;
}
-
+
spiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -1924,12 +1924,12 @@ static int qspi_command(struct qspi_dev_s *dev,
* automatically cancel the memory mapping. You must exit the
* memory mapped mode first.
*/
-
+
if (priv->memmap)
{
return -EBUSY;
}
-
+
/* Set up the transaction descriptor as per command info */
ret = qspi_setupxctnfromcmd(&xctn, cmdinfo);
@@ -1953,7 +1953,7 @@ static int qspi_command(struct qspi_dev_s *dev,
#ifdef STM32L4_QSPI_INTERRUPTS
/* interrupt mode will need access to the transaction context */
-
+
priv->xctn = &xctn;
if (QSPICMD_ISDATA(cmdinfo->flags))
@@ -1964,7 +1964,7 @@ static int qspi_command(struct qspi_dev_s *dev,
if (QSPICMD_ISWRITE(cmdinfo->flags))
{
uint32_t regval;
-
+
/* Set up the Communications Configuration Register as per command
* info
*/
@@ -1974,7 +1974,7 @@ static int qspi_command(struct qspi_dev_s *dev,
/* Enable 'Transfer Error' 'FIFO Threshhold' and 'Transfer Complete'
* interrupts.
*/
-
+
regval = qspi_getreg(priv, STM32L4_QUADSPI_CR_OFFSET);
regval |= (QSPI_CR_TEIE | QSPI_CR_FTIE | QSPI_CR_TCIE);
qspi_putreg(priv, regval, STM32L4_QUADSPI_CR_OFFSET);
@@ -1983,9 +1983,9 @@ static int qspi_command(struct qspi_dev_s *dev,
{
uint32_t regval;
uint32_t addrval;
-
+
addrval = qspi_getreg(priv, STM32L4_QUADSPI_AR_OFFSET);
-
+
/* Set up the Communications Configuration Register as per command
* info
*/
@@ -1993,13 +1993,13 @@ static int qspi_command(struct qspi_dev_s *dev,
qspi_ccrconfig(priv, &xctn, CCR_FMODE_INDRD);
/* Start the transfer by re-writing the address in AR register */
-
+
qspi_putreg(priv, addrval, STM32L4_QUADSPI_AR_OFFSET);
/* Enable 'Transfer Error' 'FIFO Threshhold' and 'Transfer Complete'
* interrupts
*/
-
+
regval = qspi_getreg(priv, STM32L4_QUADSPI_CR_OFFSET);
regval |= (QSPI_CR_TEIE | QSPI_CR_FTIE | QSPI_CR_TCIE);
qspi_putreg(priv, regval, STM32L4_QUADSPI_CR_OFFSET);
@@ -2008,13 +2008,13 @@ static int qspi_command(struct qspi_dev_s *dev,
else
{
uint32_t regval;
-
+
/* We have no data phase, the command will execute as soon as we emit
* the CCR
*/
/* Enable 'Transfer Error' and 'Transfer Complete' interrupts */
-
+
regval = qspi_getreg(priv, STM32L4_QUADSPI_CR_OFFSET);
regval |= (QSPI_CR_TEIE | QSPI_CR_TCIE);
qspi_putreg(priv, regval, STM32L4_QUADSPI_CR_OFFSET);
@@ -2025,14 +2025,14 @@ static int qspi_command(struct qspi_dev_s *dev,
qspi_ccrconfig(priv, &xctn, CCR_FMODE_INDRD);
}
-
+
/* Wait for the interrupt routine to finish it's magic */
-
+
sem_wait(&priv->op_sem);
MEMORY_SYNC();
-
+
/* Convey the result */
-
+
ret = xctn.disposition;
/* because command transfers are so small, we're not going to use
@@ -2073,7 +2073,7 @@ static int qspi_command(struct qspi_dev_s *dev,
qspi_waitstatusflags(priv, QSPI_SR_TCF,1);
qspi_waitstatusflags(priv, QSPI_SR_BUSY,0);
-
+
#endif
return ret;
@@ -2105,12 +2105,12 @@ static int qspi_memory(struct qspi_dev_s *dev,
* automatically cancel the memory mapping. You must exit the
* memory mapped mode first.
*/
-
+
if (priv->memmap)
{
return -EBUSY;
}
-
+
/* Set up the transaction descriptor as per command info */
ret = qspi_setupxctnfrommem(&xctn, meminfo);
@@ -2134,7 +2134,7 @@ static int qspi_memory(struct qspi_dev_s *dev,
#ifdef STM32L4_QSPI_INTERRUPTS
/* interrupt mode will need access to the transaction context */
-
+
priv->xctn = &xctn;
DEBUGASSERT(meminfo->buffer != NULL && meminfo->buflen > 0);
@@ -2143,7 +2143,7 @@ static int qspi_memory(struct qspi_dev_s *dev,
if (QSPIMEM_ISWRITE(meminfo->flags))
{
uint32_t regval;
-
+
/* Set up the Communications Configuration Register as per command
* info
*/
@@ -2153,7 +2153,7 @@ static int qspi_memory(struct qspi_dev_s *dev,
/* Enable 'Transfer Error' 'FIFO Threshhold' and 'Transfer Complete'
* interrupts
*/
-
+
regval = qspi_getreg(priv, STM32L4_QUADSPI_CR_OFFSET);
regval |= (QSPI_CR_TEIE | QSPI_CR_FTIE | QSPI_CR_TCIE);
qspi_putreg(priv, regval, STM32L4_QUADSPI_CR_OFFSET);
@@ -2162,9 +2162,9 @@ static int qspi_memory(struct qspi_dev_s *dev,
{
uint32_t regval;
uint32_t addrval;
-
+
addrval = qspi_getreg(priv, STM32L4_QUADSPI_AR_OFFSET);
-
+
/* Set up the Communications Configuration Register as per command
* info
*/
@@ -2172,25 +2172,25 @@ static int qspi_memory(struct qspi_dev_s *dev,
qspi_ccrconfig(priv, &xctn, CCR_FMODE_INDRD);
/* Start the transfer by re-writing the address in AR register */
-
+
qspi_putreg(priv, addrval, STM32L4_QUADSPI_AR_OFFSET);
/* Enable 'Transfer Error' 'FIFO Threshhold' and 'Transfer Complete'
* interrupts
*/
-
+
regval = qspi_getreg(priv, STM32L4_QUADSPI_CR_OFFSET);
regval |= (QSPI_CR_TEIE | QSPI_CR_FTIE | QSPI_CR_TCIE);
qspi_putreg(priv, regval, STM32L4_QUADSPI_CR_OFFSET);
}
/* Wait for the interrupt routine to finish it's magic */
-
+
sem_wait(&priv->op_sem);
MEMORY_SYNC();
/* convey the result */
-
+
ret = xctn.disposition;
#elif defined(CONFIG_STM32L4_QSPI_DMA)
@@ -2230,7 +2230,7 @@ static int qspi_memory(struct qspi_dev_s *dev,
qspi_waitstatusflags(priv, QSPI_SR_TCF,1);
qspi_waitstatusflags(priv, QSPI_SR_BUSY,0);
-
+
MEMORY_SYNC();
}
@@ -2260,7 +2260,7 @@ static int qspi_memory(struct qspi_dev_s *dev,
qspi_waitstatusflags(priv, QSPI_SR_TCF,1);
qspi_waitstatusflags(priv, QSPI_SR_BUSY,0);
-
+
MEMORY_SYNC();
#endif
@@ -2607,17 +2607,17 @@ void stm32l4_qspi_enter_memorymapped(struct qspi_dev_s* dev,
struct qspi_xctnspec_s xctn;
/* lock during this mode change */
-
+
qspi_lock(dev, true);
-
+
if (priv->memmap)
{
qspi_lock(dev, false);
return;
}
-
+
/* Abort anything in-progress */
-
+
qspi_abort(priv);
/* Wait till BUSY flag reset */
@@ -2625,22 +2625,22 @@ void stm32l4_qspi_enter_memorymapped(struct qspi_dev_s* dev,
qspi_waitstatusflags(priv, QSPI_SR_BUSY, 0);
/* if we want the 'low-power timeout counter' */
-
+
if (lpto > 0)
{
/* Set the Low Power Timeout value (automatically de-assert
* CS if memory is not accessed for a while)
*/
-
+
qspi_putreg(priv, lpto, STM32L4_QUADSPI_LPTR_OFFSET);
-
+
/* Clear Timeout interrupt */
-
+
qspi_putreg(&g_qspi0dev, QSPI_FCR_CTOF, STM32L4_QUADSPI_FCR);
-
+
#ifdef STM32L4_QSPI_INTERRUPTS
/* Enable Timeout interrupt */
-
+
regval = qspi_getreg(priv, STM32L4_QUADSPI_CR_OFFSET);
regval |= (QSPI_CR_TCEN | QSPI_CR_TOIE);
qspi_putreg(priv, regval, STM32L4_QUADSPI_CR_OFFSET);
@@ -2654,24 +2654,24 @@ void stm32l4_qspi_enter_memorymapped(struct qspi_dev_s* dev,
}
/* create a transaction object */
-
+
qspi_setupxctnfrommem(&xctn, meminfo);
-
+
#ifdef STM32L4_QSPI_INTERRUPTS
priv->xctn = NULL;
#endif
/* set it into the ccr */
-
+
qspi_ccrconfig(priv, &xctn, CCR_FMODE_MEMMAP);
priv->memmap = true;
-
+
/* we should be in memory mapped mode now */
-
+
qspi_dumpregs(priv, "After memory mapped:");
/* finished this mode change */
-
+
qspi_lock(dev, false);
}
@@ -2692,14 +2692,14 @@ void stm32l4_qspi_enter_memorymapped(struct qspi_dev_s* dev,
void stm32l4_qspi_exit_memorymapped(struct qspi_dev_s* dev)
{
struct stm32l4_qspidev_s *priv = (struct stm32l4_qspidev_s *)dev;
-
+
qspi_lock(dev, true);
-
+
/* A simple abort is sufficient */
-
+
qspi_abort(priv);
priv->memmap = false;
-
+
qspi_lock(dev, false);
}
diff --git a/arch/arm/src/stm32l4/stm32l4_rcc.h b/arch/arm/src/stm32l4/stm32l4_rcc.h
index 8a8d2d7f2a..741b5620d5 100644
--- a/arch/arm/src/stm32l4/stm32l4_rcc.h
+++ b/arch/arm/src/stm32l4/stm32l4_rcc.h
@@ -9,7 +9,7 @@
* are met:
*
* 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
+ * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
diff --git a/arch/arm/src/stm32l4/stm32l4_start.c b/arch/arm/src/stm32l4/stm32l4_start.c
index 916985cccf..b2053f25ed 100644
--- a/arch/arm/src/stm32l4/stm32l4_start.c
+++ b/arch/arm/src/stm32l4/stm32l4_start.c
@@ -299,7 +299,7 @@ void __start(void)
* under application-specific circumstances. On the other hand, if we're
* using this memory for, say, additional heap space, then this is handy.
*/
-
+
for (dest = (uint32_t *)SRAM2_START; dest < (uint32_t *)SRAM2_END; )
{
*dest++ = 0;
diff --git a/arch/arm/src/stm32l4/stm32l4_tim.c b/arch/arm/src/stm32l4/stm32l4_tim.c
index 938be218ae..2180884d7e 100644
--- a/arch/arm/src/stm32l4/stm32l4_tim.c
+++ b/arch/arm/src/stm32l4/stm32l4_tim.c
@@ -230,7 +230,7 @@ struct stm32l4_tim_priv_s
static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev,
uint8_t offset);
-static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev,
+static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev,
uint8_t offset, uint16_t value);
static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev,
uint8_t offset, uint16_t clearbits,
@@ -261,9 +261,9 @@ static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev,
static void stm32l4_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev,
uint32_t period);
static uint32_t stm32l4_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev);
-static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev,
+static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev,
uint8_t channel, stm32l4_tim_channel_t mode);
-static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev,
+static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev,
uint8_t channel, uint32_t compare);
static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev,
uint8_t channel);
diff --git a/arch/arm/src/stm32l4/stm32l4x6xx_dma.c b/arch/arm/src/stm32l4/stm32l4x6xx_dma.c
index 335e008b18..e63c73be4f 100644
--- a/arch/arm/src/stm32l4/stm32l4x6xx_dma.c
+++ b/arch/arm/src/stm32l4/stm32l4x6xx_dma.c
@@ -476,7 +476,7 @@ void stm32l4_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
DEBUGASSERT(handle != NULL);
DEBUGASSERT(ntransfers<65536);
-
+
/* Then DMA_CNDTRx register can only be modified if the DMA channel is
* disabled.
*/
diff --git a/arch/arm/src/tiva/chip/tiva_i2c.h b/arch/arm/src/tiva/chip/tiva_i2c.h
index 61c0fec5be..4ca70eaf26 100644
--- a/arch/arm/src/tiva/chip/tiva_i2c.h
+++ b/arch/arm/src/tiva/chip/tiva_i2c.h
@@ -1040,13 +1040,13 @@
/* I2C Peripheral Properties */
#if defined(CONFIG_ARCH_CHIP_TM4C)
-# define I2CSC_PP_HS (1 << 0) /* Bit 0: High-Speed Capable */
+# define I2CSC_PP_HS (1 << 0) /* Bit 0: High-Speed Capable */
#endif
/* I2C Peripheral Configuration */
#if defined(CONFIG_ARCH_CHIP_TM4C)
-# define I2CSC_PC_HS (1 << 0) /* Bit 0: High-Speed Capable */
+# define I2CSC_PC_HS (1 << 0) /* Bit 0: High-Speed Capable */
#endif
/************************************************************************************
diff --git a/arch/arm/src/tiva/chip/tiva_timer.h b/arch/arm/src/tiva/chip/tiva_timer.h
index 9a7a3f1808..8415ffe789 100644
--- a/arch/arm/src/tiva/chip/tiva_timer.h
+++ b/arch/arm/src/tiva/chip/tiva_timer.h
@@ -6,7 +6,7 @@
* Copyright (C) 2012, 2014 Max Nekludov. All rights reserved.
* Author: Max Nekludov
*
- * Ongoing support and major revision to support the TM4C129 family
+ * Ongoing support and major revision to support the TM4C129 family
* (essentially a full file replacement):
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
diff --git a/arch/arm/src/tiva/tm4c_ethernet.c b/arch/arm/src/tiva/tm4c_ethernet.c
index b41461eb84..3458db363c 100644
--- a/arch/arm/src/tiva/tm4c_ethernet.c
+++ b/arch/arm/src/tiva/tm4c_ethernet.c
@@ -3587,7 +3587,7 @@ static inline void tiva_phy_initialize(FAR struct tiva_ethmac_s *priv)
/* Enable pulse-per-second (PPS) output signal */
tiva_configgpio(GPIO_EN0_PPS);
-#endif
+#endif
}
/****************************************************************************
diff --git a/arch/arm/src/tms570/tms570_clockconfig.c b/arch/arm/src/tms570/tms570_clockconfig.c
index 2e8b76a480..40938bbc7a 100644
--- a/arch/arm/src/tms570/tms570_clockconfig.c
+++ b/arch/arm/src/tms570/tms570_clockconfig.c
@@ -432,7 +432,7 @@ static void tms570_clocksrc_configure(void)
/* Work Around for Errata SYS#46: Errata Description: Clock Source
* Switching Not Qualified with Clock Source Enable And Clock Source Valid
* Workaround: Always check the CSDIS register to make sure the clock source
- * is turned on and check the CSVSTAT register to make sure the clock source
+ * is turned on and check the CSVSTAT register to make sure the clock source
* is valid. Then write to GHVSRC to switch the clock.
*/
diff --git a/arch/arm/src/tms570/tms570_esm.c b/arch/arm/src/tms570/tms570_esm.c
index dfecf47e8a..f267f1a8fd 100644
--- a/arch/arm/src/tms570/tms570_esm.c
+++ b/arch/arm/src/tms570/tms570_esm.c
@@ -121,7 +121,7 @@ int tms570_esm_initialize(void)
putreg32(0xffffffff, TMS570_ESM_ILCR4);
/* Set interrupt level (Writing zero does nothing) */
-
+
putreg32(0, TMS570_ESM_ILSR1);
putreg32(0, TMS570_ESM_ILSR4);
diff --git a/arch/arm/src/xmc4/xmc4_lowputc.c b/arch/arm/src/xmc4/xmc4_lowputc.c
index c1416194fc..3e374106d0 100644
--- a/arch/arm/src/xmc4/xmc4_lowputc.c
+++ b/arch/arm/src/xmc4/xmc4_lowputc.c
@@ -364,7 +364,7 @@ int xmc4_uart_configure(enum usic_channel_e channel,
* - DPTR = 16
* - LIMIT = 1
* - STBTEN = 0, the trigger of the standard transmit buffer event is
- * based on the transition of the fill level from equal to below the
+ * based on the transition of the fill level from equal to below the
* limit, not the fact being below
* - SIZE = 16
* - LOF = 0, A standard transmit buffer event occurs when the filling
diff --git a/arch/avr/include/avr/irq.h b/arch/avr/include/avr/irq.h
index e259287510..aa409fe450 100644
--- a/arch/avr/include/avr/irq.h
+++ b/arch/avr/include/avr/irq.h
@@ -119,7 +119,7 @@ struct xcptcontext
uint8_t saved_pc0;
# if defined(REG_PC2)
uint8_t saved_pc2;
-# endif
+# endif
uint8_t saved_sreg;
#endif
diff --git a/arch/avr/src/avr/up_switchcontext.S b/arch/avr/src/avr/up_switchcontext.S
index 913cbfb39a..3fc1b6ae42 100644
--- a/arch/avr/src/avr/up_switchcontext.S
+++ b/arch/avr/src/avr/up_switchcontext.S
@@ -40,7 +40,7 @@
#include
#include
-
+
#include "excptmacros.h"
/************************************************************************************
diff --git a/arch/mips/include/pic32mz/chip.h b/arch/mips/include/pic32mz/chip.h
index a96fb6ca70..d36c451525 100644
--- a/arch/mips/include/pic32mz/chip.h
+++ b/arch/mips/include/pic32mz/chip.h
@@ -134,7 +134,7 @@
#ifdef __cplusplus
#define EXTERN extern "C"
-extern "C"
+extern "C"
{
#else
#define EXTERN extern
diff --git a/arch/mips/src/pic32mz/chip/pic32mzec-pps.h b/arch/mips/src/pic32mz/chip/pic32mzec-pps.h
index 04a8896772..8ee9f4d7e7 100644
--- a/arch/mips/src/pic32mz/chip/pic32mzec-pps.h
+++ b/arch/mips/src/pic32mz/chip/pic32mzec-pps.h
@@ -373,7 +373,7 @@
#define IC3R_RPC14 7
#define IC3R_RPD2 0
#define IC3R_RPD6 14
-#define IC3R_RPD10 3
+#define IC3R_RPD10 3
#define IC3R_RPD14 11
#define IC3R_RPF1 4
#define IC3R_RPF4 2
@@ -430,7 +430,7 @@
#define IC7R_RPC14 7
#define IC7R_RPD2 0
#define IC7R_RPD6 14
-#define IC7R_RPD10 3
+#define IC7R_RPD10 3
#define IC7R_RPD14 11
#define IC7R_RPF1 4
#define IC7R_RPF4 2
@@ -501,7 +501,7 @@
#define INT3R_RPC14 7
#define INT3R_RPD2 0
#define INT3R_RPD6 14
-#define INT3R_RPD10 3
+#define INT3R_RPD10 3
#define INT3R_RPD14 11
#define INT3R_RPF1 4
#define INT3R_RPF4 2
@@ -544,7 +544,7 @@
#define REFCLKI1R_RPC14 7
#define REFCLKI1R_RPD2 0
#define REFCLKI1R_RPD6 14
-#define REFCLKI1R_RPD10 3
+#define REFCLKI1R_RPD10 3
#define REFCLKI1R_RPD14 11
#define REFCLKI1R_RPF1 4
#define REFCLKI1R_RPF4 2
@@ -587,7 +587,7 @@
#define SDI1R_RPC14 7
#define SDI1R_RPD2 0
#define SDI1R_RPD6 14
-#define SDI1R_RPD10 3
+#define SDI1R_RPD10 3
#define SDI1R_RPD14 11
#define SDI1R_RPF1 4
#define SDI1R_RPF4 2
@@ -616,7 +616,7 @@
#define SDI3R_RPC1 10
#define SDI3R_RPC14 7
#define SDI3R_RPD2 0
-#define SDI3R_RPD10 3
+#define SDI3R_RPD10 3
#define SDI3R_RPD14 11
#define SDI3R_RPD6 14
#define SDI3R_RPF1 4
@@ -647,7 +647,7 @@
#define SDI5R_RPC14 7
#define SDI5R_RPD2 0
#define SDI5R_RPD6 14
-#define SDI5R_RPD10 3
+#define SDI5R_RPD10 3
#define SDI5R_RPD14 11
#define SDI5R_RPF1 4
#define SDI5R_RPF4 2
@@ -744,7 +744,7 @@
#define SS6R_RPC14 7
#define SS6R_RPD2 0
#define SS6R_RPD6 14
-#define SS6R_RPD10 3
+#define SS6R_RPD10 3
#define SS6R_RPD14 11
#define SS6R_RPF1 4
#define SS6R_RPF4 2
@@ -759,7 +759,7 @@
#define T2CKR_RPC14 7
#define T2CKR_RPD2 0
#define T2CKR_RPD6 14
-#define T2CKR_RPD10 3
+#define T2CKR_RPD10 3
#define T2CKR_RPD14 11
#define T2CKR_RPF1 4
#define T2CKR_RPF4 2
@@ -816,7 +816,7 @@
#define T6CKR_RPC14 7
#define T6CKR_RPD2 0
#define T6CKR_RPD6 14
-#define T6CKR_RPD10 3
+#define T6CKR_RPD10 3
#define T6CKR_RPD14 11
#define T6CKR_RPF1 4
#define T6CKR_RPF4 2
@@ -887,7 +887,7 @@
#define U1RXR_RPC14 7
#define U1RXR_RPD2 0
#define U1RXR_RPD6 14
-#define U1RXR_RPD10 3
+#define U1RXR_RPD10 3
#define U1RXR_RPD14 11
#define U1RXR_RPF1 4
#define U1RXR_RPF4 2
@@ -902,7 +902,7 @@
#define U2CTSR_RPC14 7
#define U2CTSR_RPD2 0
#define U2CTSR_RPD6 14
-#define U2CTSR_RPD10 3
+#define U2CTSR_RPD10 3
#define U2CTSR_RPD14 11
#define U2CTSR_RPF1 4
#define U2CTSR_RPF4 2
@@ -1001,7 +1001,7 @@
#define U5RXR_RPC14 7
#define U5RXR_RPD2 0
#define U5RXR_RPD6 14
-#define U5RXR_RPD10 3
+#define U5RXR_RPD10 3
#define U5RXR_RPD14 11
#define U5RXR_RPF1 4
#define U5RXR_RPF4 2
@@ -1016,7 +1016,7 @@
#define U6CTSR_RPC14 7
#define U6CTSR_RPD2 0
#define U6CTSR_RPD6 14
-#define U6CTSR_RPD10 3
+#define U6CTSR_RPD10 3
#define U6CTSR_RPD14 11
#define U6CTSR_RPF1 4
#define U6CTSR_RPF4 2
diff --git a/arch/misoc/src/lm32/chip.h b/arch/misoc/src/lm32/chip.h
index 78d671f7f9..4606198515 100644
--- a/arch/misoc/src/lm32/chip.h
+++ b/arch/misoc/src/lm32/chip.h
@@ -78,7 +78,7 @@ static inline void irq_setmask(unsigned int mask)
static inline unsigned int irq_pending(void)
{
-
+
unsigned int pending;
__asm__ __volatile__("rcsr %0, IP" : "=r" (pending));
return pending;
diff --git a/arch/misoc/src/lm32/lm32_dumpstate.c b/arch/misoc/src/lm32/lm32_dumpstate.c
index 229aee8bfd..1a26791cb1 100644
--- a/arch/misoc/src/lm32/lm32_dumpstate.c
+++ b/arch/misoc/src/lm32/lm32_dumpstate.c
@@ -65,9 +65,9 @@
static inline uint32_t up_getsp(void)
{
register uint32_t sp;
-
+
__asm__ __volatile__("addi %0, sp, 0" : "=r" (sp));
-
+
return sp;
}
diff --git a/arch/misoc/src/lm32/lm32_swint.c b/arch/misoc/src/lm32/lm32_swint.c
index 7a49cdbb33..17bbc48752 100644
--- a/arch/misoc/src/lm32/lm32_swint.c
+++ b/arch/misoc/src/lm32/lm32_swint.c
@@ -136,7 +136,7 @@ int lm32_swint(int irq, FAR void *context, FAR void *arg)
DEBUGASSERT(g_current_regs == NULL);
g_current_regs = regs;
-
+
/* Software interrupt 0 is invoked with REG_A0 (REG_X10) = system call
* command and REG_A1-6 = variable number of
* arguments depending on the system call.
diff --git a/arch/risc-v/include/arch.h b/arch/risc-v/include/arch.h
index e0e60b4e1b..8e0abb258e 100644
--- a/arch/risc-v/include/arch.h
+++ b/arch/risc-v/include/arch.h
@@ -57,7 +57,7 @@
/* Macros to get the core and vendor ID, HART, arch and ISA codes, etc.
*/
-#ifdef CONFIG_RV32IM_SYSTEM_CSRRS_SUPPORT
+#ifdef CONFIG_RV32IM_SYSTEM_CSRRS_SUPPORT
uint32_t up_getmisa(void);
uint32_t up_getarchid(void);
@@ -91,7 +91,7 @@ uint32_t up_gethartid(void);
* Public Function Prototypes
****************************************************************************/
-#ifdef CONFIG_RV32IM_HW_MULDIV
+#ifdef CONFIG_RV32IM_HW_MULDIV
uint32_t up_hard_mul(uint32_t a, uint32_t b);
uint32_t up_hard_mulh(uint32_t a, uint32_t b);
uint32_t up_hard_mulhsu(uint32_t a, uint32_t b);
diff --git a/arch/risc-v/src/Makefile b/arch/risc-v/src/Makefile
index e5916c3534..4ebba1c476 100644
--- a/arch/risc-v/src/Makefile
+++ b/arch/risc-v/src/Makefile
@@ -42,7 +42,7 @@ ifeq ($(CONFIG_ARCH_RV32I),y) # Base Integer support
ARCH_SUBDIR = rv32i
else ifeq ($(CONFIG_ARCH_RV32IM),y) # Integer + math support
ARCH_SUBDIR = rv32im
-else
+else
ARCH_SUBDIR = rv32i # Default to base RV32I core
endif
@@ -152,7 +152,7 @@ VPATH += $(CHIP_DIR)
all: $(HEAD_OBJ) $(BIN)
-.PHONY: board/libboard$(LIBEXT)
+.PHONY: board/libboard$(LIBEXT)
$(AOBJS) $(UAOBJS) $(HEAD_OBJ): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)
@@ -162,7 +162,7 @@ $(COBJS) $(UCOBJS): %$(OBJEXT): %.c
$(BIN) $(KBIN): $(OBJS)
$(call ARCHIVE, $@, $(OBJS))
- @$(MAKE) depend
+ @$(MAKE) depend
$(UBIN): $(UOBJS)
$(call ARCHIVE, $@, $(UOBJS))
diff --git a/arch/risc-v/src/nr5m100/Make.defs b/arch/risc-v/src/nr5m100/Make.defs
index 8d7b9ee85b..02187de74a 100644
--- a/arch/risc-v/src/nr5m100/Make.defs
+++ b/arch/risc-v/src/nr5m100/Make.defs
@@ -45,7 +45,7 @@ endif
# Override the arch to enable hardware MUL during assembly.
# This is to support our hardware mul test. For that test,
-# we have to disable hardware mul for C code so the soft
+# we have to disable hardware mul for C code so the soft
# math libs will be used to compare software mul vs hw mul.
# But hw mul must be enabled to compile the .S file, or we
# will get an illegal instruction error.
diff --git a/arch/risc-v/src/nr5m100/chip/nr5m1xx_timer.h b/arch/risc-v/src/nr5m100/chip/nr5m1xx_timer.h
index 4739965cf4..98ea8aa803 100644
--- a/arch/risc-v/src/nr5m100/chip/nr5m1xx_timer.h
+++ b/arch/risc-v/src/nr5m100/chip/nr5m1xx_timer.h
@@ -54,7 +54,7 @@
/* Timer 1 address definitions */
-#ifdef CONFIG_NR5_TIMER1
+#ifdef CONFIG_NR5_TIMER1
#define NR5_TIMER1_TACTL_OFFSET (NR5_TIMER1_BASE+NR5_TIMERA_TACTL_OFFSET)
#define NR5_TIMER1_TAR_OFFSET (NR5_TIMER1_BASE+NR5_TIMERA_TAR_OFFSET)
#define NR5_TIMER1_TACCTL0_OFFSET (NR5_TIMER1_BASE+NR5_TIMERA_TACCTL0_OFFSET)
@@ -68,7 +68,7 @@
/* Timer 2 address definitions */
-#ifdef CONFIG_NR5_TIMER2
+#ifdef CONFIG_NR5_TIMER2
#define NR5_TIMER2_TACTL_OFFSET (NR5_TIMER2_BASE+NR5_TIMERA_TACTL_OFFSET)
#define NR5_TIMER2_TAR_OFFSET (NR5_TIMER2_BASE+NR5_TIMERA_TAR_OFFSET)
#define NR5_TIMER2_TACCTL0_OFFSET (NR5_TIMER2_BASE+NR5_TIMERA_TACCTL0_OFFSET)
@@ -82,7 +82,7 @@
/* Timer 3 address definitions */
-#ifdef CONFIG_NR5_TIMER3
+#ifdef CONFIG_NR5_TIMER3
#define NR5_TIMER3_TACTL_OFFSET (NR5_TIMER3_BASE+NR5_TIMERA_TACTL_OFFSET)
#define NR5_TIMER3_TAR_OFFSET (NR5_TIMER3_BASE+NR5_TIMERA_TAR_OFFSET)
#define NR5_TIMER3_TACCTL0_OFFSET (NR5_TIMER3_BASE+NR5_TIMERA_TACCTL0_OFFSET)
@@ -96,7 +96,7 @@
/* Timer 4 address definitions */
-#ifdef CONFIG_NR5_TIMER4
+#ifdef CONFIG_NR5_TIMER4
#define NR5_TIMER4_TACTL_OFFSET (NR5_TIMER4_BASE+NR5_TIMERA_TACTL_OFFSET)
#define NR5_TIMER4_TAR_OFFSET (NR5_TIMER4_BASE+NR5_TIMERA_TAR_OFFSET)
#define NR5_TIMER4_TACCTL0_OFFSET (NR5_TIMER4_BASE+NR5_TIMERA_TACCTL0_OFFSET)
@@ -110,7 +110,7 @@
/* Timer 5 address definitions */
-#ifdef CONFIG_NR5_TIMER5
+#ifdef CONFIG_NR5_TIMER5
#define NR5_TIMER5_TACTL_OFFSET (NR5_TIMER5_BASE+NR5_TIMERA_TACTL_OFFSET)
#define NR5_TIMER5_TAR_OFFSET (NR5_TIMER5_BASE+NR5_TIMERA_TAR_OFFSET)
#define NR5_TIMER5_TACCTL0_OFFSET (NR5_TIMER5_BASE+NR5_TIMERA_TACCTL0_OFFSET)
@@ -126,7 +126,7 @@
/* Control register TACTL Bit definitions */
-#define TIMERA_TACTL_TAIFG (1 << 0) /* Bit 0: Interrupt Pending Flag */
+#define TIMERA_TACTL_TAIFG (1 << 0) /* Bit 0: Interrupt Pending Flag */
#define TIMERA_TACTL_TAIE (1 << 1) /* Bit 1: Interrupt Enable */
#define TIMERA_TACTL_TACLR (1 << 2) /* Bit 2: TAR counter clear */
#define TIMERA_TACTL_MC_SHIFT 4 /* Bits 4-5: Mode Control */
@@ -146,14 +146,14 @@
# define TIMERA_TACTL_SYS_CLOCK (2 << TIMERA_TACTL_TASSEL_SHIFT)
# define TIMERA_TACTL_EXT_CLOCK (3 << TIMERA_TACTL_TASSEL_SHIFT)
#define TIMERA_TACTL_TAPRE_SHIFT 10 /* Bits 10-15: Clock Prescaler */
-#define TIMERA_TACTL_TAPRE_MASK 0x3F
+#define TIMERA_TACTL_TAPRE_MASK 0x3F
# define TIMERA_TACTL_TAPRE(x) (((x) & TIMERA_TACTL_TAPRE_MASK) << TIMERA_TACTL_TAPRE_SHIFT)
/* Capture / Compare register bit definitions */
-#define TIMERA_TACCTL_CCIFG (1 << 0) /* Bit 0: Capture/compare interrupt Flag */
-#define TIMERA_TACCTL_COV (1 << 1) /* Bit 1: Capture overflow */
-#define TIMERA_TACCTL_OUTVAL (1 << 2) /* Bit 2: Output value */
+#define TIMERA_TACCTL_CCIFG (1 << 0) /* Bit 0: Capture/compare interrupt Flag */
+#define TIMERA_TACCTL_COV (1 << 1) /* Bit 1: Capture overflow */
+#define TIMERA_TACCTL_OUTVAL (1 << 2) /* Bit 2: Output value */
#define TIMERA_TACCTL_CCI (1 << 3) /* Bit 3: Capture/compare input value */
#define TIMERA_TACCTL_CCIE (1 << 4) /* Bit 4: Capture/Compare interrupt Enable */
#define TIMERA_TACCTL_OUTMOD_SHIFT 5 /* Bits 5-7: Output Mode */
@@ -165,9 +165,9 @@
# define TIMERA_TACCTL_RESET (5 << TIMERA_TACCTL_OUTMOD_SHIFT)
# define TIMERA_TACCTL_TOGGLE_SET (6 << TIMERA_TACCTL_OUTMOD_SHIFT)
# define TIMERA_TACCTL_RESET_SET (7 << TIMERA_TACCTL_OUTMOD_SHIFT)
-#define TIMERA_TACCTL_CAP (1 << 8) /* Bit 8: Capture mode select */
-#define TIMERA_TACCTL_SCCI (1 << 10) /* Bit 10: Synchronized capture input */
-#define TIMERA_TACCTL_SCS (1 << 11) /* Bit 11: Syncronize capture source */
+#define TIMERA_TACCTL_CAP (1 << 8) /* Bit 8: Capture mode select */
+#define TIMERA_TACCTL_SCCI (1 << 10) /* Bit 10: Synchronized capture input */
+#define TIMERA_TACCTL_SCS (1 << 11) /* Bit 11: Syncronize capture source */
#define TIMERA_TACCTL_CCIS_SHIFT 12 /* Bits 12-13: Capture Input Select */
# define TIMERA_TACCTL_CCIS_CCIA (0 << TIMERA_TACCTL_CCIS_SHIFT)
# define TIMERA_TACCTL_CCIS_CCIB (1 << TIMERA_TACCTL_CCIS_SHIFT)
diff --git a/arch/risc-v/src/nr5m100/chip/nr5m1xx_uart.h b/arch/risc-v/src/nr5m100/chip/nr5m1xx_uart.h
index 5a790782e9..215f8916fe 100644
--- a/arch/risc-v/src/nr5m100/chip/nr5m1xx_uart.h
+++ b/arch/risc-v/src/nr5m100/chip/nr5m1xx_uart.h
@@ -41,7 +41,7 @@
* No parity.
*
* It has a programmable baud rate and RX / TX interrupt capability
- * and that's about it. The primary goal for the UART is to provide a
+ * and that's about it. The primary goal for the UART is to provide a
* debug console to the part.
*/
diff --git a/arch/risc-v/src/nr5m100/nr5_csr.S b/arch/risc-v/src/nr5m100/nr5_csr.S
index 13133005a0..faf5c04857 100644
--- a/arch/risc-v/src/nr5m100/nr5_csr.S
+++ b/arch/risc-v/src/nr5m100/nr5_csr.S
@@ -269,7 +269,7 @@ up_setq2:
ret
/****************************************************************************
- * Calls the NR5M100 specific LSBENC opcode. This opcode will find the
+ * Calls the NR5M100 specific LSBENC opcode. This opcode will find the
* first least significant non-zero bit in a0 and return it's ordinal value.
****************************************************************************/
diff --git a/arch/risc-v/src/nr5m100/nr5_head.S b/arch/risc-v/src/nr5m100/nr5_head.S
index cc0d215632..e41ddc39d5 100644
--- a/arch/risc-v/src/nr5m100/nr5_head.S
+++ b/arch/risc-v/src/nr5m100/nr5_head.S
@@ -64,7 +64,7 @@
.global irq_handler
-#ifdef CONFIG_RV32IM_HW_MULDIV
+#ifdef CONFIG_RV32IM_HW_MULDIV
.global time_hard_mul
.global hard_mul
.global hard_mulh
@@ -183,7 +183,7 @@ __start:
la t0, __nr5_init
jr t0
-
+
/* We shouldn't return from __nr5_init */
.global _init
@@ -403,7 +403,7 @@ irq_handler:
lw x31, 31*4(x1)
/* Restore return PC to q0. This will cause the
- * processor to enter a critical state where
+ * processor to enter a critical state where
* higher priority IRQs won't happen until after
* the mret, thus protecting our shared QREGS.
*/
@@ -515,7 +515,7 @@ irq_regs:
irq_stack:
irq_regs_addr:
- .fill 4,4
+ .fill 4,4
irq_stack_addr:
.fill 4,4
@@ -525,7 +525,7 @@ irq_stack_addr:
* the MUL / DIV opcodes for performing HARD vs SOFT testing.
****************************************************************************/
-#ifdef CONFIG_RV32IM_HW_MULDIV
+#ifdef CONFIG_RV32IM_HW_MULDIV
/* Multiply, return lower 32 bits */
diff --git a/arch/risc-v/src/nr5m100/nr5_irq.c b/arch/risc-v/src/nr5m100/nr5_irq.c
index fd973e7454..a47b139781 100644
--- a/arch/risc-v/src/nr5m100/nr5_irq.c
+++ b/arch/risc-v/src/nr5m100/nr5_irq.c
@@ -167,7 +167,7 @@ void up_irqinitialize(void)
csrw %0, 0(zero) \
csrw %1, 0(zero) \
csrw %2, 0(zero) " ::
- "i"(NR5_EPIC_PRI1_REG), "i"(NR5_EPIC_PRI2_REG),
+ "i"(NR5_EPIC_PRI1_REG), "i"(NR5_EPIC_PRI2_REG),
"i"(NR5_EPIC_PRI3_REG) );
#endif
@@ -300,7 +300,7 @@ irqstate_t up_irq_save(void)
* continue to fire, but no general purpose ints.
*/
- __asm__ volatile("csrrw %0, %1, %2" : "=r"(oldIrqPri) :
+ __asm__ volatile("csrrw %0, %1, %2" : "=r"(oldIrqPri) :
"i"(NR5_EPIC_PRIMASK), "r"(newIrqPri));
return oldIrqPri;
diff --git a/arch/risc-v/src/nr5m100/nr5_irq_dispatch.c b/arch/risc-v/src/nr5m100/nr5_irq_dispatch.c
index 5271d51abf..2178cfdb66 100644
--- a/arch/risc-v/src/nr5m100/nr5_irq_dispatch.c
+++ b/arch/risc-v/src/nr5m100/nr5_irq_dispatch.c
@@ -4,7 +4,7 @@
* Copyright (C) 2016 Ken Pettit. All rights reserved.
* Author: Ken Pettit
*
- * Modified for RISC-V:
+ * Modified for RISC-V:
*
* Copyright (C) 2016 Ken Pettit. All rights reserved.
* Author: Ken Pettit
diff --git a/arch/risc-v/src/nr5m100/nr5_serial.c b/arch/risc-v/src/nr5m100/nr5_serial.c
index 32572a5ebc..4f39dddaaa 100644
--- a/arch/risc-v/src/nr5m100/nr5_serial.c
+++ b/arch/risc-v/src/nr5m100/nr5_serial.c
@@ -432,7 +432,7 @@ static int up_interrupt(int irq, void *context, FAR void *arg)
for (passes = 0; passes < 256 && handled; passes++)
{
handled = false;
-
+
status = up_serialin(priv, NR5_UART_STATUS_REG_OFFSET);
/* Handle incoming, received bytes. The RX FIFO is configured to
diff --git a/arch/risc-v/src/nr5m100/nr5_uart.c b/arch/risc-v/src/nr5m100/nr5_uart.c
index 312c6743d1..a97abd21eb 100644
--- a/arch/risc-v/src/nr5m100/nr5_uart.c
+++ b/arch/risc-v/src/nr5m100/nr5_uart.c
@@ -101,7 +101,7 @@ static volatile struct nr5_uart_regs_s g_nr5_uart1_regs =
.tx_irq = NR5_IRQ_UART1_TX,
};
-static struct nr5_uart_s g_nr5_uart1 =
+static struct nr5_uart_s g_nr5_uart1 =
{
.regs = &g_nr5_uart1_regs,
.rx_buf = &g_nr5_uart1_rx_buf,
@@ -172,7 +172,7 @@ void nr5_uart_init(int uart)
//up_enable_irq(dev->regs->rx_irq);
// Set the baud rate
-
+
if (up_getimpid() == cmpval)
{
*dev->regs->pBaud = 0x0d;
@@ -200,7 +200,7 @@ uint8_t nr5_uart_get_rx()
rxdata = pBuf->buffer[pBuf->tail++];
if (pBuf->tail == pBuf->size)
- pBuf->tail = 0;
+ pBuf->tail = 0;
}
up_enableints();
return rxdata;
diff --git a/arch/risc-v/src/nr5m100/nr5_vectors.S b/arch/risc-v/src/nr5m100/nr5_vectors.S
index ea239d91ce..32ce4f0b74 100644
--- a/arch/risc-v/src/nr5m100/nr5_vectors.S
+++ b/arch/risc-v/src/nr5m100/nr5_vectors.S
@@ -46,7 +46,7 @@
************************************************************************************/
__reset_vec:
- csrw NR5_EPIC_PRIMASK, 7
+ csrw NR5_EPIC_PRIMASK, 7
j __start
/************************************************************************************
diff --git a/arch/risc-v/src/rv32im/Toolchain.defs b/arch/risc-v/src/rv32im/Toolchain.defs
index a89cf6cb26..3229dd2be5 100644
--- a/arch/risc-v/src/rv32im/Toolchain.defs
+++ b/arch/risc-v/src/rv32im/Toolchain.defs
@@ -3,7 +3,7 @@
#
# Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt
-#
+#
# modified for RISC-V:
#
# Copyright (C) 2016 Ken Pettit. All rights reserved.
@@ -89,9 +89,9 @@ ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVGW)
WINTOOL = y
endif
ifeq ($(CONFIG_RV32IM_HW_MULDIV),y)
- ARCHCPUFLAGS = -march=RV32IMXcustom -m32
+ ARCHCPUFLAGS = -march=RV32IMXcustom -m32
else
- ARCHCPUFLAGS = -march=RV32IXcustom -m32
+ ARCHCPUFLAGS = -march=RV32IXcustom -m32
endif
endif
diff --git a/arch/risc-v/src/rv32im/up_dumpstate.c b/arch/risc-v/src/rv32im/up_dumpstate.c
index 97f74c6411..6a27ef2915 100644
--- a/arch/risc-v/src/rv32im/up_dumpstate.c
+++ b/arch/risc-v/src/rv32im/up_dumpstate.c
@@ -124,7 +124,7 @@ static inline void up_registerdump(void)
g_current_regs[REG_S11]);
#ifdef RISCV_SAVE_GP
_alert("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n",
- g_current_regs[REG_GP], g_current_regs[REG_SP], g_current_regs[REG_FP],
+ g_current_regs[REG_GP], g_current_regs[REG_SP], g_current_regs[REG_FP],
g_current_regs[REG_TP], g_current_regs[REG_RA]);
#else
_alert("SP:%08x FP:%08x TP:%08x RA:%08x\n",
diff --git a/arch/risc-v/src/rv32im/up_initialstate.c b/arch/risc-v/src/rv32im/up_initialstate.c
index 492f9f1086..74b5a00bc9 100644
--- a/arch/risc-v/src/rv32im/up_initialstate.c
+++ b/arch/risc-v/src/rv32im/up_initialstate.c
@@ -119,7 +119,7 @@ void up_initial_state(struct tcb_s *tcb)
# warning "Missing logic"
#endif
- /* Set the initial value of the interrupt context register.
+ /* Set the initial value of the interrupt context register.
*
* Since various RISC-V platforms use different interrupt
* methodologies, the value of the interrupt context is
diff --git a/arch/sim/Kconfig b/arch/sim/Kconfig
index 5bf4695154..df46ddab30 100644
--- a/arch/sim/Kconfig
+++ b/arch/sim/Kconfig
@@ -119,7 +119,7 @@ config SIM_NET_HOST_ROUTE
---help---
Add a host route for the simulation that points to the created tap device. The
simulation will not be able to access the public network unless iptables is
- configured to masquerade for it. See configs/sim/NETWORK-LINUX.txt for more
+ configured to masquerade for it. See configs/sim/NETWORK-LINUX.txt for more
information.
config SIM_NET_BRIDGE
diff --git a/arch/sim/src/up_oneshot.c b/arch/sim/src/up_oneshot.c
index 7481e40017..e41f10fa89 100644
--- a/arch/sim/src/up_oneshot.c
+++ b/arch/sim/src/up_oneshot.c
@@ -213,7 +213,7 @@ static int sim_start(FAR struct oneshot_lowerhalf_s *lower,
nsec = (int64_t)ts->tv_sec * NSEC_PER_SEC +
(int64_t)ts->tv_nsec;
ticks = (systime_t)((nsec + NSEC_PER_TICK - 1) / NSEC_PER_TICK);
-
+
/* Save the callback information and start the timer */
priv->callback = callback;
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 948f0edd53..e073ff6aca 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -51,7 +51,7 @@ config XTENSA_CP_LAZY
processor was never used, and (2) tasks must explicitly enable and
disable co-processors.
- An alternative, "lazy" co-processor state restore is enabled with
+ An alternative, "lazy" co-processor state restore is enabled with
this option. That logic works like as follows:
a. CPENABLE is set to zero on each context switch, disabling all co-
diff --git a/arch/xtensa/include/xtensa/core.h b/arch/xtensa/include/xtensa/core.h
index b138aa558a..f254fd3637 100644
--- a/arch/xtensa/include/xtensa/core.h
+++ b/arch/xtensa/include/xtensa/core.h
@@ -485,7 +485,7 @@
#define XCHAL_HAVE_OLD_EXC_ARCH XCHAL_HAVE_XEA1 /* (DEPRECATED) 1 if
* old exception
- * architecture (XEA1),
+ * architecture (XEA1),
* 0 otherwise (eg.
* XEA2) */
#define XCHAL_HAVE_EXCM XCHAL_HAVE_XEA2 /* (DEPRECATED) 1 if
@@ -876,7 +876,7 @@
# define XCHAL_KSEG_CACHED_PADDR 0x00000000 /* phys.addr of
* kseg_cached */
# define XCHAL_KSEG_CACHED_SIZE 0x08000000 /* size in bytes of
- * kseg_cached (assumed
+ * kseg_cached (assumed
* power of 2!!!) */
# define XCHAL_KSEG_BYPASS_VADDR 0xD8000000 /* virt.addr of kernel
* RAM bypass
@@ -885,7 +885,7 @@
# define XCHAL_KSEG_BYPASS_PADDR 0x00000000 /* phys.addr of
* kseg_bypass */
# define XCHAL_KSEG_BYPASS_SIZE 0x08000000 /* size in bytes of
- * kseg_bypass (assumed
+ * kseg_bypass (assumed
* power of 2!!!) */
# define XCHAL_KIO_CACHED_VADDR 0xE0000000 /* virt.addr of kernel
* I/O cached static
@@ -956,7 +956,7 @@
.endif
.endm
-/* Align portion of save area and bring ptr in range if necessary. Used by
+/* Align portion of save area and bring ptr in range if necessary. Used by
* save area load/store sequences. Not usually invoked directly. Allows
* combining multiple (sub-)sequences arbitrarily. ptr pointer to save
* area (may be off, see .Lxchal_pofs_) minofs,maxofs range of offset from
diff --git a/arch/xtensa/include/xtensa/xtensa_coproc.h b/arch/xtensa/include/xtensa/xtensa_coproc.h
index 26829a7a3a..0eb24a3d13 100644
--- a/arch/xtensa/include/xtensa/xtensa_coproc.h
+++ b/arch/xtensa/include/xtensa/xtensa_coproc.h
@@ -74,7 +74,7 @@
* This restriction is introduced to reduce the overhead of saving and
* restoring co-processor state (which can be quite large) and in particular
* remove that overhead from interrupt handlers.
- *
+ *
* The co-processor state save area may be in any convenient per-thread
* location such as in the thread control block or above the thread stack
* area. It need not be in the interrupt stack frame since interrupts don't
diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c
index 892b87d51c..b351765126 100644
--- a/arch/xtensa/src/esp32/esp32_gpio.c
+++ b/arch/xtensa/src/esp32/esp32_gpio.c
@@ -287,7 +287,7 @@ void esp32_gpiowrite(int pin, bool value)
bool esp32_gpioread(int pin)
{
uint32_t regval;
-
+
DEBUGASSERT(pin >=0 && pin <= ESP32_NIRQ_GPIO);
if (pin < 32)
diff --git a/arch/xtensa/src/esp32/rom/esp32_gpio.h b/arch/xtensa/src/esp32/rom/esp32_gpio.h
index 00680ff995..c29d21ee46 100644
--- a/arch/xtensa/src/esp32/rom/esp32_gpio.h
+++ b/arch/xtensa/src/esp32/rom/esp32_gpio.h
@@ -329,7 +329,7 @@ void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv,
bool oen_inv);
/****************************************************************************
- * Name:
+ * Name:
*
* Description:
* Select pad as a gpio function from IOMUX.
diff --git a/binfmt/libelf/libelf_verify.c b/binfmt/libelf/libelf_verify.c
index 26cb51ae7c..1db1e99371 100644
--- a/binfmt/libelf/libelf_verify.c
+++ b/binfmt/libelf/libelf_verify.c
@@ -110,7 +110,7 @@ int elf_verifyheader(FAR const Elf32_Ehdr *ehdr)
/* Verify that this file works with the currently configured architecture */
- if (up_checkarch(ehdr))
+ if (!up_checkarch(ehdr))
{
berr("Not a supported architecture\n");
return -ENOEXEC;
diff --git a/configs/arduino-mega2560/hello/Make.defs b/configs/arduino-mega2560/hello/Make.defs
index 6371c1a588..fec11c4f53 100644
--- a/configs/arduino-mega2560/hello/Make.defs
+++ b/configs/arduino-mega2560/hello/Make.defs
@@ -48,7 +48,7 @@ ifeq ($(WINTOOL),y)
ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
- # Linux/Cygwin-native toolchain
+ # Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include"
ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx"
diff --git a/configs/arduino-mega2560/nsh/Make.defs b/configs/arduino-mega2560/nsh/Make.defs
index b18a53d33c..3d8ec0331f 100644
--- a/configs/arduino-mega2560/nsh/Make.defs
+++ b/configs/arduino-mega2560/nsh/Make.defs
@@ -48,7 +48,7 @@ ifeq ($(WINTOOL),y)
ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
- # Linux/Cygwin-native toolchain
+ # Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include"
ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx"
diff --git a/configs/arduino-mega2560/scripts/flash.ld b/configs/arduino-mega2560/scripts/flash.ld
index 811a771dd9..a678b45465 100644
--- a/configs/arduino-mega2560/scripts/flash.ld
+++ b/configs/arduino-mega2560/scripts/flash.ld
@@ -140,7 +140,7 @@ SECTIONS
.data :
{
_sdata = ABSOLUTE(.);
- *(.rodata .rodata.*)
+ *(.rodata .rodata.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
diff --git a/configs/cc3200-launchpad/include/board.h b/configs/cc3200-launchpad/include/board.h
index 540eb03190..2b0885beea 100644
--- a/configs/cc3200-launchpad/include/board.h
+++ b/configs/cc3200-launchpad/include/board.h
@@ -145,7 +145,7 @@
* briefly while the assertion is handled. You will probably never see this.
*
* Flashing RED:
- * - In the event of a fatal crash,
+ * - In the event of a fatal crash,
* extinguished and the RED component will FLASH at a 2Hz rate.
*/
/* RED GREEN BLUE */
diff --git a/configs/cc3200-launchpad/include/cc3200_utils.h b/configs/cc3200-launchpad/include/cc3200_utils.h
index 746f806fac..b9149adac5 100644
--- a/configs/cc3200-launchpad/include/cc3200_utils.h
+++ b/configs/cc3200-launchpad/include/cc3200_utils.h
@@ -3,7 +3,7 @@
*
* Copyright (C) 2014 Droidifi LLC. All rights reserved.
* Author: Jim Ewing
- *
+ *
* Adapted from code Copyright (C) 2014 Texas Instruments Incorporated
*
* Redistribution and use in source and binary forms, with or without
diff --git a/configs/cc3200-launchpad/tools/cc3200.cfg b/configs/cc3200-launchpad/tools/cc3200.cfg
index 7657935a7f..94ae8c3a09 100644
--- a/configs/cc3200-launchpad/tools/cc3200.cfg
+++ b/configs/cc3200-launchpad/tools/cc3200.cfg
@@ -5,7 +5,7 @@
# Copyright (C) 2014 Droidifi LLC. All rights reserved.
# Author: Jim Ewing
#
-# Redistributions must retain the above copyright notice and the
+# Redistributions must retain the above copyright notice and the
# following disclaimer.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
@@ -63,7 +63,7 @@ jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
set _TARGETNAME $_CHIPNAME.cpu
-target create $_CHIPNAME.cpu cortex_m -endian little -chain-position $_CHIPNAME.dap
+target create $_CHIPNAME.cpu cortex_m -endian little -chain-position $_CHIPNAME.dap
$_CHIPNAME.cpu configure -work-area-phys 0x20000000 -work-area-size 0x30000 -work-area-backup 0 -coreid 0
source [find mem_helper.tcl]
diff --git a/configs/clicker2-stm32/README.txt b/configs/clicker2-stm32/README.txt
index 4b9693414a..b645cd3372 100644
--- a/configs/clicker2-stm32/README.txt
+++ b/configs/clicker2-stm32/README.txt
@@ -380,7 +380,10 @@ Configurations
NOTES:
- 1. This configuration differs from the mrf24j40-mac configuration in
+ 1. You must must have two clicker2-stm32 boards each with an MRF24J40
+ click board in order to run these tests.
+
+ 2. This configuration differs from the mrf24j40-mac configuration in
that this configuration, like the usbnsh configuration, uses a USB
serial device for console I/O. Such a configuration is useful on the
Clicker2 STM32 which has no builtin RS-232 drivers and eliminates the
@@ -390,14 +393,14 @@ Configurations
differences between the usbnsh or mrf24j40-mac configurations and this
configuration are listed in these NOTES.
- 2. On most serial terminal programs that I have used, the USB
+ 3. On most serial terminal programs that I have used, the USB
connection will be lost when the target board is reset. When that
happens, you may have to reset your serial terminal program to adapt
to the new USB connection. Using TeraTerm, I actually have to exit
the serial program and restart it in order to detect and select the
re-established USB serial connection.
- 3. This configuration does NOT have USART3 output enabled. This
+ 4. This configuration does NOT have USART3 output enabled. This
configuration supports logging of debug output to a circular
buffer in RAM. This feature is discussed fully in this Wiki page:
http://nuttx.org/doku.php?id=wiki:howtos:syslog . Relevant
@@ -426,22 +429,22 @@ Configurations
the system has crashed because (a) it will be unresponsive and (b)
the LD2 will be blinking at about 2Hz.
- 4. IPv6 networking is enabled with TCP/IP, UDP, 6LoWPAN, and NSH
+ 5. IPv6 networking is enabled with TCP/IP, UDP, 6LoWPAN, and NSH
Telnet support.
- 5. Configuration instructions: Basic PAN configuration is the same as
+ 6. Configuration instructions: Basic PAN configuration is the same as
for the ieee802154-mac configuration with the exception that after
the PAN has been configured with the i8sak utility, you must
explicity bring the network up on each node:
nsh> ifup wpan0
- 6. examples/udp is enabled. This will allow two MRF24J40 nodes to
+ 7. examples/udp is enabled. This will allow two MRF24J40 nodes to
exchange UDP packets. Basic instructions:
On the server node:
- nsh> ifconfig wpan0
+ nsh> ifconfig
nsh> udpserver &
The ifconfig command will show the IP address of the server. Then on
@@ -464,14 +467,16 @@ Configurations
E: nsh> ifup wpan0
C: nsh> udpserver &
E: nsh> udpclient &
- E: nsh> dmesg
- 6. examples/nettest is enabled. This will allow two MRF24J40 nodes to
+ The nsh> dmesg command can be use at any time on any node to see
+ any debug output that you have selected.
+
+ 8. examples/nettest is enabled. This will allow two MRF24J40 nodes to
exchange TCP packets. Basic instructions:
On the server node:
- nsh> ifconfig wpan0
+ nsh> ifconfig
nsh> tcpserver &
The ifconfig command will show the IP address of the server. Then on
@@ -480,11 +485,11 @@ Configurations
nsh> tcpclient &
Where is the IP address of the server that you got above.
- NOTE: There is no way to stop the UDP test once it has been started
- other than by resetting the board.
+ NOTE: Unlike the UDP test, there the TCP test will terminate
+ automatically when the packet exchange is complete.
Cheat Sheet. Here is a concise summary of all all the steps needed to
- run the UDP test (C=Coordinator; E=Endpoint):
+ run the TCP test (C=Coordinator; E=Endpoint):
C: nsh> i8 /dev/ieee0 startpan
C: nsh> 8 acceptassoc
@@ -494,14 +499,48 @@ Configurations
E: nsh> ifup wpan0
C: nsh> tcpserver &
E: nsh> tcpclient &
- E: nsh> dmesg
+
+ The nsh> dmesg command can be use at any time on any node to see
+ any debug output that you have selected.
+
+ 9. The NSH Telnet deamon (server) is enabled. However, it cannot be
+ started automatically. Rather, it must be started AFTER the network
+ has been brought up using the NSH 'telnetd' command. You would want
+ to start the Telent daemon only if you want the node to serve Telent
+ connections to an NSH shell on the node.
+
+ nsh> ifconfig
+ nsh> telnetd
+
+ Note the 'ifconfig' is executed to get the IP address of the node.
+ This is necessary because the IP address is assigned by the the
+ Coordinator and may not be known a priori.
+
+ 10. This configuration also includes the Telnet client program. This
+ will allow you to execute a NSH one a node from the command line on
+ a different node. Like:
+
+ nsh> telnet
+
+ Where is the IP address of the server that you got for
+ the ifconfig commna on the remote node. Once the telnet session
+ has been started, you can end the session with:
+
+ nsh> exit
+
+ Cheat Sheet. Here is a concise summary of all all the steps needed to
+ run the TCP test (C=Coordinator; E=Endpoint):
+
+ C: nsh> i8 /dev/ieee0 startpan
+ C: nsh> 8 acceptassoc
+ E: nsh> i8 assoc
+ C: nsh> ifup wpan0
+ C: nsh> ifconfig <-- To get the
+ E: nsh> ifup wpan0
+ C: nsh> telnetd <-- Starts the Telnet daemon
+ E: nsh> telnet <-- Runs the Telnet client
STATUS:
- 2017-06-19: The Telnet Daemon does not start. This is simply because
- the daemon is started too early in the sequence... before the network
- has been brought up:
-
- telnetd_daemon: ERROR: socket failure: 106
2017-06-21: Basic UDP functionality has been achieved with HC06
compression and short address. Additional testing is required for
@@ -519,6 +558,11 @@ Configurations
2017-06-26: Verified with HC06 and extended addressing and HC1 with
both addressing modes.
+ 2017-06-27: Added the Telnet client application to the configuration.
+ Initial testing reveal a problem that required re-design of the
+ Telnet daemon: It did not yet support IPv6! But after adding this
+ support, Telnet worked just fine.
+
Test Matrix:
The following configurations have been tested:
@@ -531,6 +575,8 @@ Configurations
extended 6/23 6/26
ipv6 short --- ---
extended --- ---
+ telnet short N/A 6/27 (hc06)
+ extended N/A ---
Other configuration options have not been specifically addressed
(such non-compressable ports, non-MAC based IPv6 addresses, etc.)
@@ -541,6 +587,80 @@ Configurations
potentially be verifying only that the design is implemented
incorrectly in compatible way on both the client and server sides.
+ mrf24j40-starhub and mrf24j40-starpoint
+
+ These two configurations implement hub and and star endpoint in a
+ star topology. Both configurations derive from the mrf24j40-6lowpan
+ configuration and most of the notes there apply here as well.
+
+ 1. You must must have three clicker2-stm32 boards each with an MRF24J40
+ click board in order to run these tests: One that servers as the
+ star hub and at least two star endpoints.
+
+ 2. The star point configuration differs from the primarily in the
+ mrf24j40-6lowpan in following is also set:
+
+ CONFIG_NET_STAR=y
+ CONFIG_NET_STARPOINT=y
+
+ The CONFIG_NET_STARPOINT selection informs the endpoint that is
+ must send all frames to the hub of the star, rather than directly
+ to the recipient.
+
+ The star hub configuration, on the other hand, differs from the
+ mrf24j40-6lowpan in these fundamental ways:
+
+ CONFIG_NET_STAR=y
+ CONFIG_NET_STARHUB=y
+ CONFIG_NET_IPFORWARD=y
+
+ The CONFIG_NET_IPFORWARD selection informs the hub that if it
+ receives any packets that are not destined for the hub, it should
+ forward those packets appropriately.
+
+ 3. Telnet: The star point configuration supports the Telnet daemon,
+ but not the Telnet client; the star hub configuration supports
+ the Telnet client, but not the Telnet daemon. Therefore, the
+ star hub can Telnet to any point in the star, the star endpoints
+ cannot initiate telnet sessions.
+
+ 4. TCP and UDP Tests: The same TCP and UDP tests as described for
+ the mrf24j40-6lowpan coniguration are supported on the star
+ endpoints, but NOT on the star hub. Therefore, all network testing
+ is between endpoints with the hub acting, well, only like a hub.
+
+ The modified usage of the TCP test is show below with E1 E2
+ representing the two star endpoints and C: representing the
+ coordinator/hub.
+
+ C: nsh> i8 /dev/ieee0 startpan
+ C: nsh> 8 acceptassoc
+ E1: nsh> i8 assoc
+ E2: nsh> i8 assoc
+ C: nsh> ifup wpan0
+ E1: nsh> ifup wpan0
+ E1: nsh> ifconfig <-- To get the IP address of E1 endpoint
+ E1: nsh> telnetd <-- Starts the Telnet daemon
+ E2: nsh> ifup wpan0
+ E2: nsh> ifconfig <-- To get the IP address of E2 endpoint
+ E2: nsh> telnetd <-- Starts the Telnet daemon
+ E1: nsh> tcpserver &
+ E2: nsh> tcpclient &
+
+ Where is the IP address of the E1 endpoint.
+
+ The nsh> dmesg command can be use at any time on any node to see
+ any debug output that you have selected.
+
+ Telenet sessions may be initiated from the hub:
+
+ C: nsh> telnet <-- Runs the Telnet client
+
+ Where is the IP address of either the E1 or I2 endpoints.
+
+ STATUS:
+ 2017-06-29: Configurations added but not yet tested.
+
nsh:
Configures the NuttShell (nsh) located at examples/nsh. This
diff --git a/configs/clicker2-stm32/mrf24j40-6lowpan/defconfig b/configs/clicker2-stm32/mrf24j40-6lowpan/defconfig
index 2db84d87d7..dae73e4ea3 100644
--- a/configs/clicker2-stm32/mrf24j40-6lowpan/defconfig
+++ b/configs/clicker2-stm32/mrf24j40-6lowpan/defconfig
@@ -735,7 +735,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
#
# Device Drivers
#
-CONFIG_DISABLE_POLL=y
+# CONFIG_DISABLE_POLL is not set
CONFIG_DEV_NULL=y
# CONFIG_DEV_ZERO is not set
# CONFIG_DEV_URANDOM is not set
@@ -858,6 +858,7 @@ CONFIG_SERIAL_REMOVABLE=y
# CONFIG_OTHER_UART_SERIALDRIVER is not set
# CONFIG_MCU_SERIAL is not set
CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
# CONFIG_SERIAL_IFLOWCONTROL is not set
# CONFIG_SERIAL_OFLOWCONTROL is not set
# CONFIG_SERIAL_DMA is not set
@@ -926,6 +927,7 @@ CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=8192
# CONFIG_RAMLOG_CRLF is not set
CONFIG_RAMLOG_NONBLOCKING=y
+CONFIG_RAMLOG_NPOLLWAITERS=4
# CONFIG_SYSLOG_INTBUFFER is not set
# CONFIG_SYSLOG_TIMESTAMP is not set
# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
@@ -990,6 +992,9 @@ CONFIG_NET_6LOWPAN_MAXAGE=20
CONFIG_NET_6LOWPAN_MAX_MACTRANSMITS=4
CONFIG_NET_6LOWPAN_MTU=1294
CONFIG_NET_6LOWPAN_TCP_RECVWNDO=1220
+CONFIG_NET_HAVE_STAR=y
+# CONFIG_NET_IPFORWARD is not set
+# CONFIG_NET_STAR is not set
#
# Socket Support
@@ -1146,6 +1151,7 @@ CONFIG_MAC802154_HPWORK=y
# CONFIG_MAC802154_LPWORK is not set
CONFIG_MAC802154_NTXDESC=32
CONFIG_MAC802154_NNOTIF=48
+CONFIG_MAC802154_NPANDESC=5
CONFIG_IEEE802154_IND_PREALLOC=32
CONFIG_IEEE802154_IND_IRQRESERVE=10
CONFIG_IEEE802154_MACDEV=y
@@ -1330,14 +1336,13 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
# CONFIG_EXAMPLES_MODBUS is not set
# CONFIG_EXAMPLES_MOUNT is not set
CONFIG_EXAMPLES_NETTEST=y
+CONFIG_EXAMPLES_NETTEST_SENDSIZE=4096
CONFIG_EXAMPLES_NETTEST_STACKSIZE1=2048
CONFIG_EXAMPLES_NETTEST_PRIORITY1=100
# CONFIG_EXAMPLES_NETTEST_SERVER1 is not set
CONFIG_EXAMPLES_NETTEST_TARGET2=y
CONFIG_EXAMPLES_NETTEST_PRIORITY2=100
CONFIG_EXAMPLES_NETTEST_STACKSIZE2=2048
-CONFIG_EXAMPLES_NETTEST_DAEMON_STACKSIZE=2048
-CONFIG_EXAMPLES_NETTEST_DEAMON_PRIORITY=100
CONFIG_EXAMPLES_NETTEST_DEVNAME="wpan0"
# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set
CONFIG_EXAMPLES_NETTEST_IPv6=y
@@ -1418,6 +1423,7 @@ CONFIG_EXAMPLES_UDP_CLIENT_PORTNO=61617
# CONFIG_EXAMPLES_WATCHDOG is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
# CONFIG_EXAMPLES_XBC_TEST is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
#
# File System Utilities
@@ -1453,15 +1459,18 @@ CONFIG_EXAMPLES_UDP_CLIENT_PORTNO=61617
#
# Network Utilities
#
+# CONFIG_NETUTILS_CHAT is not set
# CONFIG_NETUTILS_CODECS is not set
# CONFIG_NETUTILS_DISCOVER is not set
# CONFIG_NETUTILS_ESP8266 is not set
# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
# CONFIG_NETUTILS_JSON is not set
CONFIG_NETUTILS_NETLIB=y
# CONFIG_NETUTILS_NTPCLIENT is not set
# CONFIG_NETUTILS_PPPD is not set
# CONFIG_NETUTILS_SMTP is not set
+CONFIG_NETUTILS_TELNETC=y
CONFIG_NETUTILS_TELNETD=y
# CONFIG_NETUTILS_TFTPC is not set
# CONFIG_NETUTILS_WEBCLIENT is not set
@@ -1534,6 +1543,7 @@ CONFIG_NSH_DISABLE_PUT=y
# CONFIG_NSH_DISABLE_SLEEP is not set
# CONFIG_NSH_DISABLE_TIME is not set
# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_TELNETD is not set
# CONFIG_NSH_DISABLE_UMOUNT is not set
# CONFIG_NSH_DISABLE_UNAME is not set
# CONFIG_NSH_DISABLE_UNSET is not set
@@ -1621,6 +1631,10 @@ CONFIG_READLINE_ECHO=y
# CONFIG_SYSTEM_SUDOKU is not set
# CONFIG_SYSTEM_SYSTEM is not set
# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_TELNET_CHATD is not set
+CONFIG_SYSTEM_TELNET_CLIENT=y
+CONFIG_SYSTEM_TELNET_CLIENT_STACKSIZE=2048
+CONFIG_SYSTEM_TELNET_CLIENT_PRIORITY=100
# CONFIG_SYSTEM_UBLOXMODEM is not set
# CONFIG_SYSTEM_VI is not set
# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/clicker2-stm32/mrf24j40-starhub/Make.defs b/configs/clicker2-stm32/mrf24j40-starhub/Make.defs
new file mode 100644
index 0000000000..f8247ecaba
--- /dev/null
+++ b/configs/clicker2-stm32/mrf24j40-starhub/Make.defs
@@ -0,0 +1,122 @@
+############################################################################
+# configs/clicker2-stm32/mrf24j40-starhub/Make.defs
+#
+# Copyright (C) 2017 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = flash.ld
+
+ifeq ($(WINTOOL),y)
+ # Windows-native toolchains
+ DIRLINK = $(TOPDIR)/tools/copydir.sh
+ DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+ MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+ ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+ ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+ ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+ # Linux/Cygwin-native toolchain
+ MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+ ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+ ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+ ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+ ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+ LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+ LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/clicker2-stm32/mrf24j40-starhub/defconfig b/configs/clicker2-stm32/mrf24j40-starhub/defconfig
new file mode 100644
index 0000000000..45000c97af
--- /dev/null
+++ b/configs/clicker2-stm32/mrf24j40-starhub/defconfig
@@ -0,0 +1,1594 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+# CONFIG_DFU_BINARY is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F0 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_XMC4 is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEXR5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L152CC is not set
+# CONFIG_ARCH_CHIP_STM32L152RC is not set
+# CONFIG_ARCH_CHIP_STM32L152VC is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F334K4 is not set
+# CONFIG_ARCH_CHIP_STM32F334K6 is not set
+# CONFIG_ARCH_CHIP_STM32F334K8 is not set
+# CONFIG_ARCH_CHIP_STM32F334C4 is not set
+# CONFIG_ARCH_CHIP_STM32F334C6 is not set
+# CONFIG_ARCH_CHIP_STM32F334C8 is not set
+# CONFIG_ARCH_CHIP_STM32F334R4 is not set
+# CONFIG_ARCH_CHIP_STM32F334R6 is not set
+# CONFIG_ARCH_CHIP_STM32F334R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F410RB is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+CONFIG_ARCH_CHIP_STM32F407VG=y
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F33XX is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F410 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_HRTIM1 is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+# CONFIG_STM32_HAVE_COMP1 is not set
+# CONFIG_STM32_HAVE_COMP2 is not set
+# CONFIG_STM32_HAVE_COMP3 is not set
+# CONFIG_STM32_HAVE_COMP4 is not set
+# CONFIG_STM32_HAVE_COMP5 is not set
+# CONFIG_STM32_HAVE_COMP6 is not set
+# CONFIG_STM32_HAVE_COMP7 is not set
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+CONFIG_STM32_HAVE_I2S3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_HAVE_OPAMP1 is not set
+# CONFIG_STM32_HAVE_OPAMP2 is not set
+# CONFIG_STM32_HAVE_OPAMP3 is not set
+# CONFIG_STM32_HAVE_OPAMP4 is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_OPAMP is not set
+CONFIG_STM32_OTGFS=y
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+CONFIG_STM32_SPI3=y
+# CONFIG_STM32_I2S3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_FLASH_WORKAROUND_DATA_CACHE_CORRUPTION_ON_RWW is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+CONFIG_STM32_CCMEXCLUDE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+# CONFIG_ARCH_TOOLCHAIN_IAR is not set
+CONFIG_ARCH_TOOLCHAIN_GNU=y
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_HAVE_RTC_SUBSECONDS is not set
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=131072
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_CLICKER2_STM32=y
+# CONFIG_ARCH_BOARD_STM32F4_DISCOVERY is not set
+# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="clicker2-stm32"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_ARCH_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+CONFIG_CLICKER2_STM32_MB1_SPI=y
+# CONFIG_CLICKER2_STM32_MB2_SPI is not set
+CONFIG_CLICKER2_STM32_MB1_BEE=y
+# CONFIG_CLICKER2_STM32_MB2_BEE is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=32
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_PTHREAD_MUTEX_TYPES is not set
+CONFIG_PTHREAD_MUTEX_ROBUST=y
+# CONFIG_PTHREAD_MUTEX_UNSAFE is not set
+# CONFIG_PTHREAD_MUTEX_BOTH is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+# CONFIG_DEV_CONSOLE is not set
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+CONFIG_BOARD_INITIALIZE=y
+# CONFIG_BOARD_INITTHREAD is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_LPNTHREADS=1
+CONFIG_SCHED_LPWORKPRIORITY=160
+CONFIG_SCHED_LPWORKPERIOD=50000
+CONFIG_SCHED_LPWORKSTACKSIZE=2048
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+CONFIG_NETDEV_TELNET=y
+CONFIG_TELNET_RXBUFFER_SIZE=256
+CONFIG_TELNET_TXBUFFER_SIZE=256
+# CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+CONFIG_NETDEV_STATISTICS=y
+CONFIG_NETDEV_LATEINIT=y
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+# CONFIG_MCU_SERIAL is not set
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
+CONFIG_USBDEV=y
+
+#
+# USB Device Controller Driver Options
+#
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+# CONFIG_USBDEV_DUALSPEED is not set
+CONFIG_USBDEV_SELFPOWERED=y
+# CONFIG_USBDEV_BUSPOWERED is not set
+CONFIG_USBDEV_MAXPOWER=100
+# CONFIG_USBDEV_DMA is not set
+# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
+# CONFIG_USBDEV_TRACE is not set
+
+#
+# USB Device Class Driver Options
+#
+# CONFIG_USBDEV_COMPOSITE is not set
+# CONFIG_PL2303 is not set
+CONFIG_CDCACM=y
+CONFIG_CDCACM_CONSOLE=y
+CONFIG_CDCACM_EP0MAXPACKET=64
+CONFIG_CDCACM_EPINTIN=1
+CONFIG_CDCACM_EPINTIN_FSSIZE=64
+CONFIG_CDCACM_EPINTIN_HSSIZE=64
+CONFIG_CDCACM_EPBULKOUT=3
+CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
+CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
+CONFIG_CDCACM_EPBULKIN=2
+CONFIG_CDCACM_EPBULKIN_FSSIZE=64
+CONFIG_CDCACM_EPBULKIN_HSSIZE=512
+CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
+CONFIG_CDCACM_BULKIN_REQLEN=96
+CONFIG_CDCACM_RXBUFSIZE=256
+CONFIG_CDCACM_TXBUFSIZE=256
+CONFIG_CDCACM_VENDORID=0x0525
+CONFIG_CDCACM_PRODUCTID=0xa4a7
+CONFIG_CDCACM_VENDORSTR="NuttX"
+CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
+# CONFIG_USBMSC is not set
+# CONFIG_USBHOST is not set
+# CONFIG_USBMISC is not set
+# CONFIG_HAVE_USBTRACE is not set
+CONFIG_DRIVERS_WIRELESS=y
+# CONFIG_WL_CC1101 is not set
+# CONFIG_WL_CC3000 is not set
+CONFIG_DRIVERS_IEEE802154=y
+CONFIG_IEEE802154_MRF24J40=y
+# CONFIG_IEEE802154_AT86RF233 is not set
+# CONFIG_DRIVERS_IEEE80211 is not set
+# CONFIG_WL_NRF24L01 is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_SYSLOG_WRITE is not set
+CONFIG_RAMLOG=y
+CONFIG_RAMLOG_BUFSIZE=8192
+# CONFIG_RAMLOG_CRLF is not set
+CONFIG_RAMLOG_NONBLOCKING=y
+CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+# CONFIG_ARCH_HAVE_PHY is not set
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NET_6LOWPAN=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+# CONFIG_NET_USRSOCK is not set
+
+#
+# Network Device Operations
+#
+CONFIG_NETDEV_IOCTL=y
+# CONFIG_NETDEV_PHY_IOCTL is not set
+CONFIG_NETDEV_WIRELESS_IOCTL=y
+
+#
+# Internet Protocol Selection
+#
+# CONFIG_NET_IPv4 is not set
+CONFIG_NET_IPv6=y
+CONFIG_NET_IPv6_NCONF_ENTRIES=8
+
+#
+# 6LoWPAN Configuration
+#
+CONFIG_NET_6LOWPAN_FRAG=y
+CONFIG_NET_6LOWPAN_FRAMELEN=127
+# CONFIG_NET_6LOWPAN_COMPRESSION_IPv6 is not set
+# CONFIG_NET_6LOWPAN_COMPRESSION_HC1 is not set
+CONFIG_NET_6LOWPAN_COMPRESSION_HC06=y
+CONFIG_NET_6LOWPAN_COMPRESSION_THRESHOLD=63
+CONFIG_NET_6LOWPAN_MAXADDRCONTEXT=1
+CONFIG_NET_6LOWPAN_MAXADDRCONTEXT_PREFIX_0_0=0xaa
+CONFIG_NET_6LOWPAN_MAXADDRCONTEXT_PREFIX_0_1=0xaa
+# CONFIG_NET_6LOWPAN_MAXADDRCONTEXT_PREINIT_1 is not set
+# CONFIG_NET_6LOWPAN_EXTENDEDADDR is not set
+CONFIG_NET_6LOWPAN_MAXAGE=20
+CONFIG_NET_6LOWPAN_MAX_MACTRANSMITS=4
+CONFIG_NET_6LOWPAN_MTU=1294
+CONFIG_NET_6LOWPAN_TCP_RECVWNDO=1220
+CONFIG_NET_HAVE_STAR=y
+CONFIG_NET_IPFORWARD=y
+CONFIG_NET_STAR=y
+# CONFIG_NET_STARPOINT is not set
+CONFIG_NET_STARHUB=y
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=8
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+# CONFIG_NET_SOLINGER is not set
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCP_NO_STACK is not set
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=8
+CONFIG_NET_MAX_LISTENPORTS=20
+CONFIG_NET_TCP_READAHEAD=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_TCP_NWRBCHAINS=8
+CONFIG_NET_TCP_RECVDELAY=0
+CONFIG_NET_TCPBACKLOG=y
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+# CONFIG_NET_UDP_NO_STACK is not set
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMPv6 Networking Support
+#
+# CONFIG_NET_ICMPv6 is not set
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+
+#
+# User-space networking stack API
+#
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+CONFIG_NET_STATISTICS=y
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME="MRF24J40"
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_AIO is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_NET is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Common I/O Buffer Support
+#
+CONFIG_MM_IOB=y
+CONFIG_IOB_NBUFFERS=32
+CONFIG_IOB_BUFSIZE=128
+CONFIG_IOB_NCHAINS=16
+CONFIG_IOB_THROTTLE=8
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_IEEE802154=y
+CONFIG_IEEE802154_DEFAULT_EADDR=0x00fade00deadbeef
+CONFIG_MAC802154_HPWORK=y
+# CONFIG_MAC802154_LPWORK is not set
+CONFIG_MAC802154_NTXDESC=32
+CONFIG_MAC802154_NNOTIF=48
+CONFIG_MAC802154_NPANDESC=5
+CONFIG_IEEE802154_IND_PREALLOC=32
+CONFIG_IEEE802154_IND_IRQRESERVE=10
+CONFIG_IEEE802154_MACDEV=y
+CONFIG_IEEE802154_MACDEV_RECVRPRIO=0
+CONFIG_IEEE802154_NETDEV=y
+CONFIG_IEEE802154_NETDEV_RECVRPRIO=1
+# CONFIG_IEEE802154_NETDEV_HPWORK is not set
+CONFIG_IEEE802154_NETDEV_LPWORK=y
+# CONFIG_IEEE802154_LOOPBACK is not set
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_LIBM is not set
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+
+#
+# Program Execution Options
+#
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+
+#
+# errno Decode Support
+#
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
+# CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+CONFIG_LIBC_NETDB=y
+
+#
+# NETDB Support
+#
+# CONFIG_NETDB_HOSTFILE is not set
+# CONFIG_NETDB_DNSCLIENT is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# LLVM C++ Library (libcxx)
+#
+# CONFIG_LIBCXX is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NETTEST is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_STAT is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_XBC_TEST is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+CONFIG_NETUTILS_TELNETC=y
+# CONFIG_NETUTILS_TELNETD is not set
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+CONFIG_NSH_DISABLE_GET=y
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+CONFIG_NSH_DISABLE_PUT=y
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_TELNETD is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+CONFIG_NSH_DISABLE_WGET=y
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_USBCONSOLE is not set
+# CONFIG_NSH_ALTCONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+
+#
+# Networking Configuration
+#
+CONFIG_NSH_NETINIT=y
+CONFIG_NSH_NETLOCAL=y
+CONFIG_NSH_NOMAC=y
+CONFIG_NSH_SWMAC=y
+CONFIG_NSH_MACADDR=0x00fade00deadbeef
+CONFIG_NSH_MAX_ROUNDTRIP=20
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+CONFIG_HAVE_CXXINITIALIZE=y
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_NTPC is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_TELNET_CHATD is not set
+CONFIG_SYSTEM_TELNET_CLIENT=y
+CONFIG_SYSTEM_TELNET_CLIENT_STACKSIZE=2048
+CONFIG_SYSTEM_TELNET_CLIENT_PRIORITY=100
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
+
+#
+# Wireless Libraries and NSH Add-Ons
+#
+
+#
+# IEEE 802.15.4 applications
+#
+CONFIG_IEEE802154_LIBMAC=y
+CONFIG_IEEE802154_LIBUTILS=y
+CONFIG_IEEE802154_I8SAK=y
+CONFIG_IEEE802154_I8SAK_PRIORITY=100
+CONFIG_IEEE802154_I8SAK_STACKSIZE=2048
+# CONFIG_WIRELESS_IWPAN is not set
diff --git a/configs/clicker2-stm32/mrf24j40-starpoint/Make.defs b/configs/clicker2-stm32/mrf24j40-starpoint/Make.defs
new file mode 100644
index 0000000000..e8c5acf1ce
--- /dev/null
+++ b/configs/clicker2-stm32/mrf24j40-starpoint/Make.defs
@@ -0,0 +1,122 @@
+############################################################################
+# configs/clicker2-stm32/mrf24j40-starpoint/Make.defs
+#
+# Copyright (C) 2017 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = flash.ld
+
+ifeq ($(WINTOOL),y)
+ # Windows-native toolchains
+ DIRLINK = $(TOPDIR)/tools/copydir.sh
+ DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+ MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+ ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+ ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+ ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+ # Linux/Cygwin-native toolchain
+ MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+ ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+ ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+ ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+ ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+# Loadable module definitions
+
+CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
+
+LDMODULEFLAGS = -r -e module_initialize
+ifeq ($(WINTOOL),y)
+ LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
+else
+ LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
+endif
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/configs/clicker2-stm32/mrf24j40-starpoint/defconfig b/configs/clicker2-stm32/mrf24j40-starpoint/defconfig
new file mode 100644
index 0000000000..99c76b0ead
--- /dev/null
+++ b/configs/clicker2-stm32/mrf24j40-starpoint/defconfig
@@ -0,0 +1,1654 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+# CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+# CONFIG_DFU_BINARY is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG_ALERT=y
+# CONFIG_DEBUG_FEATURES is not set
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_HEAP_COLORATION is not set
+# CONFIG_DEBUG_SYMBOLS is not set
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+# CONFIG_DEBUG_NOOPT is not set
+# CONFIG_DEBUG_CUSTOMOPT is not set
+CONFIG_DEBUG_FULLOPT=y
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_MISOC is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_RISCV is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_XTENSA is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STM32F0 is not set
+# CONFIG_ARCH_CHIP_STM32F7 is not set
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_XMC4 is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM23 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM33 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXM7 is not set
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEXR5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_HAVE_DPFPU is not set
+CONFIG_ARCH_FPU=y
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_HAVE_ICACHE is not set
+# CONFIG_ARMV7M_HAVE_DCACHE is not set
+# CONFIG_ARMV7M_HAVE_ITCM is not set
+# CONFIG_ARMV7M_HAVE_DTCM is not set
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32L152CC is not set
+# CONFIG_ARCH_CHIP_STM32L152RC is not set
+# CONFIG_ARCH_CHIP_STM32L152VC is not set
+# CONFIG_ARCH_CHIP_STM32L162ZD is not set
+# CONFIG_ARCH_CHIP_STM32L162VE is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F102CB is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103RC is not set
+# CONFIG_ARCH_CHIP_STM32F103RD is not set
+# CONFIG_ARCH_CHIP_STM32F103RE is not set
+# CONFIG_ARCH_CHIP_STM32F103RG is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103VC is not set
+# CONFIG_ARCH_CHIP_STM32F103VE is not set
+# CONFIG_ARCH_CHIP_STM32F103ZE is not set
+# CONFIG_ARCH_CHIP_STM32F105VB is not set
+# CONFIG_ARCH_CHIP_STM32F105RB is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F205RG is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302K6 is not set
+# CONFIG_ARCH_CHIP_STM32F302K8 is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303K6 is not set
+# CONFIG_ARCH_CHIP_STM32F303K8 is not set
+# CONFIG_ARCH_CHIP_STM32F303C6 is not set
+# CONFIG_ARCH_CHIP_STM32F303C8 is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303RD is not set
+# CONFIG_ARCH_CHIP_STM32F303RE is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F334K4 is not set
+# CONFIG_ARCH_CHIP_STM32F334K6 is not set
+# CONFIG_ARCH_CHIP_STM32F334K8 is not set
+# CONFIG_ARCH_CHIP_STM32F334C4 is not set
+# CONFIG_ARCH_CHIP_STM32F334C6 is not set
+# CONFIG_ARCH_CHIP_STM32F334C8 is not set
+# CONFIG_ARCH_CHIP_STM32F334R4 is not set
+# CONFIG_ARCH_CHIP_STM32F334R6 is not set
+# CONFIG_ARCH_CHIP_STM32F334R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372C8 is not set
+# CONFIG_ARCH_CHIP_STM32F372R8 is not set
+# CONFIG_ARCH_CHIP_STM32F372V8 is not set
+# CONFIG_ARCH_CHIP_STM32F372CB is not set
+# CONFIG_ARCH_CHIP_STM32F372RB is not set
+# CONFIG_ARCH_CHIP_STM32F372VB is not set
+# CONFIG_ARCH_CHIP_STM32F372CC is not set
+# CONFIG_ARCH_CHIP_STM32F372RC is not set
+# CONFIG_ARCH_CHIP_STM32F372VC is not set
+# CONFIG_ARCH_CHIP_STM32F373C8 is not set
+# CONFIG_ARCH_CHIP_STM32F373R8 is not set
+# CONFIG_ARCH_CHIP_STM32F373V8 is not set
+# CONFIG_ARCH_CHIP_STM32F373CB is not set
+# CONFIG_ARCH_CHIP_STM32F373RB is not set
+# CONFIG_ARCH_CHIP_STM32F373VB is not set
+# CONFIG_ARCH_CHIP_STM32F373CC is not set
+# CONFIG_ARCH_CHIP_STM32F373RC is not set
+# CONFIG_ARCH_CHIP_STM32F373VC is not set
+# CONFIG_ARCH_CHIP_STM32F401RE is not set
+# CONFIG_ARCH_CHIP_STM32F410RB is not set
+# CONFIG_ARCH_CHIP_STM32F411RE is not set
+# CONFIG_ARCH_CHIP_STM32F411VE is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+CONFIG_ARCH_CHIP_STM32F407VG=y
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+# CONFIG_ARCH_CHIP_STM32F429Z is not set
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_ARCH_CHIP_STM32F446M is not set
+# CONFIG_ARCH_CHIP_STM32F446R is not set
+# CONFIG_ARCH_CHIP_STM32F446V is not set
+# CONFIG_ARCH_CHIP_STM32F446Z is not set
+# CONFIG_ARCH_CHIP_STM32F469A is not set
+# CONFIG_ARCH_CHIP_STM32F469I is not set
+# CONFIG_ARCH_CHIP_STM32F469B is not set
+# CONFIG_ARCH_CHIP_STM32F469N is not set
+CONFIG_STM32_FLASH_CONFIG_DEFAULT=y
+# CONFIG_STM32_FLASH_CONFIG_4 is not set
+# CONFIG_STM32_FLASH_CONFIG_6 is not set
+# CONFIG_STM32_FLASH_CONFIG_8 is not set
+# CONFIG_STM32_FLASH_CONFIG_B is not set
+# CONFIG_STM32_FLASH_CONFIG_C is not set
+# CONFIG_STM32_FLASH_CONFIG_D is not set
+# CONFIG_STM32_FLASH_CONFIG_E is not set
+# CONFIG_STM32_FLASH_CONFIG_F is not set
+# CONFIG_STM32_FLASH_CONFIG_G is not set
+# CONFIG_STM32_FLASH_CONFIG_I is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_USBACCESSLINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F205 is not set
+# CONFIG_STM32_STM32F207 is not set
+# CONFIG_STM32_STM32F30XX is not set
+# CONFIG_STM32_STM32F302 is not set
+# CONFIG_STM32_STM32F303 is not set
+# CONFIG_STM32_STM32F33XX is not set
+# CONFIG_STM32_STM32F37XX is not set
+CONFIG_STM32_STM32F40XX=y
+# CONFIG_STM32_STM32F401 is not set
+# CONFIG_STM32_STM32F410 is not set
+# CONFIG_STM32_STM32F411 is not set
+# CONFIG_STM32_STM32F405 is not set
+CONFIG_STM32_STM32F407=y
+# CONFIG_STM32_STM32F427 is not set
+# CONFIG_STM32_STM32F429 is not set
+# CONFIG_STM32_STM32F446 is not set
+# CONFIG_STM32_STM32F469 is not set
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32_HAVE_CCM=y
+# CONFIG_STM32_HAVE_USBDEV is not set
+CONFIG_STM32_HAVE_OTGFS=y
+CONFIG_STM32_HAVE_FSMC=y
+# CONFIG_STM32_HAVE_HRTIM1 is not set
+# CONFIG_STM32_HAVE_LTDC is not set
+CONFIG_STM32_HAVE_USART3=y
+CONFIG_STM32_HAVE_UART4=y
+CONFIG_STM32_HAVE_UART5=y
+CONFIG_STM32_HAVE_USART6=y
+# CONFIG_STM32_HAVE_UART7 is not set
+# CONFIG_STM32_HAVE_UART8 is not set
+CONFIG_STM32_HAVE_TIM1=y
+CONFIG_STM32_HAVE_TIM2=y
+CONFIG_STM32_HAVE_TIM3=y
+CONFIG_STM32_HAVE_TIM4=y
+CONFIG_STM32_HAVE_TIM5=y
+CONFIG_STM32_HAVE_TIM6=y
+CONFIG_STM32_HAVE_TIM7=y
+CONFIG_STM32_HAVE_TIM8=y
+CONFIG_STM32_HAVE_TIM9=y
+CONFIG_STM32_HAVE_TIM10=y
+CONFIG_STM32_HAVE_TIM11=y
+CONFIG_STM32_HAVE_TIM12=y
+CONFIG_STM32_HAVE_TIM13=y
+CONFIG_STM32_HAVE_TIM14=y
+# CONFIG_STM32_HAVE_TIM15 is not set
+# CONFIG_STM32_HAVE_TIM16 is not set
+# CONFIG_STM32_HAVE_TIM17 is not set
+CONFIG_STM32_HAVE_ADC2=y
+CONFIG_STM32_HAVE_ADC3=y
+# CONFIG_STM32_HAVE_ADC4 is not set
+# CONFIG_STM32_HAVE_ADC1_DMA is not set
+# CONFIG_STM32_HAVE_ADC2_DMA is not set
+# CONFIG_STM32_HAVE_ADC3_DMA is not set
+# CONFIG_STM32_HAVE_ADC4_DMA is not set
+# CONFIG_STM32_HAVE_SDADC1 is not set
+# CONFIG_STM32_HAVE_SDADC2 is not set
+# CONFIG_STM32_HAVE_SDADC3 is not set
+# CONFIG_STM32_HAVE_SDADC1_DMA is not set
+# CONFIG_STM32_HAVE_SDADC2_DMA is not set
+# CONFIG_STM32_HAVE_SDADC3_DMA is not set
+CONFIG_STM32_HAVE_CAN1=y
+CONFIG_STM32_HAVE_CAN2=y
+# CONFIG_STM32_HAVE_COMP1 is not set
+# CONFIG_STM32_HAVE_COMP2 is not set
+# CONFIG_STM32_HAVE_COMP3 is not set
+# CONFIG_STM32_HAVE_COMP4 is not set
+# CONFIG_STM32_HAVE_COMP5 is not set
+# CONFIG_STM32_HAVE_COMP6 is not set
+# CONFIG_STM32_HAVE_COMP7 is not set
+CONFIG_STM32_HAVE_DAC1=y
+CONFIG_STM32_HAVE_DAC2=y
+CONFIG_STM32_HAVE_RNG=y
+CONFIG_STM32_HAVE_ETHMAC=y
+CONFIG_STM32_HAVE_I2C2=y
+CONFIG_STM32_HAVE_I2C3=y
+CONFIG_STM32_HAVE_SPI2=y
+CONFIG_STM32_HAVE_SPI3=y
+CONFIG_STM32_HAVE_I2S3=y
+# CONFIG_STM32_HAVE_SPI4 is not set
+# CONFIG_STM32_HAVE_SPI5 is not set
+# CONFIG_STM32_HAVE_SPI6 is not set
+# CONFIG_STM32_HAVE_SAIPLL is not set
+# CONFIG_STM32_HAVE_I2SPLL is not set
+# CONFIG_STM32_HAVE_OPAMP1 is not set
+# CONFIG_STM32_HAVE_OPAMP2 is not set
+# CONFIG_STM32_HAVE_OPAMP3 is not set
+# CONFIG_STM32_HAVE_OPAMP4 is not set
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+# CONFIG_STM32_FSMC is not set
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_OPAMP is not set
+CONFIG_STM32_OTGFS=y
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+# CONFIG_STM32_RNG is not set
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+CONFIG_STM32_SPI3=y
+# CONFIG_STM32_I2S3 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+# CONFIG_STM32_USART1 is not set
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+# CONFIG_STM32_NOEXT_VECTORS is not set
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_FLASH_WORKAROUND_DATA_CACHE_CORRUPTION_ON_RWW is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+CONFIG_STM32_CCMEXCLUDE=y
+
+#
+# Timer Configuration
+#
+# CONFIG_STM32_ONESHOT is not set
+# CONFIG_STM32_FREERUN is not set
+# CONFIG_STM32_TIM1_CAP is not set
+# CONFIG_STM32_TIM2_CAP is not set
+# CONFIG_STM32_TIM3_CAP is not set
+# CONFIG_STM32_TIM4_CAP is not set
+# CONFIG_STM32_TIM5_CAP is not set
+# CONFIG_STM32_TIM8_CAP is not set
+# CONFIG_STM32_TIM9_CAP is not set
+# CONFIG_STM32_TIM10_CAP is not set
+# CONFIG_STM32_TIM11_CAP is not set
+# CONFIG_STM32_TIM12_CAP is not set
+# CONFIG_STM32_TIM13_CAP is not set
+# CONFIG_STM32_TIM14_CAP is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+# CONFIG_STM32_HAVE_RTC_COUNTER is not set
+# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set
+
+#
+# USB FS Host Configuration
+#
+
+#
+# USB HS Host Configuration
+#
+
+#
+# USB Host Debug Configuration
+#
+
+#
+# USB Device Configuration
+#
+# CONFIG_ARCH_TOOLCHAIN_IAR is not set
+CONFIG_ARCH_TOOLCHAIN_GNU=y
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+CONFIG_ARCH_HAVE_RESET=y
+# CONFIG_ARCH_HAVE_RTC_SUBSECONDS is not set
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=131072
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_CLICKER2_STM32=y
+# CONFIG_ARCH_BOARD_STM32F4_DISCOVERY is not set
+# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="clicker2-stm32"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+CONFIG_ARCH_IRQBUTTONS=y
+
+#
+# Board-Specific Options
+#
+CONFIG_CLICKER2_STM32_MB1_SPI=y
+# CONFIG_CLICKER2_STM32_MB2_SPI is not set
+CONFIG_CLICKER2_STM32_MB1_BEE=y
+# CONFIG_CLICKER2_STM32_MB2_BEE is not set
+# CONFIG_BOARD_CRASHDUMP is not set
+CONFIG_LIB_BOARDCTL=y
+# CONFIG_BOARDCTL_RESET is not set
+# CONFIG_BOARDCTL_UNIQUEID is not set
+CONFIG_BOARDCTL_USBDEVCTRL=y
+# CONFIG_BOARDCTL_TSCTEST is not set
+# CONFIG_BOARDCTL_GRAPHICS is not set
+# CONFIG_BOARDCTL_IOCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_ARCH_HAVE_TICKLESS=y
+# CONFIG_SCHED_TICKLESS is not set
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+CONFIG_ARCH_HAVE_TIMEKEEPING=y
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=1
+CONFIG_START_DAY=1
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=16
+CONFIG_WDOG_INTRESERVE=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_SPINLOCK is not set
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=32
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_PTHREAD_MUTEX_TYPES is not set
+CONFIG_PTHREAD_MUTEX_ROBUST=y
+# CONFIG_PTHREAD_MUTEX_UNSAFE is not set
+# CONFIG_PTHREAD_MUTEX_BOTH is not set
+CONFIG_NPTHREAD_KEYS=4
+# CONFIG_PTHREAD_CLEANUP is not set
+# CONFIG_CANCELLATION_POINTS is not set
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+# CONFIG_DEV_CONSOLE is not set
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+CONFIG_BOARD_INITIALIZE=y
+# CONFIG_BOARD_INITTHREAD is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+# CONFIG_SIG_EVTHREAD is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+CONFIG_SIG_SIGWORK=17
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_HPWORKPRIORITY=192
+CONFIG_SCHED_HPWORKPERIOD=50000
+CONFIG_SCHED_HPWORKSTACKSIZE=2048
+CONFIG_SCHED_LPWORK=y
+CONFIG_SCHED_LPNTHREADS=1
+CONFIG_SCHED_LPWORKPRIORITY=160
+CONFIG_SCHED_LPWORKPERIOD=50000
+CONFIG_SCHED_LPWORKSTACKSIZE=2048
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_DISABLE_POLL is not set
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_URANDOM is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
+# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
+CONFIG_ARCH_HAVE_SPI_BITORDER=y
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_BITORDER is not set
+# CONFIG_SPI_CS_DELAY_CONTROL is not set
+# CONFIG_SPI_DRIVER is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_ONESHOT is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+
+#
+# IO Expander/GPIO Support
+#
+# CONFIG_IOEXPANDER is not set
+# CONFIG_DEV_GPIO is not set
+
+#
+# LCD Driver Support
+#
+# CONFIG_LCD is not set
+# CONFIG_SLCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_NCP5623C is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+CONFIG_NETDEVICES=y
+
+#
+# General Ethernet MAC Driver Options
+#
+# CONFIG_NETDEV_LOOPBACK is not set
+CONFIG_NETDEV_TELNET=y
+CONFIG_TELNET_RXBUFFER_SIZE=256
+CONFIG_TELNET_TXBUFFER_SIZE=256
+# CONFIG_NETDEV_MULTINIC is not set
+CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
+CONFIG_NETDEV_STATISTICS=y
+CONFIG_NETDEV_LATEINIT=y
+
+#
+# External Ethernet MAC Device Support
+#
+# CONFIG_NET_DM90x0 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_NET_SLIP is not set
+# CONFIG_NET_FTMAC100 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+CONFIG_SERIAL_REMOVABLE=y
+# CONFIG_SERIAL_CONSOLE is not set
+# CONFIG_16550_UART is not set
+# CONFIG_UART_SERIALDRIVER is not set
+# CONFIG_UART0_SERIALDRIVER is not set
+# CONFIG_UART1_SERIALDRIVER is not set
+# CONFIG_UART2_SERIALDRIVER is not set
+# CONFIG_UART3_SERIALDRIVER is not set
+# CONFIG_UART4_SERIALDRIVER is not set
+# CONFIG_UART5_SERIALDRIVER is not set
+# CONFIG_UART6_SERIALDRIVER is not set
+# CONFIG_UART7_SERIALDRIVER is not set
+# CONFIG_UART8_SERIALDRIVER is not set
+# CONFIG_SCI0_SERIALDRIVER is not set
+# CONFIG_SCI1_SERIALDRIVER is not set
+# CONFIG_USART0_SERIALDRIVER is not set
+# CONFIG_USART1_SERIALDRIVER is not set
+# CONFIG_USART2_SERIALDRIVER is not set
+# CONFIG_USART3_SERIALDRIVER is not set
+# CONFIG_USART4_SERIALDRIVER is not set
+# CONFIG_USART5_SERIALDRIVER is not set
+# CONFIG_USART6_SERIALDRIVER is not set
+# CONFIG_USART7_SERIALDRIVER is not set
+# CONFIG_USART8_SERIALDRIVER is not set
+# CONFIG_OTHER_UART_SERIALDRIVER is not set
+# CONFIG_MCU_SERIAL is not set
+CONFIG_STANDARD_SERIAL=y
+CONFIG_SERIAL_NPOLLWAITERS=2
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
+# CONFIG_PSEUDOTERM is not set
+CONFIG_USBDEV=y
+
+#
+# USB Device Controller Driver Options
+#
+# CONFIG_USBDEV_ISOCHRONOUS is not set
+# CONFIG_USBDEV_DUALSPEED is not set
+CONFIG_USBDEV_SELFPOWERED=y
+# CONFIG_USBDEV_BUSPOWERED is not set
+CONFIG_USBDEV_MAXPOWER=100
+# CONFIG_USBDEV_DMA is not set
+# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
+# CONFIG_USBDEV_TRACE is not set
+
+#
+# USB Device Class Driver Options
+#
+# CONFIG_USBDEV_COMPOSITE is not set
+# CONFIG_PL2303 is not set
+CONFIG_CDCACM=y
+CONFIG_CDCACM_CONSOLE=y
+CONFIG_CDCACM_EP0MAXPACKET=64
+CONFIG_CDCACM_EPINTIN=1
+CONFIG_CDCACM_EPINTIN_FSSIZE=64
+CONFIG_CDCACM_EPINTIN_HSSIZE=64
+CONFIG_CDCACM_EPBULKOUT=3
+CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
+CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
+CONFIG_CDCACM_EPBULKIN=2
+CONFIG_CDCACM_EPBULKIN_FSSIZE=64
+CONFIG_CDCACM_EPBULKIN_HSSIZE=512
+CONFIG_CDCACM_NRDREQS=4
+CONFIG_CDCACM_NWRREQS=4
+CONFIG_CDCACM_BULKIN_REQLEN=96
+CONFIG_CDCACM_RXBUFSIZE=256
+CONFIG_CDCACM_TXBUFSIZE=256
+CONFIG_CDCACM_VENDORID=0x0525
+CONFIG_CDCACM_PRODUCTID=0xa4a7
+CONFIG_CDCACM_VENDORSTR="NuttX"
+CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
+# CONFIG_USBMSC is not set
+# CONFIG_USBHOST is not set
+# CONFIG_USBMISC is not set
+# CONFIG_HAVE_USBTRACE is not set
+CONFIG_DRIVERS_WIRELESS=y
+# CONFIG_WL_CC1101 is not set
+# CONFIG_WL_CC3000 is not set
+CONFIG_DRIVERS_IEEE802154=y
+CONFIG_IEEE802154_MRF24J40=y
+# CONFIG_IEEE802154_AT86RF233 is not set
+# CONFIG_DRIVERS_IEEE80211 is not set
+# CONFIG_WL_NRF24L01 is not set
+# CONFIG_DRIVERS_CONTACTLESS is not set
+
+#
+# System Logging
+#
+# CONFIG_ARCH_SYSLOG is not set
+# CONFIG_SYSLOG_WRITE is not set
+CONFIG_RAMLOG=y
+CONFIG_RAMLOG_BUFSIZE=8192
+# CONFIG_RAMLOG_CRLF is not set
+CONFIG_RAMLOG_NONBLOCKING=y
+CONFIG_RAMLOG_NPOLLWAITERS=4
+# CONFIG_SYSLOG_INTBUFFER is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+# CONFIG_SYSLOG_SERIAL_CONSOLE is not set
+# CONFIG_SYSLOG_CHAR is not set
+CONFIG_RAMLOG_SYSLOG=y
+# CONFIG_SYSLOG_NONE is not set
+# CONFIG_SYSLOG_FILE is not set
+# CONFIG_SYSLOG_CHARDEV is not set
+
+#
+# Networking Support
+#
+CONFIG_ARCH_HAVE_NET=y
+# CONFIG_ARCH_HAVE_PHY is not set
+CONFIG_NET=y
+# CONFIG_NET_PROMISCUOUS is not set
+
+#
+# Driver buffer configuration
+#
+CONFIG_NET_GUARDSIZE=2
+
+#
+# Data link support
+#
+# CONFIG_NET_MULTILINK is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NET_6LOWPAN=y
+# CONFIG_NET_LOOPBACK is not set
+# CONFIG_NET_TUN is not set
+# CONFIG_NET_USRSOCK is not set
+
+#
+# Network Device Operations
+#
+CONFIG_NETDEV_IOCTL=y
+# CONFIG_NETDEV_PHY_IOCTL is not set
+CONFIG_NETDEV_WIRELESS_IOCTL=y
+
+#
+# Internet Protocol Selection
+#
+# CONFIG_NET_IPv4 is not set
+CONFIG_NET_IPv6=y
+CONFIG_NET_IPv6_NCONF_ENTRIES=8
+
+#
+# 6LoWPAN Configuration
+#
+CONFIG_NET_6LOWPAN_FRAG=y
+CONFIG_NET_6LOWPAN_FRAMELEN=127
+# CONFIG_NET_6LOWPAN_COMPRESSION_IPv6 is not set
+# CONFIG_NET_6LOWPAN_COMPRESSION_HC1 is not set
+CONFIG_NET_6LOWPAN_COMPRESSION_HC06=y
+CONFIG_NET_6LOWPAN_COMPRESSION_THRESHOLD=63
+CONFIG_NET_6LOWPAN_MAXADDRCONTEXT=1
+CONFIG_NET_6LOWPAN_MAXADDRCONTEXT_PREFIX_0_0=0xaa
+CONFIG_NET_6LOWPAN_MAXADDRCONTEXT_PREFIX_0_1=0xaa
+# CONFIG_NET_6LOWPAN_MAXADDRCONTEXT_PREINIT_1 is not set
+# CONFIG_NET_6LOWPAN_EXTENDEDADDR is not set
+CONFIG_NET_6LOWPAN_MAXAGE=20
+CONFIG_NET_6LOWPAN_MAX_MACTRANSMITS=4
+CONFIG_NET_6LOWPAN_MTU=1294
+CONFIG_NET_6LOWPAN_TCP_RECVWNDO=1220
+CONFIG_NET_HAVE_STAR=y
+# CONFIG_NET_IPFORWARD is not set
+CONFIG_NET_STAR=y
+CONFIG_NET_STARPOINT=y
+# CONFIG_NET_STARHUB is not set
+
+#
+# Socket Support
+#
+CONFIG_NSOCKET_DESCRIPTORS=8
+CONFIG_NET_NACTIVESOCKETS=16
+CONFIG_NET_SOCKOPTS=y
+# CONFIG_NET_SOLINGER is not set
+
+#
+# Raw Socket Support
+#
+# CONFIG_NET_PKT is not set
+
+#
+# Unix Domain Socket Support
+#
+# CONFIG_NET_LOCAL is not set
+
+#
+# TCP/IP Networking
+#
+CONFIG_NET_TCP=y
+# CONFIG_NET_TCP_NO_STACK is not set
+# CONFIG_NET_TCPURGDATA is not set
+CONFIG_NET_TCP_CONNS=8
+CONFIG_NET_MAX_LISTENPORTS=20
+CONFIG_NET_TCP_READAHEAD=y
+CONFIG_NET_TCP_WRITE_BUFFERS=y
+CONFIG_NET_TCP_NWRBCHAINS=8
+CONFIG_NET_TCP_RECVDELAY=0
+CONFIG_NET_TCPBACKLOG=y
+# CONFIG_NET_SENDFILE is not set
+
+#
+# UDP Networking
+#
+CONFIG_NET_UDP=y
+# CONFIG_NET_UDP_NO_STACK is not set
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NET_UDP_CONNS=8
+CONFIG_NET_BROADCAST=y
+# CONFIG_NET_RXAVAIL is not set
+CONFIG_NET_UDP_READAHEAD=y
+
+#
+# ICMPv6 Networking Support
+#
+# CONFIG_NET_ICMPv6 is not set
+
+#
+# IGMPv2 Client Support
+#
+# CONFIG_NET_IGMP is not set
+
+#
+# ARP Configuration
+#
+
+#
+# User-space networking stack API
+#
+# CONFIG_NET_ARCH_INCR32 is not set
+# CONFIG_NET_ARCH_CHKSUM is not set
+CONFIG_NET_STATISTICS=y
+
+#
+# Routing Table Configuration
+#
+# CONFIG_NET_ROUTE is not set
+CONFIG_NET_HOSTNAME="MRF24J40"
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_PSEUDOFS_SOFTLINKS is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_AIO is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_LCNAMES=y
+CONFIG_FAT_LFN=y
+CONFIG_FAT_MAXFNAME=32
+# CONFIG_FS_FATTIME is not set
+# CONFIG_FAT_FORCE_INDIRECT is not set
+# CONFIG_FAT_DMAMEMORY is not set
+# CONFIG_FAT_DIRECT_RETRY is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+CONFIG_FS_PROCFS=y
+# CONFIG_FS_PROCFS_REGISTER is not set
+
+#
+# Exclude individual procfs entries
+#
+# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
+# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
+# CONFIG_FS_PROCFS_EXCLUDE_NET is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=1
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Common I/O Buffer Support
+#
+CONFIG_MM_IOB=y
+CONFIG_IOB_NBUFFERS=32
+CONFIG_IOB_BUFSIZE=128
+CONFIG_IOB_NCHAINS=16
+CONFIG_IOB_THROTTLE=8
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_IEEE802154=y
+CONFIG_IEEE802154_DEFAULT_EADDR=0x00fade00deadbeef
+CONFIG_MAC802154_HPWORK=y
+# CONFIG_MAC802154_LPWORK is not set
+CONFIG_MAC802154_NTXDESC=32
+CONFIG_MAC802154_NNOTIF=48
+CONFIG_MAC802154_NPANDESC=5
+CONFIG_IEEE802154_IND_PREALLOC=32
+CONFIG_IEEE802154_IND_IRQRESERVE=10
+CONFIG_IEEE802154_MACDEV=y
+CONFIG_IEEE802154_MACDEV_RECVRPRIO=0
+CONFIG_IEEE802154_NETDEV=y
+CONFIG_IEEE802154_NETDEV_RECVRPRIO=1
+# CONFIG_IEEE802154_NETDEV_HPWORK is not set
+CONFIG_IEEE802154_NETDEV_LPWORK=y
+# CONFIG_IEEE802154_LOOPBACK is not set
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+
+#
+# Standard C I/O
+#
+# CONFIG_STDIO_DISABLE_BUFFERING is not set
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_SCANSET is not set
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_MEMCPY_VIK is not set
+# CONFIG_LIBM is not set
+
+#
+# Architecture-Specific Support
+#
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_LIBC_ARCH_MEMCPY is not set
+# CONFIG_LIBC_ARCH_MEMCMP is not set
+# CONFIG_LIBC_ARCH_MEMMOVE is not set
+# CONFIG_LIBC_ARCH_MEMSET is not set
+# CONFIG_LIBC_ARCH_STRCHR is not set
+# CONFIG_LIBC_ARCH_STRCMP is not set
+# CONFIG_LIBC_ARCH_STRCPY is not set
+# CONFIG_LIBC_ARCH_STRNCPY is not set
+# CONFIG_LIBC_ARCH_STRLEN is not set
+# CONFIG_LIBC_ARCH_STRNLEN is not set
+# CONFIG_LIBC_ARCH_ELF is not set
+# CONFIG_ARMV7M_MEMCPY is not set
+
+#
+# stdlib Options
+#
+CONFIG_LIB_RAND_ORDER=1
+CONFIG_LIB_HOMEDIR="/"
+CONFIG_LIBC_TMPDIR="/tmp"
+CONFIG_LIBC_MAX_TMPFILE=32
+
+#
+# Program Execution Options
+#
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+
+#
+# errno Decode Support
+#
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+
+#
+# memcpy/memset Options
+#
+# CONFIG_MEMSET_OPTSPEED is not set
+# CONFIG_LIBC_DLLFCN is not set
+# CONFIG_LIBC_MODLIB is not set
+# CONFIG_LIBC_WCHAR is not set
+# CONFIG_LIBC_LOCALE is not set
+
+#
+# Time/Time Zone Support
+#
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_ARCH_HAVE_TLS=y
+
+#
+# Thread Local Storage (TLS)
+#
+# CONFIG_TLS is not set
+
+#
+# Network-Related Options
+#
+# CONFIG_LIBC_IPv4_ADDRCONV is not set
+CONFIG_LIBC_NETDB=y
+
+#
+# NETDB Support
+#
+# CONFIG_NETDB_HOSTFILE is not set
+# CONFIG_NETDB_DNSCLIENT is not set
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_CRC64_FAST is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+# CONFIG_LIB_HEX2BIN is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# LLVM C++ Library (libcxx)
+#
+# CONFIG_LIBCXX is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CCTYPE is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_DISCOVER is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FSTEST is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+CONFIG_EXAMPLES_NETTEST=y
+CONFIG_EXAMPLES_NETTEST_SENDSIZE=4096
+CONFIG_EXAMPLES_NETTEST_STACKSIZE1=2048
+CONFIG_EXAMPLES_NETTEST_PRIORITY1=100
+# CONFIG_EXAMPLES_NETTEST_SERVER1 is not set
+CONFIG_EXAMPLES_NETTEST_TARGET2=y
+CONFIG_EXAMPLES_NETTEST_PRIORITY2=100
+CONFIG_EXAMPLES_NETTEST_STACKSIZE2=2048
+CONFIG_EXAMPLES_NETTEST_DEVNAME="wpan0"
+# CONFIG_EXAMPLES_NETTEST_PERFORMANCE is not set
+CONFIG_EXAMPLES_NETTEST_IPv6=y
+# CONFIG_EXAMPLES_NETTEST_INIT is not set
+
+#
+# Target IPv6 address
+#
+
+#
+# Server IPv6 address
+#
+CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_1=0xfe80
+CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_2=0x0000
+CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_3=0x0000
+CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_4=0x0000
+CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_5=0x0000
+CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_6=0x00ff
+CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_7=0xfe00
+CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_8=0x0800
+CONFIG_EXAMPLES_NETTEST_SERVER_PORTNO=61616
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_RFID_READUID is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_STAT is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+CONFIG_EXAMPLES_UDP=y
+# CONFIG_EXAMPLES_UDP_SERVER1 is not set
+CONFIG_EXAMPLES_UDP_PRIORITY1=100
+CONFIG_EXAMPLES_UDP_STACKSIZE1=2048
+CONFIG_EXAMPLES_UDP_TARGET2=y
+CONFIG_EXAMPLES_UDP_PRIORITY2=100
+CONFIG_EXAMPLES_UDP_STACKSIZE2=2048
+CONFIG_EXAMPLES_UDP_DEVNAME="wpan0"
+# CONFIG_EXAMPLES_UDP_NETINIT is not set
+CONFIG_EXAMPLES_UDP_IPv6=y
+
+#
+# Default Server IPv6 address
+#
+CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_1=0xfe80
+CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_2=0x0000
+CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_3=0x0000
+CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_4=0x0000
+CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_5=0x0000
+CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_6=0x00ff
+CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_7=0xfe00
+CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_8=0x0d00
+CONFIG_EXAMPLES_UDP_SERVER_PORTNO=61616
+CONFIG_EXAMPLES_UDP_CLIENT_PORTNO=61617
+# CONFIG_EXAMPLES_UDPBLASTER is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_XBC_TEST is not set
+# CONFIG_EXAMPLES_XMLRPC is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+# CONFIG_FSUTILS_PASSWD is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_BAS is not set
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+# CONFIG_INTERPRETERS_MINIBASIC is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CHAT is not set
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DISCOVER is not set
+# CONFIG_NETUTILS_ESP8266 is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+CONFIG_NETUTILS_NETLIB=y
+# CONFIG_NETUTILS_NTPCLIENT is not set
+# CONFIG_NETUTILS_PPPD is not set
+# CONFIG_NETUTILS_SMTP is not set
+CONFIG_NETUTILS_TELNETC=y
+CONFIG_NETUTILS_TELNETD=y
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+# CONFIG_NETUTILS_WEBSERVER is not set
+# CONFIG_NETUTILS_XMLRPC is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+CONFIG_NSH_DISABLE_GET=y
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_IFUPDOWN is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+CONFIG_NSH_DISABLE_PRINTF=y
+# CONFIG_NSH_DISABLE_PS is not set
+CONFIG_NSH_DISABLE_PUT=y
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_TELNETD is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+CONFIG_NSH_DISABLE_WGET=y
+# CONFIG_NSH_DISABLE_XD is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Configure Command Options
+#
+# CONFIG_NSH_CMDOPT_DF_H is not set
+# CONFIG_NSH_CMDOPT_DD_STATS is not set
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_PROC_MOUNTPOINT="/proc"
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_USBCONSOLE is not set
+CONFIG_NSH_ARCHINIT=y
+
+#
+# Networking Configuration
+#
+CONFIG_NSH_NETINIT=y
+CONFIG_NSH_NETLOCAL=y
+CONFIG_NSH_NOMAC=y
+CONFIG_NSH_SWMAC=y
+CONFIG_NSH_MACADDR=0x00fade00deadbeef
+CONFIG_NSH_MAX_ROUNDTRIP=20
+
+#
+# Telnet Configuration
+#
+CONFIG_NSH_TELNET=y
+CONFIG_NSH_TELNETD_PORT=23
+CONFIG_NSH_TELNETD_DAEMONPRIO=100
+CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048
+CONFIG_NSH_TELNETD_CLIENTPRIO=100
+CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048
+CONFIG_NSH_IOBUFFER_SIZE=512
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+# CONFIG_NSH_TELNET_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+CONFIG_HAVE_CXXINITIALIZE=y
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_CDCACM is not set
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_NETDB is not set
+# CONFIG_SYSTEM_NTPC is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_SYSTEM is not set
+# CONFIG_SYSTEM_TEE is not set
+# CONFIG_SYSTEM_TELNET_CHATD is not set
+# CONFIG_SYSTEM_TELNET_CLIENT is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_ZMODEM is not set
+
+#
+# Wireless Libraries and NSH Add-Ons
+#
+
+#
+# IEEE 802.15.4 applications
+#
+CONFIG_IEEE802154_LIBMAC=y
+CONFIG_IEEE802154_LIBUTILS=y
+CONFIG_IEEE802154_I8SAK=y
+CONFIG_IEEE802154_I8SAK_PRIORITY=100
+CONFIG_IEEE802154_I8SAK_STACKSIZE=2048
+# CONFIG_WIRELESS_IWPAN is not set
diff --git a/configs/clicker2-stm32/src/clicker2-stm32.h b/configs/clicker2-stm32/src/clicker2-stm32.h
index 7a1867a0b4..cf9f3613aa 100644
--- a/configs/clicker2-stm32/src/clicker2-stm32.h
+++ b/configs/clicker2-stm32/src/clicker2-stm32.h
@@ -237,7 +237,7 @@
* Name: stm32_spidev_initialize
*
* Description:
- * Called to configure SPI chip select GPIO pins for the Mikroe Clicker2 STM32
+ * Called to configure SPI chip select GPIO pins for the Mikroe Clicker2 STM32
* board.
*
****************************************************************************/
diff --git a/configs/efm32-g8xx-stk/nsh/Make.defs b/configs/efm32-g8xx-stk/nsh/Make.defs
index c9feff08e2..88aa236c8d 100644
--- a/configs/efm32-g8xx-stk/nsh/Make.defs
+++ b/configs/efm32-g8xx-stk/nsh/Make.defs
@@ -48,7 +48,7 @@ ifeq ($(WINTOOL),y)
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
- # Linux/Cygwin-native toolchain
+ # Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
diff --git a/configs/efm32gg-stk3700/nsh/Make.defs b/configs/efm32gg-stk3700/nsh/Make.defs
index c9feff08e2..88aa236c8d 100644
--- a/configs/efm32gg-stk3700/nsh/Make.defs
+++ b/configs/efm32gg-stk3700/nsh/Make.defs
@@ -48,7 +48,7 @@ ifeq ($(WINTOOL),y)
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
- # Linux/Cygwin-native toolchain
+ # Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
diff --git a/configs/esp32-core/README.txt b/configs/esp32-core/README.txt
index 6d7d69c667..63e2b81957 100644
--- a/configs/esp32-core/README.txt
+++ b/configs/esp32-core/README.txt
@@ -572,7 +572,7 @@ OpenOCD for the ESP32
esp32.cpu0: Target halted, pc=0x400835BF
187 g_tick_divisor = divisor;
(gdb) ...
-
+
Configurations
==============
diff --git a/configs/freedom-k64f/README.txt b/configs/freedom-k64f/README.txt
index cb04f040d4..c7c01a494d 100644
--- a/configs/freedom-k64f/README.txt
+++ b/configs/freedom-k64f/README.txt
@@ -56,7 +56,7 @@ OpenSDAv2
HDK-compatible debug interface preloaded with the open-source CMSIS-DAP
Interface firmware (mbed interface) for rapid prototyping and product
development.
-
+
To use set raw binary output for nuttx.bin
Serial Console
diff --git a/configs/freedom-k66f/scripts/flash.ld b/configs/freedom-k66f/scripts/flash.ld
index ca8fcc3405..5eec2c7a9c 100644
--- a/configs/freedom-k66f/scripts/flash.ld
+++ b/configs/freedom-k66f/scripts/flash.ld
@@ -3,7 +3,7 @@
*
* Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt
- * David Sidrane
+ * David Sidrane
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -35,7 +35,7 @@
****************************************************************************/
/* The MK66FN2M0VMD18 has 2M of FLASH beginning at address 0x0000:0000 and
- * 256Kb of SRAM beginning at address 0x1fff:0000 (SRAM_L)(64Kb) and
+ * 256Kb of SRAM beginning at address 0x1fff:0000 (SRAM_L)(64Kb) and
* 0x2000:0000 (SRAM_U) (192Kb).
*
* NOTE: that the first part of the K66 FLASH region is reserved for
diff --git a/configs/freedom-kl25z/src/kl_adxl345.c b/configs/freedom-kl25z/src/kl_adxl345.c
index 7213fcccfa..906faad109 100644
--- a/configs/freedom-kl25z/src/kl_adxl345.c
+++ b/configs/freedom-kl25z/src/kl_adxl345.c
@@ -212,14 +212,14 @@ static void adxl345_enable(FAR struct adxl345_config_s *state, bool enable)
kl_configgpio(GPIO_ADXL345_INT1);
(void)kl_gpioirqattach(GPIO_ADXL345_INT1, adxl345_interrupt, NULL);
- kl_gpioirqenable(GPIO_ADXL345_INT1);
+ kl_gpioirqenable(GPIO_ADXL345_INT1);
}
else
{
/* Configure the interrupt with a NULL handler to disable it */
(void)kl_gpioirqattach(GPIO_ADXL345_INT1, NULL, NULL);
- kl_gpioirqdisable(GPIO_ADXL345_INT1);
+ kl_gpioirqdisable(GPIO_ADXL345_INT1);
}
leave_critical_section(flags);
diff --git a/configs/lincoln60/README.txt b/configs/lincoln60/README.txt
index 4455198f7b..534167fa2f 100644
--- a/configs/lincoln60/README.txt
+++ b/configs/lincoln60/README.txt
@@ -478,7 +478,7 @@ Where is one of the following:
netnsh:
Configures the NuttShell (nsh) located at apps/examples/nsh. This
- configuration is similar to the nsh configuration except that network
+ configuration is similar to the nsh configuration except that network
upport is enabled.
NOTES:
diff --git a/configs/lpc4370-link2/include/board.h b/configs/lpc4370-link2/include/board.h
index c177c6d461..c53a1fb7b6 100644
--- a/configs/lpc4370-link2/include/board.h
+++ b/configs/lpc4370-link2/include/board.h
@@ -287,7 +287,7 @@
#define LED_PANIC 3 /* Flashing */
/* UART Pins ****************************************************************/
-/*
+/*
* The following definitions must be provided so that the LPC43 serial
* driver can set up the U[S]ART for the serial console properly (see the
* file arch/arc/src/lpc43xx/lpc43*_pinconf.h for more info).
diff --git a/configs/misoc/scripts/ld.script b/configs/misoc/scripts/ld.script
index 0a3aa7e3d0..f751479067 100644
--- a/configs/misoc/scripts/ld.script
+++ b/configs/misoc/scripts/ld.script
@@ -70,7 +70,7 @@ SECTIONS
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
- } > main_ram
+ } > main_ram
.bss : { /* BSS */
_sbss = ABSOLUTE(.);
diff --git a/configs/nr5m100-nexys4/README.txt b/configs/nr5m100-nexys4/README.txt
index 88c488de68..09a0ebfa23 100644
--- a/configs/nr5m100-nexys4/README.txt
+++ b/configs/nr5m100-nexys4/README.txt
@@ -30,7 +30,7 @@ on the FPGA board. Those peripherals include:
- 3-Axis accelerometer
- Temperature sensor
-See http://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-trainer-board-recommended-for-ece-curriculum/
+See http://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-trainer-board-recommended-for-ece-curriculum/
or http://store.digilentinc.com/nexys-4-artix-7-fpga-trainer-board-limited-time-see-nexys4-ddr/
for more information about these boards.
@@ -53,25 +53,25 @@ Contents
Development Environment
=======================
- The NR5M100 RISC-V core was designed as a low gate count / low performance micro controller
+ The NR5M100 RISC-V core was designed as a low gate count / low performance micro controller
for inclusion in an ASIC. It is based on a Verilog RISC-V called picorv32, but has many
- additions beyond that baseline. The design running on the Digilent Nexys4 FPGA is a
+ additions beyond that baseline. The design running on the Digilent Nexys4 FPGA is a
validation platform for the core and is presented as an open source project.
The reason NR5M100 is "low performance" is that it is a state machine based core (like the
picorv32) and not a multi-stage pipeline core. This means that it requires an average of
4.5 clock cycles to execute each instruction. On a multi-stage pipeline architecure, this
- average would be closer to 1 clock cycle per instruction (though a bit higher due to
+ average would be closer to 1 clock cycle per instruction (though a bit higher due to
pipeline branch misses). The tradeoff for lower performance is a simpler design. There
is a single memory bus interface for both instructions and data. Multi-stage pipeline
cores require a separate I and D bus with cache SRAM and an external memory cache controller,
etc. This in addition to the pipeline registers adds additional gate count.
The nr5m100-nexys4 core runs at 83.333 Mhz which provides about 18 Mhz effective operating
- speed with the multi-clock per instruction architecture. If you are looking for a higher
- performance platform, you should check out the PULP Platform ( http://www.pulp-platform.org ).
- That is an FPGA design with a 4-stage pipeline RISC-V core, though not currently supported
- by NuttX. The NR5M100 project will likely pull in the RISC-V core from that design next,
+ speed with the multi-clock per instruction architecture. If you are looking for a higher
+ performance platform, you should check out the PULP Platform ( http://www.pulp-platform.org ).
+ That is an FPGA design with a 4-stage pipeline RISC-V core, though not currently supported
+ by NuttX. The NR5M100 project will likely pull in the RISC-V core from that design next,
though this will probably not be available soon. With a bit of work, it is possible to
run the nr5m100-nexys4 core at 170 Mhz with a 6.5 clocks-per-instruction state machine.
This would give an effective performance of about 26Mhz.
@@ -87,8 +87,8 @@ RISC-V GNU Toolchain
====================
To compile the code, you must first build a RISC-V GNU Toolchain from the sources at
- https://github.com/riscv/riscv-gnu-toolchain. I don't know of any sources for pre-compiled
- toolchains (though there may be some out there).
+ https://github.com/riscv/riscv-gnu-toolchain. I don't know of any sources for pre-compiled
+ toolchains (though there may be some out there).
To build this toolchain, follow these instructions (tested on Ubuntu 12.04):
@@ -118,16 +118,16 @@ RISC-V GNU Toolchain
Windows based toolchain
-----------------------
- May be possible to compile the GNU toolchain described above using Cygwin, but havne't tried it.
+ May be possible to compile the GNU toolchain described above using Cygwin, but havne't tried it.
Debugger
========
- The Debug Module within the NR5M100 RISC-V has been designed to work with the RISC-V gdb
+ The Debug Module within the NR5M100 RISC-V has been designed to work with the RISC-V gdb
debugger interfaced with the SiFive implementation of OpenOCD. The interface has been tested
- with a J-LINK JTAG probe connected to PMOD header B on the FPGA using an adapter board
+ with a J-LINK JTAG probe connected to PMOD header B on the FPGA using an adapter board
that I designed and fabbed at OSHPark. I will update this README.txt file soon with a link
to the shared project for anyone who wishes to build one.
-
+
To build OpenOCD, perform the following:
1. Ensure the proper packages are installed:
@@ -139,7 +139,7 @@ Debugger
cd ~/riscv
git clone --recursive https://github.com/sifive/openocd.git
- 3. Configure and build OpenOCD. The x86_64 GCC compilers will give errors because of
+ 3. Configure and build OpenOCD. The x86_64 GCC compilers will give errors because of
shadowed variable warnings, so diable the -Werror flag also:
cd openocd
diff --git a/configs/nr5m100-nexys4/scripts/ld.script b/configs/nr5m100-nexys4/scripts/ld.script
index df856beb23..b2f1036ae2 100644
--- a/configs/nr5m100-nexys4/scripts/ld.script
+++ b/configs/nr5m100-nexys4/scripts/ld.script
@@ -129,7 +129,7 @@ SECTIONS
_vectors = .;
/* vectors: Program code section */
- .vectors :
+ .vectors :
{
*(.text.vec)
*(.text.vec.*)
@@ -147,7 +147,7 @@ SECTIONS
PROVIDE( eprol = . );
/* text: Program code section */
- .text :
+ .text :
{
_stext = ABSOLUTE(.);
*(.text)
@@ -156,20 +156,20 @@ SECTIONS
}
/* init: Code to execute before main (called by crt0.S) */
- .init :
+ .init :
{
KEEP( *(.init) )
}
/* fini: Code to execute after main (called by crt0.S) */
- .fini :
+ .fini :
{
KEEP( *(.fini) )
}
/* rodata: Read-only data */
_rodata = .;
- .rodata :
+ .rodata :
{
*(.rdata)
*(.rodata)
@@ -218,7 +218,7 @@ SECTIONS
.eh_frame_hdr : { *(.eh_frame_hdr) }
.eh_frame : { KEEP( *(.eh_frame) ) }
.gcc_except_table : { *(.gcc_except_table) }
- .jcr : { KEEP (*(.jcr)) }
+ .jcr : { KEEP (*(.jcr)) }
/*--------------------------------------------------------------------*/
/* Initialized data segment */
@@ -230,7 +230,7 @@ SECTIONS
/* data: Writable data */
_sdata = .;
- .data :
+ .data :
{
*(.data)
*(.data.*)
@@ -246,7 +246,7 @@ SECTIONS
_gp = . + 0x7FF0;
/* Writable small data segment */
- .sdata :
+ .sdata :
{
*(.sdata)
*(.sdata.*)
@@ -264,7 +264,7 @@ SECTIONS
_fbss = .;
/* Writable uninitialized small data segment */
- .sbss :
+ .sbss :
{
*(.sbss)
*(.sbss.*)
@@ -274,7 +274,7 @@ SECTIONS
/* bss: Uninitialized writeable data section */
. = .;
_bss_start = .;
- .bss :
+ .bss :
{
*(.bss)
*(.bss.*)
diff --git a/configs/nr5m100-nexys4/scripts/openocd.cfg b/configs/nr5m100-nexys4/scripts/openocd.cfg
index ea4564d84e..b3818fb9ea 100644
--- a/configs/nr5m100-nexys4/scripts/openocd.cfg
+++ b/configs/nr5m100-nexys4/scripts/openocd.cfg
@@ -35,7 +35,7 @@
#======================================
#
-# Define the interface
+# Define the interface
#
#=====================================
diff --git a/configs/nr5m100-nexys4/src/nr5_autoleds.c b/configs/nr5m100-nexys4/src/nr5_autoleds.c
index a35a6331cc..3444fb2f9e 100644
--- a/configs/nr5m100-nexys4/src/nr5_autoleds.c
+++ b/configs/nr5m100-nexys4/src/nr5_autoleds.c
@@ -67,5 +67,5 @@
void board_autoled_on(int led)
{
-
+
}
diff --git a/configs/nucleo-144/src/stm32_adc.c b/configs/nucleo-144/src/stm32_adc.c
index 5a26723f5e..fd59887e28 100644
--- a/configs/nucleo-144/src/stm32_adc.c
+++ b/configs/nucleo-144/src/stm32_adc.c
@@ -95,7 +95,7 @@ static const uint8_t g_chanlist[ADC1_NCHANNELS] = {3};
/* Configurations of pins used byte each ADC channels
*
- * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
+ * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
* GPIO_ADC1_IN6, GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9, GPIO_ADC1_IN10,
* GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15};
*/
diff --git a/configs/nucleo-f072rb/README.txt b/configs/nucleo-f072rb/README.txt
index 93de59220f..291a548577 100644
--- a/configs/nucleo-f072rb/README.txt
+++ b/configs/nucleo-f072rb/README.txt
@@ -237,7 +237,7 @@ Configurations
reconfiguration process.
2. Unless stated otherwise, all configurations generate console
- output on USART2, as described above under "Serial Console". The
+ output on USART2, as described above under "Serial Console". The
elevant configuration settings are listed below:
CONFIG_STM32_USART2=y
@@ -319,7 +319,7 @@ Configurations
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
- Support for NSH built-in applications is enabled for future use.
+ Support for NSH built-in applications is enabled for future use.
However, no built applications are enabled in this base configuration.
2. C++ support for applications is NOT enabled. That could be enabled
diff --git a/configs/nucleo-f091rc/README.txt b/configs/nucleo-f091rc/README.txt
index 86b60014f7..e01630856b 100644
--- a/configs/nucleo-f091rc/README.txt
+++ b/configs/nucleo-f091rc/README.txt
@@ -223,7 +223,7 @@ Configurations
reconfiguration process.
2. Unless stated otherwise, all configurations generate console
- output on USART2, as described above under "Serial Console". The
+ output on USART2, as described above under "Serial Console". The
elevant configuration settings are listed below:
CONFIG_STM32_USART2=y
@@ -305,7 +305,7 @@ Configurations
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
- Support for NSH built-in applications is enabled for future use.
+ Support for NSH built-in applications is enabled for future use.
However, no built applications are enabled in this base configuration.
2. C++ support for applications is NOT enabled. That could be enabled
diff --git a/configs/nucleo-f4x1re/include/nucleo-f401re.h b/configs/nucleo-f4x1re/include/nucleo-f401re.h
index 1460f5c3cc..0fe359a67f 100644
--- a/configs/nucleo-f4x1re/include/nucleo-f401re.h
+++ b/configs/nucleo-f4x1re/include/nucleo-f401re.h
@@ -163,7 +163,7 @@
#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
- * otherwise frequency is 2xAPBx.
+ * otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
*/
/* REVISIT */
@@ -177,7 +177,7 @@
#define BOARD_TIM7_FREQUENCY (2*STM32_PCLK1_FREQUENCY)
#define BOARD_TIM8_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
-/* SDIO dividers. Note that slower clocking is required when DMA is disabled
+/* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode. These values have not been
* tuned!!!
@@ -185,7 +185,7 @@
* HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz
*/
/* REVISIT */
-
+
#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT)
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
@@ -194,9 +194,9 @@
/* REVISIT */
#ifdef CONFIG_SDIO_DMA
-# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
+# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
-# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
+# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
diff --git a/configs/nucleo-f4x1re/src/stm32_io.c b/configs/nucleo-f4x1re/src/stm32_io.c
index 0fc399662a..a319e69a83 100644
--- a/configs/nucleo-f4x1re/src/stm32_io.c
+++ b/configs/nucleo-f4x1re/src/stm32_io.c
@@ -103,7 +103,7 @@ void up_leds(int r, int g ,int b, int freqs)
void up_ioinit(void)
{
- /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
+ /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for all pins.
*/
diff --git a/configs/nucleo-l432kc/include/nucleo-l432kc.h b/configs/nucleo-l432kc/include/nucleo-l432kc.h
index eed8f15d26..bc2052a2ce 100644
--- a/configs/nucleo-l432kc/include/nucleo-l432kc.h
+++ b/configs/nucleo-l432kc/include/nucleo-l432kc.h
@@ -156,7 +156,7 @@
* SAI1PLL output R (ADC1) clock frequency = SAI1VCO frequency / PLLSAI1R, PLLR = 2, 4, 6, or 8, or 0 to disable
*
* We will configure like this
- *
+ *
* PLLSAI1 disabled
*
* ----------------------------------------
@@ -173,7 +173,7 @@
* SAI2PLL output R (ADC2) clock frequency = SAI2VCO frequency / PLLSAI2R, PLLR = 2, 4, 6, or 8, or 0 to disable
*
* We will configure like this
- *
+ *
* PLLSAI2 disabled
*
* ----------------------------------------
diff --git a/configs/nucleo-l452re/README.txt b/configs/nucleo-l452re/README.txt
index 386c1ad8f7..fc3e3aa398 100644
--- a/configs/nucleo-l452re/README.txt
+++ b/configs/nucleo-l452re/README.txt
@@ -229,7 +229,7 @@ Configurations
reconfiguration process.
2. Unless stated otherwise, all configurations generate console
- output on USART2, as described above under "Serial Console". The
+ output on USART2, as described above under "Serial Console". The
elevant configuration settings are listed below:
CONFIG_STM32_USART2=y
diff --git a/configs/nucleo-l452re/include/nucleo-l452re.h b/configs/nucleo-l452re/include/nucleo-l452re.h
index 0074a64d9b..1f63c441e3 100644
--- a/configs/nucleo-l452re/include/nucleo-l452re.h
+++ b/configs/nucleo-l452re/include/nucleo-l452re.h
@@ -156,7 +156,7 @@
* SAI1PLL output R (ADC1) clock frequency = SAI1VCO frequency / PLLSAI1R, PLLR = 2, 4, 6, or 8, or 0 to disable
*
* We will configure like this
- *
+ *
* PLLSAI1 disabled
*
* ----------------------------------------
@@ -173,7 +173,7 @@
* SAI2PLL output R (ADC2) clock frequency = SAI2VCO frequency / PLLSAI2R, PLLR = 2, 4, 6, or 8, or 0 to disable
*
* We will configure like this
- *
+ *
* PLLSAI2 disabled
*
* ----------------------------------------
diff --git a/configs/nucleo-l452re/src/nucleo-l452re.h b/configs/nucleo-l452re/src/nucleo-l452re.h
index 4ab3436861..04df58ef3b 100644
--- a/configs/nucleo-l452re/src/nucleo-l452re.h
+++ b/configs/nucleo-l452re/src/nucleo-l452re.h
@@ -56,7 +56,7 @@
#define HAVE_PROC 1
#define HAVE_RTC_DRIVER 1
#define HAVE_MMCSD 1
-
+
#if !defined(CONFIG_FS_PROCFS)
# undef HAVE_PROC
#endif
diff --git a/configs/nucleo-l476rg/include/nucleo-l476rg.h b/configs/nucleo-l476rg/include/nucleo-l476rg.h
index 4f233b4f16..67a9f46cae 100644
--- a/configs/nucleo-l476rg/include/nucleo-l476rg.h
+++ b/configs/nucleo-l476rg/include/nucleo-l476rg.h
@@ -156,7 +156,7 @@
* SAI1PLL output R (ADC1) clock frequency = SAI1VCO frequency / PLLSAI1R, PLLR = 2, 4, 6, or 8, or 0 to disable
*
* We will configure like this
- *
+ *
* PLLSAI1 disabled
*
* ----------------------------------------
@@ -173,7 +173,7 @@
* SAI2PLL output R (ADC2) clock frequency = SAI2VCO frequency / PLLSAI2R, PLLR = 2, 4, 6, or 8, or 0 to disable
*
* We will configure like this
- *
+ *
* PLLSAI2 disabled
*
* ----------------------------------------
diff --git a/configs/nucleo-l476rg/src/stm32_io.c b/configs/nucleo-l476rg/src/stm32_io.c
index 59e356d401..3ece19cf32 100644
--- a/configs/nucleo-l476rg/src/stm32_io.c
+++ b/configs/nucleo-l476rg/src/stm32_io.c
@@ -103,7 +103,7 @@ void up_leds(int r, int g ,int b, int freqs)
void up_ioinit(void)
{
- /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
+ /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for all pins.
*/
diff --git a/configs/nucleo-l496zg/README.txt b/configs/nucleo-l496zg/README.txt
index 0dffae0c61..c188dd8b82 100644
--- a/configs/nucleo-l496zg/README.txt
+++ b/configs/nucleo-l496zg/README.txt
@@ -76,7 +76,7 @@ NUCLEO-L496ZG Features:
Microprocessor: STM32L496ZGT6 Core: ARM 32-bit Cortex®-M4 CPU with FPU,
80 MHz, MPU, and DSP instructions.
Memory: 1024 KB Flash 320KB of SRAM (including 64KB of SRAM2)
- ADC: 3×12-bit: up to 24 channels
+ ADC: 3×12-bit: up to 24 channels
DMA: 2 X 7-stream DMA controllers with FIFOs and burst support
Timers: Up to 13 timers: (2x 16-bit lowpower), two 32-bit timers,
2x watchdogs, SysTick
diff --git a/configs/nucleo-l496zg/src/stm32_adc.c b/configs/nucleo-l496zg/src/stm32_adc.c
index 250cd58def..10347c74e3 100644
--- a/configs/nucleo-l496zg/src/stm32_adc.c
+++ b/configs/nucleo-l496zg/src/stm32_adc.c
@@ -95,7 +95,7 @@ static const uint8_t g_chanlist[ADC1_NCHANNELS] = {3};
/* Configurations of pins used byte each ADC channels
*
- * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
+ * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
* GPIO_ADC1_IN6, GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9, GPIO_ADC1_IN10,
* GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15};
*/
diff --git a/configs/olimex-efm32g880f128-stk/nsh/Make.defs b/configs/olimex-efm32g880f128-stk/nsh/Make.defs
index a6e5dfddc5..42e9c724fe 100644
--- a/configs/olimex-efm32g880f128-stk/nsh/Make.defs
+++ b/configs/olimex-efm32g880f128-stk/nsh/Make.defs
@@ -48,7 +48,7 @@ ifeq ($(WINTOOL),y)
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
- # Linux/Cygwin-native toolchain
+ # Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
diff --git a/configs/olimex-stm32-e407/src/stm32_adc.c b/configs/olimex-stm32-e407/src/stm32_adc.c
index c8b9682a12..f1e09265fa 100644
--- a/configs/olimex-stm32-e407/src/stm32_adc.c
+++ b/configs/olimex-stm32-e407/src/stm32_adc.c
@@ -97,7 +97,7 @@ static const uint8_t g_chanlist[ADC1_NCHANNELS] = {1};
/* Configurations of pins used byte each ADC channels
*
- * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
+ * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
* GPIO_ADC1_IN6, GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9, GPIO_ADC1_IN10,
* GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15};
*/
diff --git a/configs/olimex-stm32-h407/README.txt b/configs/olimex-stm32-h407/README.txt
index 7b76206c59..65695f6df3 100644
--- a/configs/olimex-stm32-h407/README.txt
+++ b/configs/olimex-stm32-h407/README.txt
@@ -1,8 +1,8 @@
README
======
-The Olimex STM32-H407 configuration is based on
-stm32Fdiscovery and Olimex STM32-H405.
+The Olimex STM32-H407 configuration is based on
+stm32Fdiscovery and Olimex STM32-H405.
The H407 was programmed with ST-LINK/V2 from both Win8.1 and Ubuntu 14.04
This release provides baseline for H407 12MHZ clock in include/board.h
diff --git a/configs/olimex-stm32-h407/include/board.h b/configs/olimex-stm32-h407/include/board.h
index 9418619164..06850c8bf0 100644
--- a/configs/olimex-stm32-h407/include/board.h
+++ b/configs/olimex-stm32-h407/include/board.h
@@ -2,7 +2,7 @@
* configs/olimex-stm32-h407/include/board.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt
+ * Author: Gregory Nutt
* Modified for H407 Neil Hancock
*
* Redistribution and use in source and binary forms, with or without
diff --git a/configs/olimex-stm32-h407/src/stm32_adc.c b/configs/olimex-stm32-h407/src/stm32_adc.c
index 9282080a6b..abe9f4aa3b 100644
--- a/configs/olimex-stm32-h407/src/stm32_adc.c
+++ b/configs/olimex-stm32-h407/src/stm32_adc.c
@@ -97,7 +97,7 @@ static const uint8_t g_chanlist[ADC1_NCHANNELS] = {1};
/* Configurations of pins used byte each ADC channels
*
- * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
+ * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4, GPIO_ADC1_IN5,
* GPIO_ADC1_IN6, GPIO_ADC1_IN7, GPIO_ADC1_IN8, GPIO_ADC1_IN9, GPIO_ADC1_IN10,
* GPIO_ADC1_IN11, GPIO_ADC1_IN12, GPIO_ADC1_IN13, GPIO_ADC1_IN15};
*/
diff --git a/configs/photon/README.txt b/configs/photon/README.txt
index 779226e632..584f626cd9 100644
--- a/configs/photon/README.txt
+++ b/configs/photon/README.txt
@@ -49,7 +49,7 @@ Configuring NuttX to use your Wireless Router (aka Access Point)
Browser the menus this way:
- Application Configuration --->
+ Application Configuration --->
NSH Library --->
Networking Configuration --->
WAPI Configuration --->
diff --git a/configs/sam4s-xplained-pro/README.txt b/configs/sam4s-xplained-pro/README.txt
index 6747d99f29..9cb17447db 100644
--- a/configs/sam4s-xplained-pro/README.txt
+++ b/configs/sam4s-xplained-pro/README.txt
@@ -580,7 +580,7 @@ Configuration sub-directories
1. The configuration configuration can be modified to include support
for the on-board SRAM (1MB).
- System Type -> External Memory Configuration
+ System Type -> External Memory Configuration
CONFIG_SAM34_EXTSRAM0=y : Select SRAM on CS0
CONFIG_SAM34_EXTSRAM0SIZE=1048576 : Size=1MB
@@ -589,7 +589,7 @@ Configuration sub-directories
a) To enable the NuttX RAM test that may be used to verify the
external SRAM:
- System Type -> External Memory Configuration
+ System Type -> External Memory Configuration
CONFIG_SAM34_EXTSRAM0HEAP=n : Don't add to heap
Application Configuration -> System NSH Add-Ons
@@ -623,7 +623,7 @@ Configuration sub-directories
b) To add this RAM to the NuttX heap, you would need to change the
configuration as follows:
- System Type -> External Memory Configuration
+ System Type -> External Memory Configuration
CONFIG_SAM34_EXTSRAM0HEAP=y : Add external RAM to heap
Memory Management
diff --git a/configs/sam4s-xplained-pro/nsh/Make.defs b/configs/sam4s-xplained-pro/nsh/Make.defs
index 2dc8e2add3..5e49491448 100644
--- a/configs/sam4s-xplained-pro/nsh/Make.defs
+++ b/configs/sam4s-xplained-pro/nsh/Make.defs
@@ -46,7 +46,7 @@ ifeq ($(WINTOOL),y)
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/ld.script}"
else
- # Linux/Cygwin-native toolchain
+ # Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
diff --git a/configs/sam4s-xplained-pro/scripts/ld.script b/configs/sam4s-xplained-pro/scripts/ld.script
index dee9c22187..7c8b56ea2e 100644
--- a/configs/sam4s-xplained-pro/scripts/ld.script
+++ b/configs/sam4s-xplained-pro/scripts/ld.script
@@ -33,12 +33,12 @@
*
****************************************************************************/
-/* The ATSAM4SD32C has 2 banks of 1MB of FLASH beginning at address
+/* The ATSAM4SD32C has 2 banks of 1MB of FLASH beginning at address
* 0x0040:0000 and 160KB of SRAM beginning at address 0x2000:0000
*
* Flash 0 / 1 can be swapped with the GPNVM bit 2. We'll avoid using
* the 2nd bank to allow this as an option for firmware upgrading or failsafe
- *
+ *
*/
MEMORY
diff --git a/configs/sama5d2-xult/include/board.h b/configs/sama5d2-xult/include/board.h
index 6408b13808..7de0ca0df6 100644
--- a/configs/sama5d2-xult/include/board.h
+++ b/configs/sama5d2-xult/include/board.h
@@ -181,8 +181,8 @@
#define BUTTON_USER_BIT (1 << BUTTON_USER)
/* Pin disambiguation ***************************************************************/
-/* Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
- * Drivers, however, will use the pin selection without the numeric suffix.
+/* Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
+ * Drivers, however, will use the pin selection without the numeric suffix.
* Additional definitions are required in this board.h file. For example, if we
* wanted the PCK0on PB26, then the following definition should appear in the
* board.h header file for that board:
diff --git a/configs/sama5d3x-ek/Using-NxPlayer.txt b/configs/sama5d3x-ek/Using-NxPlayer.txt
index 22ce45a3bd..bb71e27c8d 100644
--- a/configs/sama5d3x-ek/Using-NxPlayer.txt
+++ b/configs/sama5d3x-ek/Using-NxPlayer.txt
@@ -24,7 +24,7 @@ Procedure:
5. NSH shouls start
NuttShell (NSH) NuttX-7.3
- nsh>
+ nsh>
6. Mount the SD card at /music
diff --git a/configs/sama5d3x-ek/src/sama5d3x-ek.h b/configs/sama5d3x-ek/src/sama5d3x-ek.h
index 51647349a2..fcdfa53b3e 100644
--- a/configs/sama5d3x-ek/src/sama5d3x-ek.h
+++ b/configs/sama5d3x-ek/src/sama5d3x-ek.h
@@ -811,7 +811,7 @@ void weak_function sam_usbinitialize(void);
* Name: stm32_usbhost_initialize
*
* Description:
- * Called at application startup time to initialize the USB host functionality.
+ * Called at application startup time to initialize the USB host functionality.
* This function will start a thread that will monitor for device connection/
* disconnection events.
*
diff --git a/configs/sama5d4-ek/README.txt b/configs/sama5d4-ek/README.txt
index 42a3ef0fcd..4ea1109f88 100644
--- a/configs/sama5d4-ek/README.txt
+++ b/configs/sama5d4-ek/README.txt
@@ -359,7 +359,7 @@ Creating and Using DRAMBOOT
cd tools
./configure.sh sama5d4-ek/dramboot
cd -
-
+
Before building, make sure that the PATH environment variable includes
the correct path to the directory than holds your toolchain binaries.
diff --git a/configs/sama5d4-ek/RunningNxWM.txt b/configs/sama5d4-ek/RunningNxWM.txt
index a10660a65f..e3fb5d23c8 100644
--- a/configs/sama5d4-ek/RunningNxWM.txt
+++ b/configs/sama5d4-ek/RunningNxWM.txt
@@ -104,7 +104,7 @@ the following icons will be visible:
pause, fast forward, rewind, and adjust the volume.
Unfortunately in this version, the WM8904 audio CODEC is stubbed out so
- you will not actually be able to heard any of the .WAV files that you
+ you will not actually be able to heard any of the .WAV files that you
Telnet access:
==============
diff --git a/configs/sama5d4-ek/include/board.h b/configs/sama5d4-ek/include/board.h
index 4adea19bc8..807fece06d 100644
--- a/configs/sama5d4-ek/include/board.h
+++ b/configs/sama5d4-ek/include/board.h
@@ -228,8 +228,8 @@
#define BOARD_EBICS3_NAND_DATAADDR 0x60000000
/* Pin disambiguation ***************************************************************/
-/* Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
- * Drivers, however, will use the pin selection without the numeric suffix.
+/* Alternative pin selections are provided with a numeric suffix like _1, _2, etc.
+ * Drivers, however, will use the pin selection without the numeric suffix.
* Additional definitions are required in this board.h file. For example, if we
* wanted the PCK0on PB26, then the following definition should appear in the
* board.h header file for that board:
diff --git a/configs/saml21-xplained/README.txt b/configs/saml21-xplained/README.txt
index c55ff4fab8..f2a3cc79a3 100644
--- a/configs/saml21-xplained/README.txt
+++ b/configs/saml21-xplained/README.txt
@@ -478,7 +478,7 @@ Serial Consoles
Atmel Studio 6.1
================
- NOTE: These instructions are old. The SAML21 requires Atmel Studio 6.2.
+ NOTE: These instructions are old. The SAML21 requires Atmel Studio 6.2.
They may still prove useful to you, however.
Loading Code into FLASH:
diff --git a/configs/samv71-xult/README.txt b/configs/samv71-xult/README.txt
index 7b190de0e1..e47eb987ca 100644
--- a/configs/samv71-xult/README.txt
+++ b/configs/samv71-xult/README.txt
@@ -2369,7 +2369,7 @@ Configuration sub-directories
2106-04-23: The NxImage test was selected because it is a very simple
graphics test. Continued testing, however, requires a more complex
configuration. Hence, the vnxwm configuration was created.
-
+
A memory clobber error was fixed and this probably corrects some of
the reliability problems noted on 2016-04-21.
diff --git a/configs/sim/NETWORK-LINUX.txt b/configs/sim/NETWORK-LINUX.txt
index 9e2d3c6926..796d9882bc 100644
--- a/configs/sim/NETWORK-LINUX.txt
+++ b/configs/sim/NETWORK-LINUX.txt
@@ -7,7 +7,7 @@ routed case no special configuration is necessary, but by default the
simulation will only be accessible to the host on which it runs.
Bridge mode is recommended where possible. It requires slightly more effort
-to set up, but is much more flexible, and is likely to be easier to maintain
+to set up, but is much more flexible, and is likely to be easier to maintain
in the end.
@@ -27,7 +27,7 @@ able to see it until the simulation is stopped. The host route will force all
traffic destined for that IP to be sent to the tap interface.
NOTE: If you configure an IP address that is not on the same subnet as your
- host, additional manual setup will be required. This is not
+ host, additional manual setup will be required. This is not
recommended; you should use bridge mode instead.
@@ -90,22 +90,22 @@ network as your eth1 interface. Note that your bridge will generally not need
an IP address in this case.
If you only have a single interface, you can configure your system so that eth0
-(or other primary interface) is on the bridge. To do this, you would execute
+(or other primary interface) is on the bridge. To do this, you would execute
commands like the following from the system console:
# brctl addbr nuttx0
# brctl addif nuttx0 eth0
# ifconfig nuttx0
# route add -net default gw ...
-
+
The rest of your network configuration would remain the same; your host's IP
address has simply moved from being assigned directly to the ethernet interface,
-to being assigned to the bridge that contains that interface. The connection
+to being assigned to the bridge that contains that interface. The connection
will operate as normal. NuttX simulations will join the bridge as with the
previous example.
In either of the live access scenarios presented here, the default gateway you
-configure in your simluation should be the normal one for the network you're
+configure in your simluation should be the normal one for the network you're
accessing, whether or not the bridge has an IP address. The bridge is acting
as an ethernet hub; your simluation has direct access to the normal gateway as
if the simluation were a device physically connected to the network.
@@ -113,7 +113,7 @@ if the simluation were a device physically connected to the network.
CONFIGURING AT STARTUP
----------------------
-Most Linux distributions have a mechanism for configuring a bridge at startup.
+Most Linux distributions have a mechanism for configuring a bridge at startup.
See your distribution's documentation for more information.
@@ -122,7 +122,7 @@ NOTES
o Users of VMware ESXi should be aware that the bridge will place the contained
ethernet interface into promiscuous mode (don't ask me why). ESXi will
- reject this by default, and nothing will work. To fix this, edit the
+ reject this by default, and nothing will work. To fix this, edit the
properties of the relevant vSwitch or VLAN, select the Security tab, and
set "Promiscuous Mode" to "Accept".
diff --git a/configs/sim/sixlowpan/defconfig b/configs/sim/sixlowpan/defconfig
index 8cfb733c96..4360a71b20 100644
--- a/configs/sim/sixlowpan/defconfig
+++ b/configs/sim/sixlowpan/defconfig
@@ -556,6 +556,9 @@ CONFIG_NET_6LOWPAN_MAXAGE=20
CONFIG_NET_6LOWPAN_MAX_MACTRANSMITS=4
CONFIG_NET_6LOWPAN_MTU=1294
CONFIG_NET_6LOWPAN_TCP_RECVWNDO=102
+CONFIG_NET_HAVE_STAR=y
+# CONFIG_NET_IPFORWARD is not set
+# CONFIG_NET_STAR is not set
#
# Socket Support
@@ -713,6 +716,7 @@ CONFIG_IEEE802154_DEFAULT_EADDR=0x00fade00deadbeef
CONFIG_MAC802154_HPWORK=y
CONFIG_MAC802154_NTXDESC=3
CONFIG_MAC802154_NNOTIF=3
+CONFIG_MAC802154_NPANDESC=5
CONFIG_IEEE802154_IND_PREALLOC=20
CONFIG_IEEE802154_IND_IRQRESERVE=10
# CONFIG_IEEE802154_MACDEV is not set
@@ -894,6 +898,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=2048
# CONFIG_EXAMPLES_MODBUS is not set
# CONFIG_EXAMPLES_MOUNT is not set
CONFIG_EXAMPLES_NETTEST=y
+CONFIG_EXAMPLES_NETTEST_SENDSIZE=4096
CONFIG_EXAMPLES_NETTEST_STACKSIZE1=4096
CONFIG_EXAMPLES_NETTEST_PRIORITY1=100
CONFIG_EXAMPLES_NETTEST_LOOPBACK=y
@@ -1028,6 +1033,7 @@ CONFIG_NETUTILS_NETLIB=y
# CONFIG_NETUTILS_NTPCLIENT is not set
# CONFIG_NETUTILS_PPPD is not set
# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TELNETC is not set
# CONFIG_NETUTILS_TELNETD is not set
# CONFIG_NETUTILS_TFTPC is not set
# CONFIG_NETUTILS_WEBCLIENT is not set
@@ -1103,6 +1109,7 @@ CONFIG_NSH_DISABLE_SHUTDOWN=y
# CONFIG_NSH_DISABLE_SLEEP is not set
# CONFIG_NSH_DISABLE_TIME is not set
# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_TELNETD is not set
# CONFIG_NSH_DISABLE_UMOUNT is not set
# CONFIG_NSH_DISABLE_UNAME is not set
# CONFIG_NSH_DISABLE_UNSET is not set
diff --git a/configs/sim/src/sim_gpio.c b/configs/sim/src/sim_gpio.c
index bd9c499457..42052574fa 100644
--- a/configs/sim/src/sim_gpio.c
+++ b/configs/sim/src/sim_gpio.c
@@ -108,7 +108,7 @@ static const struct gpio_operations_s gpint_ops =
static struct simgpio_dev_s g_gpin =
{
- .gpio =
+ .gpio =
{
.gp_pintype = GPIO_INPUT_PIN,
.gp_ops = &gpin_ops,
@@ -117,7 +117,7 @@ static struct simgpio_dev_s g_gpin =
static struct simgpio_dev_s g_gpout =
{
- .gpio =
+ .gpio =
{
.gp_pintype = GPIO_OUTPUT_PIN,
.gp_ops = &gpout_ops,
@@ -128,7 +128,7 @@ static struct simgpint_dev_s g_gpint =
{
.simgpio =
{
- .gpio =
+ .gpio =
{
.gp_pintype = GPIO_INTERRUPT_PIN,
.gp_ops = &gpint_ops,
@@ -171,14 +171,14 @@ static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
gpioinfo("Writing %d\n", (int)value);
simgpio->value = value;
- return OK;
+ return OK;
}
static int gpint_attach(FAR struct gpio_dev_s *dev,
pin_interrupt_t callback)
{
FAR struct simgpint_dev_s *simgpint = (FAR struct simgpint_dev_s *)dev;
-
+
gpioinfo("Cancel 1 second timer\n");
wd_cancel(simgpint->wdog);
diff --git a/configs/stm3210e-eval/README.txt b/configs/stm3210e-eval/README.txt
index b622630f98..3bfa7ea89c 100644
--- a/configs/stm3210e-eval/README.txt
+++ b/configs/stm3210e-eval/README.txt
@@ -361,7 +361,7 @@ Temperature Sensor
bytesread = read(fd, buffer, 8*sizeof(b16_t)); /* Read temperature samples */
More complex temperature sensor operations are also available. See the
- IOCTL commands enumerated in include/nuttx/sensors/lm75.h. Also read the
+ IOCTL commands enumerated in include/nuttx/sensors/lm75.h. Also read the
descriptions of the stm32_lm75initialize() and stm32_lm75attach()
interfaces in the arch/board/board.h file (sames as
configs/stm3210e-eval/include/board.h).
diff --git a/configs/stm32f103-minimum/README.txt b/configs/stm32f103-minimum/README.txt
index dc227e443f..23bb4d357d 100644
--- a/configs/stm32f103-minimum/README.txt
+++ b/configs/stm32f103-minimum/README.txt
@@ -356,15 +356,15 @@ Nokia 5110 LCD Display support:
After compiling and flashing the nuttx.bin inside the board, reset it.
You should see it:
- NuttShell (NSH)
+ NuttShell (NSH)
nsh> ?
- help usage: help [-v] []
+ help usage: help [-v] []
- [ dd free mb sh usleep
- ? echo help mh sleep xd
- cat exec hexdump mw test
- cd exit kill pwd true
- cp false ls set unset
+ [ dd free mb sh usleep
+ ? echo help mh sleep xd
+ cat exec hexdump mw test
+ cd exit kill pwd true
+ cp false ls set unset
Builtin Apps:
nxhello
diff --git a/configs/stm32f3discovery/README.txt b/configs/stm32f3discovery/README.txt
index c3783d1606..1fcf2c6a6d 100644
--- a/configs/stm32f3discovery/README.txt
+++ b/configs/stm32f3discovery/README.txt
@@ -416,10 +416,10 @@ https://github.com/texane/stlink
--------------------------------
This is an open source server for the ST-Link that I have never used.
-It is also possible to use an external debugger such as the Segger JLink
+It is also possible to use an external debugger such as the Segger JLink
(EDU or commercial models) provided:
-1) The CN4 jumpers are removed to disconnect the on-board STLinkV2 from
+1) The CN4 jumpers are removed to disconnect the on-board STLinkV2 from
the STM32F3.
2) The appropriate (20 pin connector to flying wire) adapter is used to connect
@@ -433,7 +433,7 @@ It is also possible to use an external debugger such as the Segger JLink
The signals used with external (SWD) debugging are:
- VREF (3V)
+ VREF (3V)
GROUND (GND)
SWCLK (PA14)
SWIO (PA13)
diff --git a/configs/stm32f3discovery/include/board.h b/configs/stm32f3discovery/include/board.h
index bde225476e..b7980121b6 100644
--- a/configs/stm32f3discovery/include/board.h
+++ b/configs/stm32f3discovery/include/board.h
@@ -224,11 +224,11 @@
/* Alternate function pin selections ************************************************/
/* USART
- *
+ *
* USART1: Hardwired to embedded STLinkV2 hardware debugger
* RX (PC5)
* TX (PC4)
- *
+ *
* USART2: Connect to an external UART<->RS232 transceiver for use as console.
* RX (PA3)
* TX (PA2)
@@ -237,30 +237,30 @@
#define GPIO_USART2_RX GPIO_USART2_RX_2
#define GPIO_USART2_TX GPIO_USART2_TX_2
-/* SPI
- *
- * SPI1: Hardwired to ST L3GD20 MEMS device
+/* SPI
+ *
+ * SPI1: Hardwired to ST L3GD20 MEMS device
* MISO (PA6)
* MSOI (PA7)
- * SCK (PA5)
- */
+ * SCK (PA5)
+ */
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
/* I2C
- *
+ *
* I2C1: Accessible via expansion headers
* SCL (PA15)
* SDA (PA14)
- * SMBA (PB5)
- *
- * I2C2: Accessible via expansion headers
+ * SMBA (PB5)
+ *
+ * I2C2: Accessible via expansion headers
* SCL (PA9)
* SDA (PA10)
* SMBA (PB12)
- */
+ */
#ifdef CONFIG_STM32_I2C1
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1
diff --git a/configs/stm32f4discovery/src/stm32_max6675.c b/configs/stm32f4discovery/src/stm32_max6675.c
index 1b298daf9f..304efc787d 100644
--- a/configs/stm32f4discovery/src/stm32_max6675.c
+++ b/configs/stm32f4discovery/src/stm32_max6675.c
@@ -88,7 +88,7 @@ int stm32_max6675initialize(FAR const char *devpath)
}
/* Then register the barometer sensor */
-
+
ret = max6675_register(devpath, spi);
if (ret < 0)
{
diff --git a/configs/stm32f4discovery/src/stm32_rgbled.c b/configs/stm32f4discovery/src/stm32_rgbled.c
index 8f6fd9c8e7..07e67744aa 100644
--- a/configs/stm32f4discovery/src/stm32_rgbled.c
+++ b/configs/stm32f4discovery/src/stm32_rgbled.c
@@ -2,7 +2,7 @@
* configs/stm32f4discovery/src/stm32_rgbled.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Alan Carvalho de Assis
+ * Author: Alan Carvalho de Assis
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
diff --git a/configs/stm32f746g-disco/README.txt b/configs/stm32f746g-disco/README.txt
index a3477a5997..651d5aca93 100644
--- a/configs/stm32f746g-disco/README.txt
+++ b/configs/stm32f746g-disco/README.txt
@@ -2,7 +2,7 @@ README
======
This README discusses issues unique to NuttX configurations for the
-STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6
+STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6
MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash
memory and 300Kb SRAM. The board features:
diff --git a/configs/teensy-2.0/scripts/flash.ld b/configs/teensy-2.0/scripts/flash.ld
index c6d5cac3e8..ab77b722b6 100644
--- a/configs/teensy-2.0/scripts/flash.ld
+++ b/configs/teensy-2.0/scripts/flash.ld
@@ -139,7 +139,7 @@ SECTIONS
.data :
{
_sdata = ABSOLUTE(.);
- *(.rodata .rodata.*)
+ *(.rodata .rodata.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
diff --git a/configs/tm4c123g-launchpad/README.txt b/configs/tm4c123g-launchpad/README.txt
index cdb2d2ca89..b5c097a79a 100644
--- a/configs/tm4c123g-launchpad/README.txt
+++ b/configs/tm4c123g-launchpad/README.txt
@@ -88,7 +88,7 @@ AT24 Serial EEPROM
----------------
A AT24C512 Serial EEPPROM was used for tested I2C. There are no I2C
- devices on-board the Launchpad, but an external serial EEPROM module
+ devices on-board the Launchpad, but an external serial EEPROM module
module was used.
The Serial EEPROM was mounted on an external adaptor board and connected
diff --git a/configs/tm4c123g-launchpad/src/tm4c_at24.c b/configs/tm4c123g-launchpad/src/tm4c_at24.c
index a6e97591f3..01a447e1e6 100644
--- a/configs/tm4c123g-launchpad/src/tm4c_at24.c
+++ b/configs/tm4c123g-launchpad/src/tm4c_at24.c
@@ -36,7 +36,7 @@
/* AT24 Serial EEPROM
*
* A AT24C512 Serial EEPPROM was used for tested I2C. There are no I2C
- * devices on-board the Launchpad, but an external serial EEPROM module
+ * devices on-board the Launchpad, but an external serial EEPROM module
* module was used.
*
* The Serial EEPROM was mounted on an external adaptor board and connected
diff --git a/configs/twr-k64f120m/README.txt b/configs/twr-k64f120m/README.txt
index 6c69686a84..b8f1b423d1 100644
--- a/configs/twr-k64f120m/README.txt
+++ b/configs/twr-k64f120m/README.txt
@@ -68,19 +68,19 @@ Micro-USB K64_MICRO_USB_DN USB0_DN
Pushbuttons SW1 (LLWU_P10) PTC6 PTC6
SW2 (RSTIN_B_R) RSTIN RESET
SW3 (NMI B) PTA4 PTA4
-LEDs D5 / Green LED PTE6 PTE6
- D6 / Yellow LED PTE7 PTE7
- D7 / Orange LED PTE8 PTE8
- D9 / Blue LED PTE9 PTE9
+LEDs D5 / Green LED PTE6 PTE6
+ D6 / Yellow LED PTE7 PTE7
+ D7 / Orange LED PTE8 PTE8
+ D9 / Blue LED PTE9 PTE9
Potentiometer Potentiometer (R526) ? ADC1_SE18
Accelerometer I2C SDA PTC11 I2C1_SDA
I2C SCL PTC10 I2C1_SCL
INT1 PTA6 PTA6
INT2 PTA8 PTA8
-
+
SDHC important notice: on TWR-K64F120M, R521 (close to the SD card holder) is not placed,
hence WRPROTEC is always ON. Either place a 4.7KOhm resistor or change PIN config
-to PULLDOWN, loosing Write Protect function. See twrk64.h.
+to PULLDOWN, loosing Write Protect function. See twrk64.h.
Connections via the General Purpose Tower Plug-in (TWRPI) Socket
-------------------- ------------------------- -------- -------------------
@@ -265,7 +265,7 @@ Networking Support
From the target side, you may should also be able to ping the host
(assuming it's IP is 192.168.0.1):
-
+
nsh> ping 192.168.0.1
PING 192.168.0.1 56 bytes of data
56 bytes from 192.168.0.1: icmp_seq=1 time=0 ms
@@ -279,7 +279,7 @@ Networking Support
56 bytes from 192.168.0.1: icmp_seq=9 time=0 ms
56 bytes from 192.168.0.1: icmp_seq=10 time=0 ms
10 packets transmitted, 10 received, 0% packet loss, time 10100 ms
- nsh>
+ nsh>
You can also log into the NSH from the host PC like this:
@@ -409,7 +409,7 @@ as follows:
* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
** The normal state is LED1 ON and LED2 faintly glowing. This faint glow
- is because of timer interrupts and signal that result in the LED being
+ is because of timer interrupts and signal that result in the LED being
illuminated on a small proportion of the time.
*** LED3 may even glow faintlier then LED2 while signals are processed.
@@ -798,18 +798,18 @@ Where is one of the following:
CONFIG_SCHED_WORKQUEUE=y : Enable the NuttX workqueue
CONFIG_NSH_ARCHINIT=y : Provide NSH initializeation logic
-
+
netnsh:
------
This is the same config then nsh, but it adds Ethernet support with the
TWR-SER card. It includes telnetd in order to access nsh from Ethernet.
IP address defaults to 192.168.0.233/24.
-
+
NOTES:
1. See networking support for application and especially for jumper setting.
In this config, this is TWR-SER that clocks the MCU.
-
+
2. The PHY link negotiation is done at boot time only. If no link is then
available, a fallback mode is used at 10Mbs/half-duplex. Please make sure
your ethernet cable and switches are on before booting.
diff --git a/configs/twr-k64f120m/include/board.h b/configs/twr-k64f120m/include/board.h
index 107c5f617e..5cbedfbb38 100644
--- a/configs/twr-k64f120m/include/board.h
+++ b/configs/twr-k64f120m/include/board.h
@@ -130,10 +130,10 @@
/* LED definitions ******************************************************************/
/* The TWR-K64F120M has four LEDs:
*
- * 1. D5 / Green LED PTE6
- * 2. D6 / Yellow LED PTE7
- * 3. D7 / Orange LED PTE8
- * 4 D9 / Blue LED PTE9
+ * 1. D5 / Green LED PTE6
+ * 2. D6 / Yellow LED PTE7
+ * 3. D7 / Orange LED PTE8
+ * 4 D9 / Blue LED PTE9
*
* LED4 is reservered for user.
* The 3 first LEDs are encoded as follows:
diff --git a/configs/twr-k64f120m/src/k64_appinit.c b/configs/twr-k64f120m/src/k64_appinit.c
index 66d11d94d9..3a436260d1 100644
--- a/configs/twr-k64f120m/src/k64_appinit.c
+++ b/configs/twr-k64f120m/src/k64_appinit.c
@@ -102,7 +102,7 @@ int board_app_initialize(uintptr_t arg)
return ret;
}
#endif
-
+
#ifdef HAVE_MMCSD
/* Initialize the MMC/SD driver and possible automount */
diff --git a/configs/twr-k64f120m/src/k64_leds.c b/configs/twr-k64f120m/src/k64_leds.c
index ec120b4faf..e6e1c2b524 100644
--- a/configs/twr-k64f120m/src/k64_leds.c
+++ b/configs/twr-k64f120m/src/k64_leds.c
@@ -52,10 +52,10 @@
/* The TWR-K64F120M has four LEDs:
*
- * 1. D5 / Green LED PTE6
- * 2. D6 / Yellow LED PTE7
- * 3. D7 / Orange LED PTE8
- * 4 D9 / Blue LED PTE9
+ * 1. D5 / Green LED PTE6
+ * 2. D6 / Yellow LED PTE7
+ * 3. D7 / Orange LED PTE8
+ * 4 D9 / Blue LED PTE9
*
* LED4 is reservered for user.
*/
diff --git a/configs/twr-k64f120m/src/twrk64.h b/configs/twr-k64f120m/src/twrk64.h
index 5de682600e..7bc66273f6 100644
--- a/configs/twr-k64f120m/src/twrk64.h
+++ b/configs/twr-k64f120m/src/twrk64.h
@@ -222,7 +222,7 @@ TODO See README
*/
#endif
-/* SDHC
+/* SDHC
important notice: on TWR-K64F120M, R521 (close to the SD card holder) is not placed,
hence WRPROTEC is always ON. Either place a 4.7KOhm resistor or change PIN config
to PULLDOWN, loosing Write Protect function */
diff --git a/configs/xmc4500-relax/README.txt b/configs/xmc4500-relax/README.txt
index 7c3e3d6ef6..0b64790b2c 100644
--- a/configs/xmc4500-relax/README.txt
+++ b/configs/xmc4500-relax/README.txt
@@ -19,7 +19,7 @@ Serial Console
Be default, UART0 (aka, USIC0, channel 0) is used as the serial console.
The RX and TX pins is available:
-
+
RX - P1.4, Connector X2, pin 17
TX - P1.5, Connector X2, pin 16
GND - Available on pins 1-4 of either connector X1 or X2
@@ -47,7 +47,7 @@ LEDs
defined. In that case, the usage by the board port is defined in
include/board.h and src/sam_autoleds.c. The LEDs are used to encode
OS-related events as follows:
-
+
SYMBOL Meaning LED state
LED1 LED2
------------------ ------------------------ ------ ------
diff --git a/configs/z16f2800100zcog/pashello/defconfig b/configs/z16f2800100zcog/pashello/defconfig
index 5b5a904ad0..5e5a378549 100644
--- a/configs/z16f2800100zcog/pashello/defconfig
+++ b/configs/z16f2800100zcog/pashello/defconfig
@@ -729,7 +729,7 @@ CONFIG_INTERPRETERS_PCODE=y
# CONFIG_SYSTEM_HEX2BIN is not set
# CONFIG_SYSTEM_HEXED is not set
# CONFIG_SYSTEM_INSTALL is not set
-CONFIG_SYSTEM_PRUN=y
+CONFIG_SYSTEM_PRUN=y
# CONFIG_SYSTEM_RAMTEST is not set
# CONFIG_READLINE_HAVE_EXTMATCH is not set
# CONFIG_SYSTEM_READLINE is not set
diff --git a/drivers/can/mcp2515.c b/drivers/can/mcp2515.c
index 10ab6e2508..df1092bfaa 100644
--- a/drivers/can/mcp2515.c
+++ b/drivers/can/mcp2515.c
@@ -330,13 +330,13 @@ static void mcp2515_readregs(FAR struct mcp2515_can_s *priv, uint8_t regaddr,
(void)SPI_SEND(config->spi, regaddr);
SPI_RECVBLOCK(config->spi, buffer, len);
-
+
/* Deselect the MCP2515 */
-
+
SPI_SELECT(config->spi, SPIDEV_CANBUS(0), false);
-
+
/* Unlock bus */
-
+
(void)SPI_LOCK(config->spi, false);
#ifdef CONFIG_CANBUS_REGDEBUG
@@ -390,13 +390,13 @@ static void mcp2515_writeregs(FAR struct mcp2515_can_s *priv, uint8_t regaddr,
(void)SPI_SEND(config->spi, regaddr);
SPI_SNDBLOCK(config->spi, buffer, len);
-
+
/* Deselect the MCP2515 */
-
+
SPI_SELECT(config->spi, SPIDEV_CANBUS(0), false);
-
+
/* Unlock bus */
-
+
(void)SPI_LOCK(config->spi, false);
}
@@ -434,21 +434,21 @@ static void mcp2515_modifyreg(FAR struct mcp2515_can_s *priv, uint8_t regaddr,
/* Send the register address */
(void)SPI_SEND(config->spi, regaddr);
-
+
/* Send the mask */
(void)SPI_SEND(config->spi, mask);
-
+
/* Send the value */
(void)SPI_SEND(config->spi, value);
-
+
/* Deselect the MCP2515 */
-
+
SPI_SELECT(config->spi, SPIDEV_CANBUS(0), false);
-
+
/* Unlock bus */
-
+
(void)SPI_LOCK(config->spi, false);
}
@@ -564,7 +564,7 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
* filterN = RXF0reg + offset + ((priv->nalloc - 1) * 4) ;
* maskN = RXM0reg + offset
*/
-
+
if (priv->nalloc <= 3)
{
offset = 0;
@@ -622,13 +622,13 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
/* EID0 - EID7 */
regval = (uint8_t) (extconfig->xf_id1 & 0xff);
- mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
((priv->nalloc - 1) * 4), ®val, 1);
/* EID8 - EID15 */
regval = (uint8_t) ((extconfig->xf_id1 & 0xff00) >> 8);
- mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
((priv->nalloc - 1) * 4), ®val, 1);
/* EID16 - EID17 */
@@ -638,14 +638,14 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
/* STD0 - STD2*/
regval = (regval) | (uint8_t) (((extconfig->xf_id1 & 0x1C0000) >> 16) << 3);
- mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), ®val, 1);
/* STD3 - STD10 */
regval = (uint8_t) ((extconfig->xf_id1 & 0x1fe00000 ) >> 21);
regval |= RXFSIDL_EXIDE;
- mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), ®val, 1);
/* Setup the Mask */
@@ -683,14 +683,14 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
/* EID0 - EID7 */
regval = (uint8_t) (extconfig->xf_id1 & 0xff);
- mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
((priv->nalloc - 1) * 4), ®val, 1);
mcp2515_writeregs(priv, MCP2515_RXM0EID0 + offset, ®val, 1);
/* EID8 - EID15 */
regval = (uint8_t) ((extconfig->xf_id1 & 0xff00) >> 8);
- mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
((priv->nalloc - 1) * 4), ®val, 1);
mcp2515_writeregs(priv, MCP2515_RXM0EID8 + offset, ®val, 1);
@@ -700,16 +700,16 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
/* STD0 - STD2 */
- regval = (regval) | (uint8_t) (((extconfig->xf_id1 &
+ regval = (regval) | (uint8_t) (((extconfig->xf_id1 &
0x1c0000) >> 16) << 3) | RXFSIDL_EXIDE;
- mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), ®val, 1);
mcp2515_writeregs(priv, MCP2515_RXM0SIDL + offset, ®val, 1);
/* STD3 - STD10 */
regval = (uint8_t) ((extconfig->xf_id1 & 0x1fe00000 ) >> 21);
- mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), ®val, 1);
mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset, ®val, 1);
}
@@ -888,7 +888,7 @@ static int mcp2515_add_stdfilter(FAR struct mcp2515_can_s *priv,
* filterN = RXF0reg + offset + ((priv->nalloc - 1) * 4) ;
* maskN = RXM0reg + offset
*/
-
+
if (priv->nalloc <= 3)
{
offset = 0;
@@ -944,11 +944,11 @@ static int mcp2515_add_stdfilter(FAR struct mcp2515_can_s *priv,
/* Setup the Filter */
regval = (uint8_t) (((stdconfig->sf_id1) & 0x7f8) >> 3);
- mcp2515_writeregs(priv, MCP2515_RXF0SIDH + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0SIDH + offset +
((priv->nalloc - 1) * 4), ®val, 1);
regval = (uint8_t) ((stdconfig->sf_id1 & 0x07 ) << 5);
- mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), ®val, 1);
/* Setup the Mask */
@@ -966,12 +966,12 @@ static int mcp2515_add_stdfilter(FAR struct mcp2515_can_s *priv,
/* Setup the Filter */
regval = (uint8_t) (((stdconfig->sf_id1) & 0x7f8) >> 3);
- mcp2515_writeregs(priv, MCP2515_RXF0SIDH + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0SIDH + offset +
((priv->nalloc - 1) * 4), ®val, 1);
mcp2515_writeregs(priv, MCP2515_RXM0SIDH + offset, ®val, 1);
regval = (uint8_t) ((stdconfig->sf_id1 & 0x07 ) << 5);
- mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0SIDL + offset +
((priv->nalloc - 1) * 4), ®val, 1);
mcp2515_writeregs(priv, MCP2515_RXM0SIDL + offset, ®val, 1);
}
@@ -979,9 +979,9 @@ static int mcp2515_add_stdfilter(FAR struct mcp2515_can_s *priv,
/* We need to clear the extended ID bits */
regval = 0;
- mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0EID0 + offset +
((priv->nalloc - 1) * 4), ®val, 1);
- mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
+ mcp2515_writeregs(priv, MCP2515_RXF0EID8 + offset +
((priv->nalloc - 1) * 4), ®val, 1);
mcp2515_writeregs(priv, MCP2515_RXM0EID0 + offset, ®val, 1);
mcp2515_writeregs(priv, MCP2515_RXM0EID8 + offset, ®val, 1);
@@ -1467,7 +1467,7 @@ static int mcp2515_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
* PHSEG1 == PHSEG2 (PHSEG2 = TSEG2)
*
* See more at:
- *
+ *
* http://www.analog.com/en/analog-dialogue/articles/configure-can-bit-timing.html
*/
diff --git a/drivers/contactless/mfrc522.h b/drivers/contactless/mfrc522.h
index 9bc3903fd4..f0d9ae06a7 100644
--- a/drivers/contactless/mfrc522.h
+++ b/drivers/contactless/mfrc522.h
@@ -289,10 +289,10 @@
#define MFRC522_INV_MOD (1 << 3) /* modulation of transmitted data is inverted */
#define MFRC522_TX_SPEED_MASK (7 << 4) /* defines the bit rate during data transmission */
-#define MFRC522_TX_106KBD (0 << 4) /* 106 kBd */
-#define MFRC522_TX_212KBD (1 << 4) /* 212 kBd */
-#define MFRC522_TX_424KBD (2 << 4) /* 424 kBd */
-#define MFRC522_TX_848KBD (3 << 4) /* 848 kBd */
+#define MFRC522_TX_106KBD (0 << 4) /* 106 kBd */
+#define MFRC522_TX_212KBD (1 << 4) /* 212 kBd */
+#define MFRC522_TX_424KBD (2 << 4) /* 424 kBd */
+#define MFRC522_TX_848KBD (3 << 4) /* 848 kBd */
/* 4-7 << 4 - reserved */
#define MFRC522_TX_CRC_EN (1 << 7) /* enables CRC generation during data transmission */
@@ -301,10 +301,10 @@
#define MFRC522_RX_MULTIPLE (1 << 2) /* enable to receive more than one data frame, only at 106kBd */
#define MFRC522_RX_NO_ERR (1 << 3) /* ignore invalid data stream error (less than 4 bits received) */
#define MFRC522_RX_SPEED_MASK (7 << 4) /* defines the bit rate during data reception */
-#define MFRC522_RX_106KBD (0 << 4) /* 106 kBd */
-#define MFRC522_RX_212KBD (1 << 4) /* 212 kBd */
-#define MFRC522_RX_424KBD (2 << 4) /* 424 kBd */
-#define MFRC522_RX_848KBD (3 << 4) /* 848 kBd */
+#define MFRC522_RX_106KBD (0 << 4) /* 106 kBd */
+#define MFRC522_RX_212KBD (1 << 4) /* 212 kBd */
+#define MFRC522_RX_424KBD (2 << 4) /* 424 kBd */
+#define MFRC522_RX_848KBD (3 << 4) /* 848 kBd */
/* 4-7 << 4 - reserved */
#define MFRC522_RX_CRC_EN (1 << 7) /* enables CRC generation during data reception */
diff --git a/drivers/contactless/pn532.c b/drivers/contactless/pn532.c
index 974173350c..83acfa35f8 100644
--- a/drivers/contactless/pn532.c
+++ b/drivers/contactless/pn532.c
@@ -462,7 +462,7 @@ int pn532_read_ack(struct pn532_dev_s *dev)
*
* Construct frame with
* pn532_frame_init(), pn532_frame_finish()
- *
+ *
* Input Parameters:
* dev - Device instance
* f - Pointer to start frame
diff --git a/drivers/ioexpander/gpio_lower_half.c b/drivers/ioexpander/gpio_lower_half.c
index a18d946e85..86d26e9e62 100644
--- a/drivers/ioexpander/gpio_lower_half.c
+++ b/drivers/ioexpander/gpio_lower_half.c
@@ -60,7 +60,7 @@ struct gplh_dev_s
/* Publically visible lower-half state */
struct gpio_dev_s gpio;
-
+
/* Private lower half data follows */
uint8_t pin; /* I/O expander pin ID */
diff --git a/drivers/ioexpander/pcf8574.c b/drivers/ioexpander/pcf8574.c
index 53b938d03e..e8fda2986e 100644
--- a/drivers/ioexpander/pcf8574.c
+++ b/drivers/ioexpander/pcf8574.c
@@ -685,7 +685,7 @@ static int pcf8574_multireadpin(FAR struct ioexpander_dev_s *dev,
gpioinfo("%d. pin=%u value=%u\n", pin, values[i]);
}
-
+
ret = OK;
errout_with_lock:
diff --git a/drivers/lcd/pcd8544.h b/drivers/lcd/pcd8544.h
index f5982b9fb7..9b03af9407 100644
--- a/drivers/lcd/pcd8544.h
+++ b/drivers/lcd/pcd8544.h
@@ -65,8 +65,8 @@
#define PCD8544_DISP_NORMAL 0x04 /* normal mode */
#define PCD8544_DISP_INVERT 0x05 /* inverse video mode */
-#define PCD8544_SET_Y_ADDR (1 << 6) /* Set the Y bank 0-5 */
-#define PCD8544_SET_X_ADDR (1 << 7) /* Set the X bank 0-83 */
+#define PCD8544_SET_Y_ADDR (1 << 6) /* Set the Y bank 0-5 */
+#define PCD8544_SET_X_ADDR (1 << 7) /* Set the X bank 0-83 */
/* Command with Instructon Set H = 1 */
diff --git a/drivers/lcd/pcf8574_lcd_backpack.c b/drivers/lcd/pcf8574_lcd_backpack.c
index 4729481a57..6979539c48 100644
--- a/drivers/lcd/pcf8574_lcd_backpack.c
+++ b/drivers/lcd/pcf8574_lcd_backpack.c
@@ -1016,19 +1016,19 @@ static void lcd_fpos_to_curpos(FAR struct pcf8574_lcd_dev_s *priv,
off_t fpos, uint8_t *row, uint8_t *col, bool* onlf)
{
int virtcols;
-
+
virtcols = (priv->cfg.cols + 1);
-
+
/* Determine if this is a 'virtual' position (on the synthetic LF) */
*onlf = (priv->cfg.cols == fpos % virtcols);
/* Adjust off any preceding synthetic LF's to get linear position */
-
+
fpos -= fpos / virtcols;
-
+
/* Compute row/col from linear position */
-
+
*row = fpos / priv->cfg.cols;
*col = fpos % priv->cfg.cols;
}
@@ -1046,7 +1046,7 @@ static void lcd_curpos_to_fpos(FAR struct pcf8574_lcd_dev_s *priv,
uint8_t row, uint8_t col, off_t* fpos)
{
/* the logical file position is the linear position plus any synthetic LF */
-
+
*fpos = (row * priv->cfg.cols) + col + row;
}
@@ -1108,7 +1108,7 @@ static int pcf8574_lcd_close(FAR struct file *filep)
/* If we had previously unlinked, but there were open references at the
* time, we need to do the final teardown now.
*/
-
+
if (priv->refs == 0 && priv->unlinked)
{
/* We have no real teardown at present */
@@ -1158,11 +1158,11 @@ static ssize_t pcf8574_lcd_read(FAR struct file *filep, FAR char *buffer,
while (nIdx < buflen && row < priv->cfg.rows)
{
/* Synthesize end-of-line LF and advance to start of next row */
-
+
if (onlf)
{
/* Synthesize LF for all but last row */
-
+
if ( row < priv->cfg.rows-1)
{
buffer[nIdx] = '\x0a';
diff --git a/drivers/lcd/ssd1306.h b/drivers/lcd/ssd1306.h
index d1795cd299..f8fcaa3097 100644
--- a/drivers/lcd/ssd1306.h
+++ b/drivers/lcd/ssd1306.h
@@ -282,7 +282,7 @@ void ssd1306_configspi(FAR struct spi_dev_s *spi);
# define ssd1306_select(priv, cs)
# define ssd1306_cmddata(priv, cmd)
# define ssd1306_configspi(spi)
-#endif
+#endif
#endif /* __DRIVERS_LCD_SSD1306_H */
diff --git a/drivers/lcd/ssd1306_i2c.c b/drivers/lcd/ssd1306_i2c.c
index b6e0b03805..7b134436d9 100644
--- a/drivers/lcd/ssd1306_i2c.c
+++ b/drivers/lcd/ssd1306_i2c.c
@@ -124,7 +124,7 @@ void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len)
*/
/* Send the SSD1306 register address (with no STOP) */
-
+
transfer_mode = 0x40; /* Select data transfer */
msg[0].frequency = CONFIG_SSD1306_I2CFREQ; /* I2C frequency */
diff --git a/drivers/mtd/at24xx.c b/drivers/mtd/at24xx.c
index b9076c0846..8ad9ff852a 100644
--- a/drivers/mtd/at24xx.c
+++ b/drivers/mtd/at24xx.c
@@ -278,7 +278,7 @@ static int at24c_eraseall(FAR struct at24c_dev_s *priv)
while (at24c_i2c_write(priv, at24addr, buf, AT24XX_ADDRSIZE) < 0)
{
finfo("wait\n");
- if (!wait--)
+ if (!wait--)
{
return -ETIMEDOUT;
}
@@ -344,7 +344,7 @@ static ssize_t at24c_read_internal(FAR struct at24c_dev_s *priv, off_t offset,
while (at24c_i2c_write(priv, at24addr, buf, AT24XX_ADDRSIZE) < 0)
{
finfo("wait\n");
- if (!wait--)
+ if (!wait--)
{
return -ETIMEDOUT;
}
@@ -467,7 +467,7 @@ static ssize_t at24c_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
while (at24c_i2c_write(priv, at24addr, buf, AT24XX_ADDRSIZE) < 0)
{
finfo("wait\n");
- if (!wait--)
+ if (!wait--)
{
return -ETIMEDOUT;
}
diff --git a/drivers/mtd/filemtd.c b/drivers/mtd/filemtd.c
index 6154de1d2d..aee2fb51e2 100644
--- a/drivers/mtd/filemtd.c
+++ b/drivers/mtd/filemtd.c
@@ -138,7 +138,7 @@ static int filemtd_ioctl(FAR struct mtd_dev_s *dev, int cmd,
* Name: filemtd_write
****************************************************************************/
-static ssize_t filemtd_write(FAR struct file_dev_s *priv, size_t offset,
+static ssize_t filemtd_write(FAR struct file_dev_s *priv, size_t offset,
FAR const void *src, size_t len)
{
FAR const uint8_t *pin = (FAR const uint8_t *)src;
@@ -197,16 +197,16 @@ static ssize_t filemtd_write(FAR struct file_dev_s *priv, size_t offset,
*pout++ = newvalue;
buflen--;
- /* If our buffer is full, then seek back to beginning of
- * the file and write the buffer contents
+ /* If our buffer is full, then seek back to beginning of
+ * the file and write the buffer contents
*/
if (buflen == 0)
- {
+ {
lseek(priv->fd, seekpos, SEEK_SET);
write(priv->fd, buf, sizeof(buf));
seekpos += sizeof(buf);
- }
+ }
}
/* Write remaining bytes */
@@ -282,7 +282,7 @@ static int filemtd_erase(FAR struct mtd_dev_s *dev, off_t startblock,
while (nbytes)
{
write(priv->fd, buffer, sizeof(buffer));
- nbytes -= sizeof(buffer);
+ nbytes -= sizeof(buffer);
}
return OK;
diff --git a/drivers/mtd/mx25lx.c b/drivers/mtd/mx25lx.c
index ae4833691d..8eb4fc5407 100644
--- a/drivers/mtd/mx25lx.c
+++ b/drivers/mtd/mx25lx.c
@@ -92,7 +92,7 @@
#define MX25L_MX25L6433F_SECTOR_SHIFT 12 /* Sector size 1 << 12 = 4Kb */
#define MX25L_MX25L6433F_NSECTORS 2048
#define MX25L_MX25L6433F_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */
-
+
#ifdef CONFIG_MX25L_SECTOR512 /* Simulate a 512 byte sector */
# define MX25L_SECTOR512_SHIFT 9 /* Sector size 1 << 9 = 512 bytes */
#endif
@@ -124,37 +124,37 @@
#define MX25L_DREAD 0x3b /* 1I / 2O read command 3 1 >=1 */
#define MX25L_4READ 0xeb /* 4 x I/O read command */
#define MX25L_QREAD 0x6b /* 1I / 4O read command 3 1 >=1 */
-#define MX25L_WREN 0x06 /* Write Enable 0 0 0 */
-#define MX25L_WRDI 0x04 /* Write Disable 0 0 0 */
-#define MX25L_RDSR 0x05 /* Read status register 0 0 >=1 */
-#define MX25L_RDCR 0x15 /* Read config register 0 0 >=1 */
-#define MX25L_WRSR 0x01 /* Write stat/conf register 0 0 2 */
+#define MX25L_WREN 0x06 /* Write Enable 0 0 0 */
+#define MX25L_WRDI 0x04 /* Write Disable 0 0 0 */
+#define MX25L_RDSR 0x05 /* Read status register 0 0 >=1 */
+#define MX25L_RDCR 0x15 /* Read config register 0 0 >=1 */
+#define MX25L_WRSR 0x01 /* Write stat/conf register 0 0 2 */
#define MX25L_4PP 0x38 /* Quad page program 3 0 1-256 */
#define MX25L_SE 0x20 /* 4Kb Sector erase 3 0 0 */
#define MX25L_BE32 0x52 /* 32Kbit block Erase 3 0 0 */
#define MX25L_BE64 0xd8 /* 64Kbit block Erase 3 0 0 */
-#define MX25L_CE 0xc7 /* Chip erase 0 0 0 */
-#define MX25L_CE_ALT 0x60 /* Chip erase (alternate) 0 0 0 */
+#define MX25L_CE 0xc7 /* Chip erase 0 0 0 */
+#define MX25L_CE_ALT 0x60 /* Chip erase (alternate) 0 0 0 */
#define MX25L_PP 0x02 /* Page program 3 0 1-256 */
-#define MX25L_DP 0xb9 /* Deep power down 0 0 0 */
-#define MX25L_RDP 0xab /* Release deep power down 0 0 0 */
-#define MX25L_PGM_SUSPEND 0x75 /* Suspends program 0 0 0 */
-#define MX25L_ERS_SUSPEND 0xb0 /* Suspends erase 0 0 0 */
-#define MX25L_PGM_RESUME 0x7A /* Resume program 0 0 0 */
-#define MX25L_ERS_RESUME 0x30 /* Resume erase 0 0 0 */
-#define MX25L_RDID 0x9f /* Read identification 0 0 3 */
+#define MX25L_DP 0xb9 /* Deep power down 0 0 0 */
+#define MX25L_RDP 0xab /* Release deep power down 0 0 0 */
+#define MX25L_PGM_SUSPEND 0x75 /* Suspends program 0 0 0 */
+#define MX25L_ERS_SUSPEND 0xb0 /* Suspends erase 0 0 0 */
+#define MX25L_PGM_RESUME 0x7A /* Resume program 0 0 0 */
+#define MX25L_ERS_RESUME 0x30 /* Resume erase 0 0 0 */
+#define MX25L_RDID 0x9f /* Read identification 0 0 3 */
#define MX25L_RES 0xab /* Read electronic ID 0 3 1 */
#define MX25L_REMS 0x90 /* Read manufacture and ID 1 2 >=2 */
-#define MX25L_ENSO 0xb1 /* Enter secured OTP 0 0 0 */
-#define MX25L_EXSO 0xc1 /* Exit secured OTP 0 0 0 */
-#define MX25L_RDSCUR 0x2b /* Read security register 0 0 0 */
-#define MX25L_WRSCUR 0x2f /* Write security register 0 0 0 */
-#define MX25L_RSTEN 0x66 /* Reset Enable 0 0 0 */
-#define MX25L_RST 0x99 /* Reset Memory 0 0 0 */
+#define MX25L_ENSO 0xb1 /* Enter secured OTP 0 0 0 */
+#define MX25L_EXSO 0xc1 /* Exit secured OTP 0 0 0 */
+#define MX25L_RDSCUR 0x2b /* Read security register 0 0 0 */
+#define MX25L_WRSCUR 0x2f /* Write security register 0 0 0 */
+#define MX25L_RSTEN 0x66 /* Reset Enable 0 0 0 */
+#define MX25L_RST 0x99 /* Reset Memory 0 0 0 */
#define MX25L_RDSFDP 0x5a /* read out until CS# high */
#define MX25L_SBL 0xc0 /* Set Burst Length */
#define MX25L_SBL_ALT 0x77 /* Set Burst Length */
-#define MX25L_NOP 0x00 /* No Operation 0 0 0 */
+#define MX25L_NOP 0x00 /* No Operation 0 0 0 */
/* MX25L Registers ******************************************************************/
/* Read ID (RDID) register values */
@@ -578,9 +578,9 @@ static inline void mx25l_pagewrite(FAR struct mx25l_dev_s *priv,
for (; nbytes > 0; nbytes -= (1 << priv->pageshift))
{
/* Enable the write access to the FLASH */
-
+
mx25l_writeenable(priv);
-
+
/* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
@@ -602,10 +602,10 @@ static inline void mx25l_pagewrite(FAR struct mx25l_dev_s *priv,
/* Deselect the FLASH and setup for the next pass through the loop */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
-
+
/* Wait for any preceding write or erase operation to complete. */
- mx25l_waitwritecomplete(priv);
+ mx25l_waitwritecomplete(priv);
/* Update addresses */
@@ -796,7 +796,7 @@ static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
/* Lock access to the SPI bus until we complete the erase */
mx25l_lock(priv->dev);
-
+
while (blocksleft-- > 0)
{
/* MX25LVF parts have complex block overlay structure for the moment
@@ -815,8 +815,8 @@ static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
/* Flush the last erase block left in the cache */
mx25l_cacheflush(priv);
-#endif
-
+#endif
+
mx25l_unlock(priv->dev);
return (int)nblocks;
}
@@ -828,7 +828,7 @@ static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks, FAR uint8_t *buffer)
{
- FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev;
+ FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev;
ssize_t nbytes;
mxlinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
@@ -841,7 +841,7 @@ static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock,
if (nbytes > 0)
{
return nbytes >> MX25L_SECTOR512_SHIFT;
- }
+ }
#else
nbytes = mx25l_read(dev, startblock << priv->pageshift, nblocks << priv->pageshift,
buffer);
@@ -849,7 +849,7 @@ static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock,
{
return nbytes >> priv->pageshift;
}
-#endif
+#endif
return (int)nbytes;
}
@@ -877,7 +877,7 @@ static ssize_t mx25l_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
#endif
mx25l_unlock(priv->dev);
- return nblocks;
+ return nblocks;
}
/************************************************************************************
@@ -931,11 +931,11 @@ static int mx25l_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
geo->blocksize = (1 << MX25L_SECTOR512_SHIFT);
geo->erasesize = (1 << MX25L_SECTOR512_SHIFT);
geo->neraseblocks = priv->nsectors << (priv->sectorshift - MX25L_SECTOR512_SHIFT);
-#else
+#else
geo->blocksize = (1 << priv->pageshift);
geo->erasesize = (1 << priv->sectorshift);
geo->neraseblocks = priv->nsectors;
-#endif
+#endif
ret = OK;
mxlinfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
@@ -1035,8 +1035,8 @@ FAR struct mtd_dev_s *mx25l_initialize_spi(FAR struct spi_dev_s *dev)
kmm_free(priv);
return NULL;
}
-#endif
-
+#endif
+
#ifdef CONFIG_MTD_REGISTRATION
/* Register the MTD with the procfs system if enabled */
diff --git a/drivers/mtd/smart.c b/drivers/mtd/smart.c
index e483bc99d3..02bae30d6f 100644
--- a/drivers/mtd/smart.c
+++ b/drivers/mtd/smart.c
@@ -139,6 +139,7 @@
#ifndef CONFIG_MTD_SMART_ALLOC_DEBUG
#define smart_malloc(d, b, n) kmm_malloc(b)
+#define smart_zalloc(d, b, n) kmm_zalloc(b)
#define smart_free(d, p) kmm_free(p)
#endif
@@ -510,6 +511,30 @@ FAR static void *smart_malloc(FAR struct smart_struct_s *dev,
}
#endif
+/****************************************************************************
+ * Name: smart_zalloc
+ *
+ * Description: Perform allocations and keep track of amount of allocated
+ * memory for this context.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_MTD_SMART_ALLOC_DEBUG
+FAR static void *smart_zalloc(FAR struct smart_struct_s *dev,
+ size_t bytes, const char *name)
+{
+ void *mem;
+
+ mem = smart_malloc(dev, bytes, name);
+ if (mem != NULL)
+ {
+ memset(mem, 0, bytes);
+ }
+
+ return mem;
+}
+#endif
+
/****************************************************************************
* Name: smart_free
*
@@ -1241,17 +1266,20 @@ errexit:
if (dev->sMap)
{
smart_free(dev, dev->sMap);
+ dev->sMap = NULL;
}
#else
if (dev->sBitMap)
{
smart_free(dev, dev->sBitMap);
+ dev->sBitMap = NULL;
}
if (dev->sCache)
{
smart_free(dev, dev->sCache);
+ dev->sCache = NULL;
}
#endif
@@ -1259,6 +1287,7 @@ errexit:
if (dev->wearstatus)
{
smart_free(dev, dev->wearstatus);
+ dev->wearstatus = NULL;
}
#endif
@@ -1266,10 +1295,10 @@ errexit:
if (dev->erasecounts)
{
smart_free(dev, dev->erasecounts);
+ dev->erasecounts = NULL;
}
#endif
- kmm_free(dev);
return -ENOMEM;
}
@@ -2870,7 +2899,11 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, unsigned long a
/* Set the sector size for the device */
- smart_setsectorsize(dev, sectorsize);
+ ret = smart_setsectorsize(dev, sectorsize);
+ if (ret != OK)
+ {
+ return ret;
+ }
/* Check for invalid format */
@@ -5312,7 +5345,7 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
/* Allocate a SMART device structure */
- dev = (FAR struct smart_struct_s *)smart_malloc(NULL, sizeof(struct smart_struct_s),
+ dev = (FAR struct smart_struct_s *)smart_zalloc(NULL, sizeof(struct smart_struct_s),
"Dev struct");
if (dev)
{
@@ -5336,22 +5369,6 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
/* Set the sector size to the default for now */
-#ifndef CONFIG_MTD_SMART_MINIMIZE_RAM
- dev->sMap = NULL;
-#else
- dev->sCache = NULL;
- dev->sBitMap = NULL;
-#endif
- dev->rwbuffer = NULL;
-#ifdef CONFIG_MTD_SMART_SECTOR_ERASE_DEBUG
- dev->erasecounts = NULL;
-#endif
-#ifdef CONFIG_MTD_SMART_WEAR_LEVEL
- dev->wearstatus = NULL;
-#endif
-#ifdef CONFIG_MTD_SMART_ENABLE_CRC
- dev->allocsector = NULL;
-#endif
dev->sectorsize = 0;
ret = smart_setsectorsize(dev, CONFIG_MTD_SMART_SECTOR_SIZE);
if (ret != OK)
diff --git a/drivers/mtd/sst26.c b/drivers/mtd/sst26.c
index 4a1260e9d3..a0bfc9dbab 100644
--- a/drivers/mtd/sst26.c
+++ b/drivers/mtd/sst26.c
@@ -181,7 +181,7 @@
#define SST26_LBPR 0x8d /* 14 Lock down Block-Prot. reg 0 0 0 */
#define SST26_NVWLDR 0xe8 /* 14 non-Volatile Write L-D reg 0 0 1-18 */
#define SST26_ULBPR 0x98 /* 14 Global Block Protection unlock 0 0 0 */
-#define SST26_RSID 0x88 /* 14 Read Security ID 2 1 1-2048*/
+#define SST26_RSID 0x88 /* 14 Read Security ID 2 1 1-2048*/
/* 4 Read Security ID 2 3 1-2048*/
#define SST26_PSID 0xa5 /* 14 Program User Security ID area 2 0 1-256 */
#define SST26_LSID 0x85 /* 14 Lockout Security ID programming 0 0 0 */
diff --git a/drivers/spi/spi_transfer.c b/drivers/spi/spi_transfer.c
index f8a92ebc70..b92819c86a 100644
--- a/drivers/spi/spi_transfer.c
+++ b/drivers/spi/spi_transfer.c
@@ -92,7 +92,7 @@ int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq)
{
spierr("ERROR: SPI_SETDELAY failed: %d\n", ret);
SPI_LOCK(spi, false);
- return ret;
+ return ret;
}
#endif
@@ -154,7 +154,7 @@ int spi_transfer(FAR struct spi_dev_s *spi, FAR struct spi_sequence_s *seq)
SPI_SELECT(spi, seq->dev, false);
SPI_LOCK(spi, false);
- return ret;
+ return ret;
}
#endif /* CONFIG_SPI_EXCHANGE */
diff --git a/drivers/syslog/note_driver.c b/drivers/syslog/note_driver.c
index 5b92307917..db8b81705a 100644
--- a/drivers/syslog/note_driver.c
+++ b/drivers/syslog/note_driver.c
@@ -74,7 +74,7 @@ static const struct file_operations note_fops =
#endif
#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
, 0 /* unlink */
-#endif
+#endif
};
/****************************************************************************
diff --git a/drivers/syslog/syslog_console.c b/drivers/syslog/syslog_console.c
index b1a9cf2cb6..6b752eed65 100644
--- a/drivers/syslog/syslog_console.c
+++ b/drivers/syslog/syslog_console.c
@@ -51,11 +51,11 @@
* Private Function Prototypes
****************************************************************************/
-static ssize_t syslog_console_read(FAR struct file *filep, FAR char *buffer,
+static ssize_t syslog_console_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static ssize_t syslog_console_write(FAR struct file *filep,
FAR const char *buffer, size_t buflen);
-static int syslog_console_ioctl(FAR struct file *filep, int cmd,
+static int syslog_console_ioctl(FAR struct file *filep, int cmd,
unsigned long arg);
/****************************************************************************
@@ -93,7 +93,7 @@ static int syslog_console_ioctl(FAR struct file *filep, int cmd,
* Name: syslog_console_read
****************************************************************************/
-static ssize_t syslog_console_read(FAR struct file *filep, FAR char *buffer,
+static ssize_t syslog_console_read(FAR struct file *filep, FAR char *buffer,
size_t buflen)
{
return 0;
diff --git a/drivers/syslog/syslog_filechannel.c b/drivers/syslog/syslog_filechannel.c
index 1fcef4aa4a..5ef5bf6abf 100644
--- a/drivers/syslog/syslog_filechannel.c
+++ b/drivers/syslog/syslog_filechannel.c
@@ -170,7 +170,7 @@ int syslog_file_channel(FAR const char *devpath)
(void)syslog_channel(saved_channel);
goto errout_with_lock;
}
-
+
/* Then initialize the file interface */
ret = syslog_dev_initialize(devpath, OPEN_FLAGS, OPEN_MODE);
diff --git a/drivers/wireless/ieee802154/mrf24j40.c b/drivers/wireless/ieee802154/mrf24j40.c
index 7f91a09e20..b6259099c1 100644
--- a/drivers/wireless/ieee802154/mrf24j40.c
+++ b/drivers/wireless/ieee802154/mrf24j40.c
@@ -475,7 +475,7 @@ static int mrf24j40_get_attr(FAR struct ieee802154_radio_s *radio,
ret = IEEE802154_STATUS_SUCCESS;
}
break;
-
+
case IEEE802154_ATTR_PHY_CHAN:
{
attrval->phy.chan = dev->chan;
@@ -518,7 +518,7 @@ static int mrf24j40_set_attr(FAR struct ieee802154_radio_s *radio,
ret = IEEE802154_STATUS_SUCCESS;
}
break;
-
+
case IEEE802154_ATTR_MAC_COORD_SADDR:
{
mrf24j40_setcoordsaddr(dev, attrval->mac.coordsaddr);
@@ -555,7 +555,7 @@ static int mrf24j40_set_attr(FAR struct ieee802154_radio_s *radio,
ret = IEEE802154_STATUS_SUCCESS;
}
break;
-
+
case IEEE802154_ATTR_PHY_CHAN:
{
mrf24j40_setchannel(dev, attrval->phy.chan);
@@ -595,7 +595,7 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
mrf24j40_setreg(dev->spi, MRF24J40_RXMCR, reg);
/* Set the SLOTTED (TXMCR 0x11<5>) bit = 1 to use Slotted CSMA-CA mode */
-
+
reg = mrf24j40_getreg(dev->spi, MRF24J40_TXMCR);
reg |= MRF24J40_TXMCR_SLOTTED;
mrf24j40_setreg(dev->spi, MRF24J40_TXMCR, reg);
@@ -619,7 +619,7 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
reg |= 0x03 & MRF24J40_WAKECON_INTL;
mrf24j40_setreg(dev->spi, MRF24J40_WAKECON, reg);
- /* Program the CAP end slot (ESLOTG1 0x13<3:0>) value. */
+ /* Program the CAP end slot (ESLOTG1 0x13<3:0>) value. */
reg = mrf24j40_getreg(dev->spi, MRF24J40_ESLOTG1);
reg &= ~MRF24J40_ESLOTG1_CAP;
@@ -635,7 +635,7 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
/* If the Sleep Clock Selection, SLPCLKSEL (0x207<7:6), is the internal
* oscillator (100 kHz), set SLPCLKDIV to a minimum value of 0x01.
*/
-
+
mrf24j40_setreg(dev->spi, MRF24J40_SLPCON1, 0x01);
/* Select the source of SLPCLK (internal 100kHz) */
@@ -652,8 +652,8 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
/* Calibration is complete when the SLPCALRDY bit (SLPCAL2 0x20B<7>) is
* set to ‘1’.
*/
-
- while (!(mrf24j40_getreg(dev->spi, MRF24J40_SLPCAL2) &
+
+ while (!(mrf24j40_getreg(dev->spi, MRF24J40_SLPCAL2) &
MRF24J40_SLPCAL2_SLPCALRDY))
{
usleep(1);
@@ -672,7 +672,7 @@ static int mrf24j40_beaconstart(FAR struct ieee802154_radio_s *radio,
/* Program the Beacon Interval into the Main Counter, MAINCNT (0x229<1:0>,
* 0x228, 0x227, 0x226), and Remain Counter, REMCNT (0x225, 0x224),
* according to BO and SO values. Refer to Section 3.15.1.3 “Sleep Mode
- * Counters”
+ * Counters”
*/
mrf24j40_setreg(dev->spi, MRF24J40_REMCNTL, (MRF24J40_REMCNT & 0xFF));
@@ -739,7 +739,7 @@ static int mrf24j40_sfupdate(FAR struct ieee802154_radio_s *radio,
}
mrf24j40_setreg(dev->spi, MRF24J40_RXMCR, reg);
- /* Program the CAP end slot (ESLOTG1 0x13<3:0>) value. */
+ /* Program the CAP end slot (ESLOTG1 0x13<3:0>) value. */
reg = mrf24j40_getreg(dev->spi, MRF24J40_ESLOTG1);
reg &= ~MRF24J40_ESLOTG1_CAP;
@@ -1675,7 +1675,7 @@ static void mrf24j40_gts_setup(FAR struct mrf24j40_radio_s *dev, uint8_t fifo,
****************************************************************************/
static void mrf24j40_setup_fifo(FAR struct mrf24j40_radio_s *dev,
- FAR const uint8_t *buf, uint8_t length,
+ FAR const uint8_t *buf, uint8_t length,
uint32_t fifo_addr)
{
int hlen = 3; /* Include frame control and seq number */
diff --git a/fs/hostfs/hostfs.c b/fs/hostfs/hostfs.c
index 764f7f1edb..057544f698 100644
--- a/fs/hostfs/hostfs.c
+++ b/fs/hostfs/hostfs.c
@@ -206,7 +206,7 @@ static void hostfs_mkpath(FAR struct hostfs_mountpt_s *fs,
strncpy(path, fs->fs_root, pathlen);
- /* Be sure we aren't trying to use ".." to display outside of our
+ /* Be sure we aren't trying to use ".." to display outside of our
* mounted path.
*/
@@ -849,7 +849,7 @@ static int hostfs_bind(FAR struct inode *blkdriver, FAR const void *data,
}
/* The only options we suppor are "-o fs=whatever", so search
- * for the 'dir=' portion
+ * for the 'dir=' portion
*/
options = (const char *) data;
@@ -874,7 +874,7 @@ static int hostfs_bind(FAR struct inode *blkdriver, FAR const void *data,
{
/* Initialize the semaphore that controls access */
- sem_init(&g_sem, 0, 0);
+ sem_init(&g_sem, 0, 0);
g_seminitialized = TRUE;
}
else
diff --git a/fs/mqueue/Kconfig b/fs/mqueue/Kconfig
index 9406a7e464..6c2408dfdd 100644
--- a/fs/mqueue/Kconfig
+++ b/fs/mqueue/Kconfig
@@ -10,5 +10,5 @@ config FS_MQUEUE_MPATH
default "/var/mqueue"
---help---
The path to where POSIX message queues will exist in the VFS namespace.
-
+
endif # !DISABLE_MQUEUE
diff --git a/fs/semaphore/Kconfig b/fs/semaphore/Kconfig
index a045ac5cfe..65051145a5 100644
--- a/fs/semaphore/Kconfig
+++ b/fs/semaphore/Kconfig
@@ -16,5 +16,5 @@ config FS_NAMED_SEMPATH
default "/var/lock"
---help---
The path to where named semaphores will exist in the VFS namespace.
-
+
endif # FS_NAMED_SEMAPHORES
diff --git a/fs/shm/Kconfig b/fs/shm/Kconfig
index ddca66e8e0..ab7e238567 100644
--- a/fs/shm/Kconfig
+++ b/fs/shm/Kconfig
@@ -18,5 +18,5 @@ config FS_SHMPATH
---help---
The path to where shared memory objects will exist in the VFS
namespace.
-
+
endif # FS_SHM
diff --git a/fs/smartfs/smartfs_smart.c b/fs/smartfs/smartfs_smart.c
index 60a539c10f..db358e4ae6 100644
--- a/fs/smartfs/smartfs_smart.c
+++ b/fs/smartfs/smartfs_smart.c
@@ -791,7 +791,7 @@ static ssize_t smartfs_write(FAR struct file *filep, const char *buffer,
ret = FS_IOCTL(fs, BIOC_WRITESECT, (unsigned long) &readwrite);
if (ret < 0)
{
- ferr("ERROR: Error %d writing sector %d data\n",
+ ferr("ERROR: Error %d writing sector %d data\n",
ret, sf->currsector);
goto errout_with_semaphore;
}
@@ -1587,8 +1587,8 @@ static int smartfs_bind(FAR struct inode *blkdriver, const void *data,
ret = smartfs_mount(fs, true);
if (ret != 0)
{
- kmm_free(fs);
smartfs_semgive(fs);
+ kmm_free(fs);
return ret;
}
diff --git a/fs/vfs/fs_lseek.c b/fs/vfs/fs_lseek.c
index be74239eca..bea398c0a3 100644
--- a/fs/vfs/fs_lseek.c
+++ b/fs/vfs/fs_lseek.c
@@ -99,7 +99,7 @@ off_t file_seek(FAR struct file *filep, off_t offset, int whence)
{
case SEEK_CUR:
offset += filep->f_pos;
-
+ /* FALLTHROUGH */
case SEEK_SET:
if (offset >= 0)
{
diff --git a/graphics/nxbe/nxbe_fill.c b/graphics/nxbe/nxbe_fill.c
index 671a3e7ab9..e2b45fbc96 100644
--- a/graphics/nxbe/nxbe_fill.c
+++ b/graphics/nxbe/nxbe_fill.c
@@ -74,7 +74,7 @@ static void nxbe_clipfill(FAR struct nxbe_clipops_s *cops,
struct nxbe_fill_s *fillinfo = (struct nxbe_fill_s *)cops;
/* Draw the rectangle */
-
+
plane->fillrectangle(&plane->pinfo, rect, fillinfo->color);
#ifdef CONFIG_NX_UPDATE
diff --git a/graphics/nxbe/nxbe_setpixel.c b/graphics/nxbe/nxbe_setpixel.c
index 0b61897381..574a4ee3de 100644
--- a/graphics/nxbe/nxbe_setpixel.c
+++ b/graphics/nxbe/nxbe_setpixel.c
@@ -74,7 +74,7 @@ static void nxbe_clipfill(FAR struct nxbe_clipops_s *cops,
struct nxbe_setpixel_s *fillinfo = (struct nxbe_setpixel_s *)cops;
/* Set the pixel */
-
+
plane->setpixel(&plane->pinfo, &rect->pt1, fillinfo->color);
#ifdef CONFIG_NX_UPDATE
diff --git a/include/netdb.h b/include/netdb.h
index 3503a9fff7..56b5fb35cd 100644
--- a/include/netdb.h
+++ b/include/netdb.h
@@ -188,8 +188,8 @@ struct hostent
* host names, terminated by a null pointer. */
int h_addrtype; /* Address type. */
int h_length; /* The length, in bytes, of the address. */
- FAR char **h_addr_list; /* A pointer to an array of pointers to network
- * addresses (in network byte order) for the host,
+ FAR char **h_addr_list; /* A pointer to an array of pointers to network
+ * addresses (in network byte order) for the host,
* terminated by a null pointer. */
};
@@ -205,7 +205,7 @@ struct netent
uint32_t n_net; /* The network number, in host byte order. */
};
-struct protoent
+struct protoent
{
FAR char *p_name; /* Official name of the protocol. */
FAR char **p_aliases; /* A pointer to an array of pointers to
@@ -214,7 +214,7 @@ struct protoent
int p_proto; /* The protocol number. */
};
-struct servent
+struct servent
{
FAR char *s_name; /* Official name of the service. */
FAR char **s_aliases; /* A pointer to an array of pointers to
@@ -226,7 +226,7 @@ struct servent
* contacting the service. */
};
-struct addrinfo
+struct addrinfo
{
int ai_flags; /* Input flags. */
int ai_family; /* Address family of socket. */
diff --git a/include/nuttx/binfmt/ieee695.h b/include/nuttx/binfmt/ieee695.h
index 31a037289f..62d788c282 100644
--- a/include/nuttx/binfmt/ieee695.h
+++ b/include/nuttx/binfmt/ieee695.h
@@ -155,7 +155,7 @@
#define IEEE695_OMFEXT_PROTECTED 0x04 /* Protected memory library */
#define IEEE695_OMFEXT_LNKDIR 0x05 /* Microsoft C++ linker directives record */
#define IEEE695_OMFEXT_BIGENDIAN 0x06 /* Big-endian */
-#define IEEE695_OMFEXT_PRECOMP 0x07
+#define IEEE695_OMFEXT_PRECOMP 0x07
/* 0x08-0xff Reserved */
/* Link pass separator. This record conveys information to the linker about the
diff --git a/include/nuttx/fs/hostfs.h b/include/nuttx/fs/hostfs.h
index e530d10bb6..fb20775003 100644
--- a/include/nuttx/fs/hostfs.h
+++ b/include/nuttx/fs/hostfs.h
@@ -65,7 +65,7 @@
/* These must exactly match the definitions from include/sys/stat.h: */
-#define NUTTX_S_IFIFO 0010000
+#define NUTTX_S_IFIFO 0010000
#define NUTTX_S_IFCHR 0020000
#define NUTTX_S_IFDIR 0040000
#define NUTTX_S_IFBLK 0060000
diff --git a/include/nuttx/input/mxt.h b/include/nuttx/input/mxt.h
index 22ee792769..0923b57a53 100644
--- a/include/nuttx/input/mxt.h
+++ b/include/nuttx/input/mxt.h
@@ -166,7 +166,7 @@ struct mxt_lower_s
#ifdef __cplusplus
#define EXTERN extern "C"
-extern "C"
+extern "C"
{
#else
#define EXTERN extern
diff --git a/include/nuttx/input/x11_keysymdef.h b/include/nuttx/input/x11_keysymdef.h
index ac696eb897..4e9193a2a8 100644
--- a/include/nuttx/input/x11_keysymdef.h
+++ b/include/nuttx/input/x11_keysymdef.h
@@ -76,7 +76,7 @@
* Unicode number plus 0x01000000. The keysym values in the range
* 0x01000100 to 0x0110ffff are reserved to represent Unicode
* characters in the range U+0100 to U+10FFFF.
- *
+ *
* While most newer Unicode-based X11 clients do already accept
* Unicode-mapped keysyms in the range 0x01000100 to 0x0110ffff, it
* will remain necessary for clients -- in the interest of
@@ -1905,7 +1905,7 @@
#endif /* XK_CAUCASUS */
/* Vietnamese */
-
+
#ifdef XK_VIETNAMESE
# define XK_Abelowdot 0x1001ea0 /* U+1EA0 LATIN CAPITAL LETTER A WITH DOT BELOW */
# define XK_abelowdot 0x1001ea1 /* U+1EA1 LATIN SMALL LETTER A WITH DOT BELOW */
diff --git a/include/nuttx/lcd/st7565.h b/include/nuttx/lcd/st7565.h
index a103f51cd7..c30fe2d473 100644
--- a/include/nuttx/lcd/st7565.h
+++ b/include/nuttx/lcd/st7565.h
@@ -142,7 +142,7 @@ extern "C"
*
****************************************************************************/
-FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
+FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
unsigned int devno);
#ifdef __cplusplus
diff --git a/include/nuttx/mm/mm.h b/include/nuttx/mm/mm.h
index 485e73fbeb..40e777907d 100644
--- a/include/nuttx/mm/mm.h
+++ b/include/nuttx/mm/mm.h
@@ -137,7 +137,7 @@
/* Four byte offsets; Pointers may be 4 or 8 bytes
* sizeof(struct mm_freenode_s) is 16 or 24 bytes.
*/
-
+
# if UINTPTR_MAX <= UINT32_MAX
# define MM_MIN_SHIFT 4 /* 16 bytes */
# elif UINTPTR_MAX <= UINT64_MAX
diff --git a/include/nuttx/mtd/smart.h b/include/nuttx/mtd/smart.h
index 25d42b311a..ac8d11d33f 100644
--- a/include/nuttx/mtd/smart.h
+++ b/include/nuttx/mtd/smart.h
@@ -91,7 +91,7 @@ struct mtd_smart_procfs_data_s
size_t neraseblocks; /* Number of erase blocks */
#endif
#ifdef CONFIG_MTD_SMART_ALLOC_DEBUG
- FAR const struct smart_alloc_s *allocs; /* Array of allocations */
+ FAR const struct smart_alloc_s *allocs; /* Array of allocations */
uint16_t alloccount; /* Number of items in the array */
#endif
#ifdef CONFIG_MTD_SMART_WEAR_LEVEL
diff --git a/include/nuttx/net/rfc6775.h b/include/nuttx/net/rfc6775.h
index 04604283d1..cdfee0d6ee 100644
--- a/include/nuttx/net/rfc6775.h
+++ b/include/nuttx/net/rfc6775.h
@@ -80,7 +80,7 @@
#define RTR_SOLICITATION_INTERVAL 10 /* Seconds */
#define MAX_RTR_SOLICITATIONS 3 /* Transmissions */
-#define MAX_RTR_SOLICITATION_INTERVAL 60 /* Seconds */
+#define MAX_RTR_SOLICITATION_INTERVAL 60 /* Seconds */
/****************************************************************************
* Public Types
diff --git a/include/nuttx/spi/slave.h b/include/nuttx/spi/slave.h
index ba11c26394..a979d22c42 100644
--- a/include/nuttx/spi/slave.h
+++ b/include/nuttx/spi/slave.h
@@ -447,7 +447,7 @@ struct spi_sdev_s; /* Forward reference */
struct spi_sctrlrops_s
{
- CODE void (*bind)(FAR struct spi_sctrlr_s *sctrlr,
+ CODE void (*bind)(FAR struct spi_sctrlr_s *sctrlr,
FAR struct spi_sdev_s *sdev, enum spi_smode_e mode,
int nbits);
CODE void (*unbind)(FAR struct spi_sctrlr_s *sctrlr);
diff --git a/include/nuttx/syslog/syslog_console.h b/include/nuttx/syslog/syslog_console.h
index 18283d9f39..6fbf137cb9 100644
--- a/include/nuttx/syslog/syslog_console.h
+++ b/include/nuttx/syslog/syslog_console.h
@@ -83,7 +83,7 @@ extern "C"
* Name: syslog_console_init
*
* Description:
- * Create the console logging device and register it at the '/dev/console'
+ * Create the console logging device and register it at the '/dev/console'
* path.
*
****************************************************************************/
diff --git a/include/nuttx/tree.h b/include/nuttx/tree.h
index b8da3d0a59..5941092809 100644
--- a/include/nuttx/tree.h
+++ b/include/nuttx/tree.h
@@ -100,7 +100,7 @@
(head)->sph_root = tmp; \
} \
while (0)
-
+
#define SPLAY_ROTATE_LEFT(head, tmp, field) \
do \
{ \
diff --git a/include/nuttx/usb/hub.h b/include/nuttx/usb/hub.h
index 420837cbae..de2d5101dd 100644
--- a/include/nuttx/usb/hub.h
+++ b/include/nuttx/usb/hub.h
@@ -148,7 +148,7 @@
/* Hub max ports */
-#define USBHUB_MAX_PORTS (7)
+#define USBHUB_MAX_PORTS (7)
/************************************************************************************
* Public Types
@@ -192,7 +192,7 @@ struct usb_portstatus_s
struct usb_hubtt_s
{
/* Hub class that is the transaction translator for device */
-
+
FAR struct usbhost_class_s *class;
/* Transaction translator think time */
diff --git a/include/nuttx/video/vnc.h b/include/nuttx/video/vnc.h
index df39d5b7fd..a0bb39e294 100644
--- a/include/nuttx/video/vnc.h
+++ b/include/nuttx/video/vnc.h
@@ -198,7 +198,7 @@ void vnc_mouseout(FAR void *arg, nxgl_coord_t x, nxgl_coord_t y,
vnc_fbinitialize((d), NULL, vnc_mouseout, (FAR void *)(h))
#else
-
+
#define vnc_default_fbinitialize(d,h) \
vnc_fbinitialize((d), NULL, NULL, NULL)
diff --git a/include/nuttx/wireless/ieee80211/ieee80211.h b/include/nuttx/wireless/ieee80211/ieee80211.h
index 62ea4491d3..1962351158 100644
--- a/include/nuttx/wireless/ieee80211/ieee80211.h
+++ b/include/nuttx/wireless/ieee80211/ieee80211.h
@@ -350,7 +350,7 @@
/* Organizationally Unique Identifiers.
* See http://standards.ieee.org/regauth/oui/oui.txt for a list.
*/
-
+
#define ATHEROS_OUI ((const uint8_t[]){ 0x00, 0x03, 0x7f })
#define BROADCOM_OUI ((const uint8_t[]){ 0x00, 0x90, 0x4c })
#define IEEE80211_OUI ((const uint8_t[]){ 0x00, 0x0f, 0xac })
diff --git a/include/nuttx/wireless/wireless.h b/include/nuttx/wireless/wireless.h
index 144e346fca..8bc0f5dcdf 100644
--- a/include/nuttx/wireless/wireless.h
+++ b/include/nuttx/wireless/wireless.h
@@ -384,7 +384,7 @@ struct iw_param
/* Large data reference. For all data larger than 16 octets, we need to use a
* pointer to memory allocated in user space.
*/
-
+
struct iw_point
{
FAR void *pointer; /* Pointer to the data (in user space) */
@@ -436,14 +436,14 @@ union iwreq_data
struct iw_param frag; /* Fragmentation threshold */
uint32_t mode; /* Operation mode */
struct iw_param retry; /* Retry limits & lifetime */
-
+
struct iw_point encoding; /* Encoding stuff : tokens */
struct iw_param power; /* PM duration/timeout */
struct iw_quality qual; /* Quality part of statistics */
-
+
struct sockaddr ap_addr; /* Access point address */
struct sockaddr addr; /* Destination address (hw/mac) */
-
+
struct iw_param param; /* Other small parameters */
struct iw_point data; /* Other large parameters */
};
diff --git a/include/nuttx/zoneinfo.h b/include/nuttx/zoneinfo.h
index 67f4214e0b..82bf9994d6 100644
--- a/include/nuttx/zoneinfo.h
+++ b/include/nuttx/zoneinfo.h
@@ -61,7 +61,7 @@ extern "C"
#endif
/* If the TZ database is built as a ROMFS file system, then these variables
- * provide (1) the address of the array in FLASH/ROM that contains the
+ * provide (1) the address of the array in FLASH/ROM that contains the
* ROMFS file system image, and (2) the size of the ROMFS file system image
* in bytes. This is sufficient information to permit external logic to
* mount the ROMF file system.
diff --git a/include/sys/mman.h b/include/sys/mman.h
index 22c883b87f..4f95dea867 100644
--- a/include/sys/mman.h
+++ b/include/sys/mman.h
@@ -127,7 +127,7 @@
* POSIX_TYPED_MEM_MAP_ALLOCATABLE
* Map on mmap(), without affecting allocatability.
*/
-
+
#define POSIX_TYPED_MEM_ALLOCATE (0)
#define POSIX_TYPED_MEM_ALLOCATE_CONTIG (1)
#define POSIX_TYPED_MEM_MAP_ALLOCATABLE (2)
diff --git a/include/sys/un.h b/include/sys/un.h
index cad86f628b..a8b53bfdcb 100644
--- a/include/sys/un.h
+++ b/include/sys/un.h
@@ -41,7 +41,7 @@
****************************************************************************/
/* The sys/un.> header defines the type sa_family_t as described in
- * sys/socket.h.
+ * sys/socket.h.
*/
#include
diff --git a/include/syslog.h b/include/syslog.h
index 4c1112cf76..07374084a0 100644
--- a/include/syslog.h
+++ b/include/syslog.h
@@ -53,17 +53,17 @@
/* The option argument to openlog() is an OR of any of these:
*
* LOG_CONS - Write directly to system console if there is an error
- * while sending to system logger.
+ * while sending to system logger.
* LOG_NDELAY - Open the connection immediately (normally, the connection
- * is opened when the first message is logged).
+ * is opened when the first message is logged).
* LOG_NOWAIT - Don't wait for child processes that may have been created
* while logging the message.
* LOG_ODELAY - The converse of LOG_NDELAY; opening of the connection is
* delayed until syslog() is called. (This is the default,
- * and need not be specified.)
+ * and need not be specified.)
* LOG_PERROR - (Not in POSIX.1-2001 or POSIX.1-2008.) Print to stderr
* as well (Linux).
- * LOG_PID - Include PID with each message.
+ * LOG_PID - Include PID with each message.
*/
/* Note: openlog() is not currently supported */
@@ -72,20 +72,20 @@
* the message. This lets the configuration file specify that messages from
* different facilities will be handled differently.
*
- * LOG_AUTH - Security/authorization messages
- * LOG_AUTHPRIV - Security/authorization messages (private)
- * LOG_CRON - Clock daemon (cron and at)
- * LOG_DAEMON - System daemons without separate facility value
- * LOG_FTP - Ftp daemon
+ * LOG_AUTH - Security/authorization messages
+ * LOG_AUTHPRIV - Security/authorization messages (private)
+ * LOG_CRON - Clock daemon (cron and at)
+ * LOG_DAEMON - System daemons without separate facility value
+ * LOG_FTP - Ftp daemon
* LOG_KERN - Lernel messages (these can't be generated from user
- * processes)
- * LOG_LOCAL0 through LOG_LOCAL7 - Reserved for local use
- * LOG_LPR - Line printer subsystem
- * LOG_MAIL - Mail subsystem
- * LOG_NEWS - USENET news subsystem
- * LOG_SYSLOG - Messages generated internally by syslogd(8)
- * LOG_USER - Generic user-level messages (default)
- * LOG_UUCP - UUCP subsystem
+ * processes)
+ * LOG_LOCAL0 through LOG_LOCAL7 - Reserved for local use
+ * LOG_LPR - Line printer subsystem
+ * LOG_MAIL - Mail subsystem
+ * LOG_NEWS - USENET news subsystem
+ * LOG_SYSLOG - Messages generated internally by syslogd(8)
+ * LOG_USER - Generic user-level messages (default)
+ * LOG_UUCP - UUCP subsystem
*/
#define LOG_AUTH 0
diff --git a/include/wchar.h b/include/wchar.h
index 66d24ae9d7..0a891598d3 100644
--- a/include/wchar.h
+++ b/include/wchar.h
@@ -53,7 +53,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
-/* defines the following macro names:
+/* defines the following macro names:
*
* WCHAR_MAX
* The maximum value representable by an object of type wchar_t.
@@ -66,7 +66,7 @@
* functions to indicate end-of-file.
*
* NULL
- * As described in .
+ * As described in .
*
* Reference: Opengroup.org
*/
diff --git a/libc/aio/aio_suspend.c b/libc/aio/aio_suspend.c
index 34b7e4a72b..4bf72d5ab7 100644
--- a/libc/aio/aio_suspend.c
+++ b/libc/aio/aio_suspend.c
@@ -68,7 +68,7 @@
* asynchronous I/O request via aio_read(), aio_write(), or lio_listio().
* This array may contain NULL pointers, which are ignored. If this
* array contains pointers that refer to aiocb structures that have not
- * been used in submitting asynchronous I/O, the effect is undefined.
+ * been used in submitting asynchronous I/O, the effect is undefined.
*
* Input Parameters:
* list - An array of pointers to asynchronous I/O control blocks.
@@ -78,7 +78,7 @@
* structure that determines a timeout on the operation. If
* the time referred to timeout passes before any of the I/O
* operations referenced by list are completed, then
- * aio_suspend() returns with an error.
+ * aio_suspend() returns with an error.
*
* Returned Value:
* If the aio_suspend() function returns after one or more asynchronous
@@ -86,7 +86,7 @@
* the function returns a value of -1 and sets errno to indicate the
* error. The application may determine which asynchronous I/O completed
* by scanning the associated error and return status using aio_error()
- * and aio_return(), respectively.
+ * and aio_return(), respectively.
*
* The aio_suspend() function will fail if:
*
diff --git a/libc/machine/arm/arm/arch_elf.c b/libc/machine/arm/arm/arch_elf.c
index 6e1e3cfcb6..8611207a76 100644
--- a/libc/machine/arm/arm/arch_elf.c
+++ b/libc/machine/arm/arm/arch_elf.c
@@ -87,7 +87,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
- return -ENOEXEC;
+ return false;
}
/* Make sure that 32-bit objects are supported */
@@ -95,7 +95,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
- return -ENOEXEC;
+ return false;
}
/* Verify endian-ness */
@@ -107,7 +107,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
#endif
{
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
- return -ENOEXEC;
+ return false;
}
/* Make sure the entry point address is properly aligned */
@@ -115,11 +115,11 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
- return -ENOEXEC;
+ return false;
}
/* TODO: Check ABI here. */
- return OK;
+ return true;
}
/****************************************************************************
diff --git a/libc/machine/arm/armv6-m/arch_elf.c b/libc/machine/arm/armv6-m/arch_elf.c
index 3f957b6fdf..b746d34c86 100644
--- a/libc/machine/arm/armv6-m/arch_elf.c
+++ b/libc/machine/arm/armv6-m/arch_elf.c
@@ -87,7 +87,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
- return -ENOEXEC;
+ return false;
}
/* Make sure that 32-bit objects are supported */
@@ -95,7 +95,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
- return -ENOEXEC;
+ return false;
}
/* Verify endian-ness */
@@ -107,11 +107,11 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
#endif
{
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
- return -ENOEXEC;
+ return false;
}
/* TODO: Check ABI here. */
- return OK;
+ return true;
}
/****************************************************************************
diff --git a/libc/machine/arm/armv7-a/arch_elf.c b/libc/machine/arm/armv7-a/arch_elf.c
index be4801af89..4fa30f1049 100644
--- a/libc/machine/arm/armv7-a/arch_elf.c
+++ b/libc/machine/arm/armv7-a/arch_elf.c
@@ -75,7 +75,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
- return -ENOEXEC;
+ return false;
}
/* Make sure that 32-bit objects are supported */
@@ -83,7 +83,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
- return -ENOEXEC;
+ return false;
}
/* Verify endian-ness */
@@ -95,7 +95,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
#endif
{
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
- return -ENOEXEC;
+ return false;
}
/* Make sure the entry point address is properly aligned */
@@ -103,11 +103,11 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
- return -ENOEXEC;
+ return false;
}
/* TODO: Check ABI here. */
- return OK;
+ return true;
}
/****************************************************************************
diff --git a/libc/machine/arm/armv7-m/arch_elf.c b/libc/machine/arm/armv7-m/arch_elf.c
index 7e4238e0c9..db6a6010a0 100644
--- a/libc/machine/arm/armv7-m/arch_elf.c
+++ b/libc/machine/arm/armv7-m/arch_elf.c
@@ -83,7 +83,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
- return -ENOEXEC;
+ return false;
}
/* Make sure that 32-bit objects are supported */
@@ -91,7 +91,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
- return -ENOEXEC;
+ return false;
}
/* Verify endian-ness */
@@ -103,11 +103,11 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
#endif
{
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
- return -ENOEXEC;
+ return false;
}
/* TODO: Check ABI here. */
- return OK;
+ return true;
}
/****************************************************************************
diff --git a/libc/machine/arm/armv7-r/arch_elf.c b/libc/machine/arm/armv7-r/arch_elf.c
index 36f65fae1f..8985336620 100644
--- a/libc/machine/arm/armv7-r/arch_elf.c
+++ b/libc/machine/arm/armv7-r/arch_elf.c
@@ -87,7 +87,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
- return -ENOEXEC;
+ return false;
}
/* Make sure that 32-bit objects are supported */
@@ -95,7 +95,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
- return -ENOEXEC;
+ return false;
}
/* Verify endian-ness */
@@ -107,7 +107,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
#endif
{
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
- return -ENOEXEC;
+ return false;
}
/* Make sure the entry point address is properly aligned */
@@ -115,11 +115,11 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
- return -ENOEXEC;
+ return false;
}
/* TODO: Check ABI here. */
- return OK;
+ return true;
}
/****************************************************************************
diff --git a/libc/math/lib_trunc.c b/libc/math/lib_trunc.c
index 3f32577402..aa81dd91ae 100644
--- a/libc/math/lib_trunc.c
+++ b/libc/math/lib_trunc.c
@@ -1,6 +1,6 @@
/****************************************************************************
* libc/math/lib_trunc.c
- *
+ *
* This implementation is derived from the musl library under the MIT License
*
* Copyright © 2005-2014 Rich Felker, et al.
diff --git a/libc/math/lib_truncf.c b/libc/math/lib_truncf.c
index 97b1f707bd..b1d4f645a6 100644
--- a/libc/math/lib_truncf.c
+++ b/libc/math/lib_truncf.c
@@ -1,6 +1,6 @@
/****************************************************************************
* libc/math/lib_truncf.c
- *
+ *
* This implementation is derived from the musl library under the MIT License
*
* Copyright © 2005-2014 Rich Felker, et al.
diff --git a/libc/math/lib_truncl.c b/libc/math/lib_truncl.c
index 8fc87f8a55..a8028f06d4 100644
--- a/libc/math/lib_truncl.c
+++ b/libc/math/lib_truncl.c
@@ -1,6 +1,6 @@
/****************************************************************************
* libc/math/lib_truncl.c
- *
+ *
* This implementation is derived from the musl library under the MIT License
*
* Copyright © 2005-2014 Rich Felker, et al.
diff --git a/libc/misc/lib_crc8.c b/libc/misc/lib_crc8.c
index 4da049c60a..5d7c1982d4 100644
--- a/libc/misc/lib_crc8.c
+++ b/libc/misc/lib_crc8.c
@@ -74,37 +74,37 @@
static const uint8_t crc8_tab[256] =
{
- 0x00, 0x3e, 0x7c, 0x42, 0xf8, 0xc6, 0x84, 0xba,
- 0x95, 0xab, 0xe9, 0xd7, 0x6d, 0x53, 0x11, 0x2f,
+ 0x00, 0x3e, 0x7c, 0x42, 0xf8, 0xc6, 0x84, 0xba,
+ 0x95, 0xab, 0xe9, 0xd7, 0x6d, 0x53, 0x11, 0x2f,
0x4f, 0x71, 0x33, 0x0d, 0xb7, 0x89, 0xcb, 0xf5,
- 0xda, 0xe4, 0xa6, 0x98, 0x22, 0x1c, 0x5e, 0x60,
- 0x9e, 0xa0, 0xe2, 0xdc, 0x66, 0x58, 0x1a, 0x24,
+ 0xda, 0xe4, 0xa6, 0x98, 0x22, 0x1c, 0x5e, 0x60,
+ 0x9e, 0xa0, 0xe2, 0xdc, 0x66, 0x58, 0x1a, 0x24,
0x0b, 0x35, 0x77, 0x49, 0xf3, 0xcd, 0x8f, 0xb1,
- 0xd1, 0xef, 0xad, 0x93, 0x29, 0x17, 0x55, 0x6b,
- 0x44, 0x7a, 0x38, 0x06, 0xbc, 0x82, 0xc0, 0xfe,
+ 0xd1, 0xef, 0xad, 0x93, 0x29, 0x17, 0x55, 0x6b,
+ 0x44, 0x7a, 0x38, 0x06, 0xbc, 0x82, 0xc0, 0xfe,
0x59, 0x67, 0x25, 0x1b, 0xa1, 0x9f, 0xdd, 0xe3,
- 0xcc, 0xf2, 0xb0, 0x8e, 0x34, 0x0a, 0x48, 0x76,
- 0x16, 0x28, 0x6a, 0x54, 0xee, 0xd0, 0x92, 0xac,
+ 0xcc, 0xf2, 0xb0, 0x8e, 0x34, 0x0a, 0x48, 0x76,
+ 0x16, 0x28, 0x6a, 0x54, 0xee, 0xd0, 0x92, 0xac,
0x83, 0xbd, 0xff, 0xc1, 0x7b, 0x45, 0x07, 0x39,
- 0xc7, 0xf9, 0xbb, 0x85, 0x3f, 0x01, 0x43, 0x7d,
- 0x52, 0x6c, 0x2e, 0x10, 0xaa, 0x94, 0xd6, 0xe8,
+ 0xc7, 0xf9, 0xbb, 0x85, 0x3f, 0x01, 0x43, 0x7d,
+ 0x52, 0x6c, 0x2e, 0x10, 0xaa, 0x94, 0xd6, 0xe8,
0x88, 0xb6, 0xf4, 0xca, 0x70, 0x4e, 0x0c, 0x32,
- 0x1d, 0x23, 0x61, 0x5f, 0xe5, 0xdb, 0x99, 0xa7,
- 0xb2, 0x8c, 0xce, 0xf0, 0x4a, 0x74, 0x36, 0x08,
+ 0x1d, 0x23, 0x61, 0x5f, 0xe5, 0xdb, 0x99, 0xa7,
+ 0xb2, 0x8c, 0xce, 0xf0, 0x4a, 0x74, 0x36, 0x08,
0x27, 0x19, 0x5b, 0x65, 0xdf, 0xe1, 0xa3, 0x9d,
- 0xfd, 0xc3, 0x81, 0xbf, 0x05, 0x3b, 0x79, 0x47,
- 0x68, 0x56, 0x14, 0x2a, 0x90, 0xae, 0xec, 0xd2,
+ 0xfd, 0xc3, 0x81, 0xbf, 0x05, 0x3b, 0x79, 0x47,
+ 0x68, 0x56, 0x14, 0x2a, 0x90, 0xae, 0xec, 0xd2,
0x2c, 0x12, 0x50, 0x6e, 0xd4, 0xea, 0xa8, 0x96,
- 0xb9, 0x87, 0xc5, 0xfb, 0x41, 0x7f, 0x3d, 0x03,
- 0x63, 0x5d, 0x1f, 0x21, 0x9b, 0xa5, 0xe7, 0xd9,
+ 0xb9, 0x87, 0xc5, 0xfb, 0x41, 0x7f, 0x3d, 0x03,
+ 0x63, 0x5d, 0x1f, 0x21, 0x9b, 0xa5, 0xe7, 0xd9,
0xf6, 0xc8, 0x8a, 0xb4, 0x0e, 0x30, 0x72, 0x4c,
- 0xeb, 0xd5, 0x97, 0xa9, 0x13, 0x2d, 0x6f, 0x51,
- 0x7e, 0x40, 0x02, 0x3c, 0x86, 0xb8, 0xfa, 0xc4,
+ 0xeb, 0xd5, 0x97, 0xa9, 0x13, 0x2d, 0x6f, 0x51,
+ 0x7e, 0x40, 0x02, 0x3c, 0x86, 0xb8, 0xfa, 0xc4,
0xa4, 0x9a, 0xd8, 0xe6, 0x5c, 0x62, 0x20, 0x1e,
- 0x31, 0x0f, 0x4d, 0x73, 0xc9, 0xf7, 0xb5, 0x8b,
- 0x75, 0x4b, 0x09, 0x37, 0x8d, 0xb3, 0xf1, 0xcf,
- 0xe0, 0xde, 0x9c, 0xa2, 0x18, 0x26, 0x64, 0x5a,
- 0x3a, 0x04, 0x46, 0x78, 0xc2, 0xfc, 0xbe, 0x80,
+ 0x31, 0x0f, 0x4d, 0x73, 0xc9, 0xf7, 0xb5, 0x8b,
+ 0x75, 0x4b, 0x09, 0x37, 0x8d, 0xb3, 0xf1, 0xcf,
+ 0xe0, 0xde, 0x9c, 0xa2, 0x18, 0x26, 0x64, 0x5a,
+ 0x3a, 0x04, 0x46, 0x78, 0xc2, 0xfc, 0xbe, 0x80,
0xaf, 0x91, 0xd3, 0xed, 0x57, 0x69, 0x2b, 0x15
};
diff --git a/libc/net/lib_addrconfig.c b/libc/net/lib_addrconfig.c
index 46dc1cd603..15aa22c9cd 100644
--- a/libc/net/lib_addrconfig.c
+++ b/libc/net/lib_addrconfig.c
@@ -1,6 +1,6 @@
/****************************************************************************
* libc/net/lib_addrconf.c
- *
+ *
* Author: Max Nekludov
* Copyright (c) 2015, Max Nekludov. All rights reserved.
*
diff --git a/libc/net/lib_shutdown.c b/libc/net/lib_shutdown.c
index 028fb96eeb..a2c733dec2 100644
--- a/libc/net/lib_shutdown.c
+++ b/libc/net/lib_shutdown.c
@@ -1,6 +1,6 @@
/****************************************************************************
* libc/net/lib_shutdown.c
- *
+ *
* Copyright (c) 2015, Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
@@ -62,7 +62,7 @@
*
* Input Paramteers:
* sockfd - Specifies the file descriptor of the socket.
- * how - Specifies the type of shutdown. The values are as follows:
+ * how - Specifies the type of shutdown. The values are as follows:
*
* SHUT_RD - Disables further receive operations.
* SHUT_WR - Disables further send operations.
diff --git a/libc/netdb/lib_gethostbyaddr.c b/libc/netdb/lib_gethostbyaddr.c
index c06f165404..37d91897cb 100644
--- a/libc/netdb/lib_gethostbyaddr.c
+++ b/libc/netdb/lib_gethostbyaddr.c
@@ -60,7 +60,7 @@
* address types are AF_INET and AF_INET6. The host address argument is a
* pointer to a struct of a type depending on the address type, for example
* a struct in_addr * for address type AF_INET.
- *
+ *
* Input Parameters:
* addr - The address of the host to find.
* len - The length of the address
diff --git a/libc/stdio/lib_dtoa.c b/libc/stdio/lib_dtoa.c
index ab03d9b4a4..0cc3b48fdd 100644
--- a/libc/stdio/lib_dtoa.c
+++ b/libc/stdio/lib_dtoa.c
@@ -1193,7 +1193,7 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
case 2:
leftright = 0;
- /* no break */
+ /* FALLTHROUGH */
case 4:
if (ndigits <= 0)
{
@@ -1205,8 +1205,7 @@ char *__dtoa(double d, int mode, int ndigits, int *decpt, int *sign, char **rve)
case 3:
leftright = 0;
- /* no break */
-
+ /* FALLTHROUGH */
case 5:
i = ndigits + k + 1;
ilim = i;
diff --git a/libc/stdio/lib_sscanf.c b/libc/stdio/lib_sscanf.c
index 52e89b5e9a..72dca128bd 100644
--- a/libc/stdio/lib_sscanf.c
+++ b/libc/stdio/lib_sscanf.c
@@ -646,6 +646,7 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap)
default:
case 'd':
sign = true;
+ /* FALLTHROUGH */
case 'u':
base = 10;
break;
diff --git a/libc/stdlib/lib_strtod.c b/libc/stdlib/lib_strtod.c
index 62da9e0f6e..e544d52e3b 100644
--- a/libc/stdlib/lib_strtod.c
+++ b/libc/stdlib/lib_strtod.c
@@ -113,8 +113,10 @@ double strtod(FAR const char *str, FAR char **endptr)
{
case '-':
negative = 1; /* Fall through to increment position */
+ /* FALLTHROUGH */
case '+':
p++;
+ /* FALLTHROUGH */
default:
break;
}
@@ -175,8 +177,10 @@ double strtod(FAR const char *str, FAR char **endptr)
{
case '-':
negative = 1; /* Fall through to increment pos */
+ /* FALLTHROUGH */
case '+':
p++;
+ /* FALLTHROUGH */
default:
break;
}
diff --git a/libc/stdlib/lib_strtof.c b/libc/stdlib/lib_strtof.c
index 467842f4e6..86f9e04d2e 100644
--- a/libc/stdlib/lib_strtof.c
+++ b/libc/stdlib/lib_strtof.c
@@ -115,8 +115,10 @@ float strtof(FAR const char *str, FAR char **endptr)
{
case '-':
negative = 1; /* Fall through to increment position */
+ /* FALLTHROUGH */
case '+':
p++;
+ /* FALLTHROUGH */
default:
break;
}
@@ -177,8 +179,10 @@ float strtof(FAR const char *str, FAR char **endptr)
{
case '-':
negative = 1; /* Fall through to increment pos */
+ /* FALLTHROUGH */
case '+':
p++;
+ /* FALLTHROUGH */
default:
break;
}
diff --git a/libc/stdlib/lib_strtold.c b/libc/stdlib/lib_strtold.c
index c306392cec..ac9368e893 100644
--- a/libc/stdlib/lib_strtold.c
+++ b/libc/stdlib/lib_strtold.c
@@ -113,8 +113,10 @@ long double strtold(FAR const char *str, FAR char **endptr)
{
case '-':
negative = 1; /* Fall through to increment position */
+ /* FALLTHROUGH */
case '+':
p++;
+ /* FALLTHROUGH */
default:
break;
}
@@ -175,8 +177,10 @@ long double strtold(FAR const char *str, FAR char **endptr)
{
case '-':
negative = 1; /* Fall through to increment pos */
+ /* FALLTHROUGH */
case '+':
p++;
+ /* FALLTHROUGH */
default:
break;
}
diff --git a/libc/stdlib/lib_unlockpt.c b/libc/stdlib/lib_unlockpt.c
index 72e148b1be..8ea6e4c7ef 100644
--- a/libc/stdlib/lib_unlockpt.c
+++ b/libc/stdlib/lib_unlockpt.c
@@ -53,15 +53,15 @@
*
* Description:
* The unlockpt() function unlocks the slave pseudoterminal device
- * corresponding to the master pseudoterminal referred to by fd.
+ * corresponding to the master pseudoterminal referred to by fd.
* unlockpt() must be called before opening the slave side of a
- * pseudoterminal.
+ * pseudoterminal.
*
* Returned Values:
* When successful, unlockpt() returns 0. Otherwise, it returns -1 and
* sets errno appropriately.
*
- * EBADF - The fd argument is not a file descriptor open for writing.
+ * EBADF - The fd argument is not a file descriptor open for writing.
* EINVAL - The fd argument is not associated with a master
* pseudoterminal
*
diff --git a/libc/time/lib_localtime.c b/libc/time/lib_localtime.c
index c091d3d50d..24bec13194 100644
--- a/libc/time/lib_localtime.c
+++ b/libc/time/lib_localtime.c
@@ -231,7 +231,7 @@
* after the last transition time stored in the file (with nothing between
* the newlines if there is no POSIX representation for such instants).
*
- * If tz_version is '3' or greater, the above is extended as follows.
+ * If tz_version is '3' or greater, the above is extended as follows.
* First, the POSIX TZ string's hour offset may range from -167 through
* 167 as compared to the POSIX-required 0 through 24. Second, its DST
* start time may be January 1 at 00:00 and its stop time December 31 at
diff --git a/libc/wctype/lib_wctype.c b/libc/wctype/lib_wctype.c
index 99df9453ad..39041e31f4 100644
--- a/libc/wctype/lib_wctype.c
+++ b/libc/wctype/lib_wctype.c
@@ -26,7 +26,7 @@
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
diff --git a/libc/wqueue/work_usrthread.c b/libc/wqueue/work_usrthread.c
index 925e8d6f78..0f489a7258 100644
--- a/libc/wqueue/work_usrthread.c
+++ b/libc/wqueue/work_usrthread.c
@@ -257,7 +257,7 @@ void work_process(FAR struct usr_wqueue_s *wqueue)
elapsed = clock_systimer() - stick;
if (elapsed < wqueue->delay && next > 0)
{
- /* How must time would we need to delay to get to the end of the
+ /* How must time would we need to delay to get to the end of the
* sampling period? The amount of time we delay should be the smaller
* of the time to the end of the sampling period and the time to the
* next work expiry.
diff --git a/mm/iob/iob.h b/mm/iob/iob.h
index 855c5fd1ab..48aef8a946 100644
--- a/mm/iob/iob.h
+++ b/mm/iob/iob.h
@@ -61,7 +61,7 @@
# define iobinfo(format, ...) _info(format, ##__VA_ARGS__)
#else
-
+
# define ioberr _err
# define iobwarn _warn
# define iobinfo _info
@@ -75,7 +75,7 @@
# define iobinfo(format, ...)
#else
-
+
# define ioberr (void)
# define iobwarn (void)
# define iobinfo (void)
diff --git a/mm/kmm_heap/kmm_sbrk.c b/mm/kmm_heap/kmm_sbrk.c
index 4d4b95746f..cbb7f5ed5f 100644
--- a/mm/kmm_heap/kmm_sbrk.c
+++ b/mm/kmm_heap/kmm_sbrk.c
@@ -59,7 +59,7 @@
* The sbrk() function adds 'incr' bytes to the break value and changes
* the allocated space accordingly. If incr is negative, the amount of
* allocated space is decreased by incr bytes. The current value of the
- * program break is returned by sbrk(0).
+ * program break is returned by sbrk(0).
*
* Input Parameters:
* incr - Specifies the number of bytes to add or to remove from the
diff --git a/mm/mm_heap/mm_sbrk.c b/mm/mm_heap/mm_sbrk.c
index ddbf288d06..a909d082c2 100644
--- a/mm/mm_heap/mm_sbrk.c
+++ b/mm/mm_heap/mm_sbrk.c
@@ -65,7 +65,7 @@
* The sbrk() function adds 'incr' bytes to the break value and changes
* the allocated space accordingly. If incr is negative, the amount of
* allocated space is decreased by incr bytes. The current value of the
- * program break is returned by sbrk(0).
+ * program break is returned by sbrk(0).
*
* Input Parameters:
* heap - A reference to the data structure that defines this heap.
diff --git a/mm/shm/shm.h b/mm/shm/shm.h
index 63ed9e51e5..4bd3bf3179 100644
--- a/mm/shm/shm.h
+++ b/mm/shm/shm.h
@@ -81,7 +81,7 @@ struct shm_region_s
};
/* This structure represents the set of all shared memory regions.
- * Access to the region
+ * Access to the region
*/
struct shm_info_s
diff --git a/mm/umm_heap/umm_sbrk.c b/mm/umm_heap/umm_sbrk.c
index ecd7416cc0..d633af3d97 100644
--- a/mm/umm_heap/umm_sbrk.c
+++ b/mm/umm_heap/umm_sbrk.c
@@ -63,7 +63,7 @@
* The sbrk() function adds 'incr' bytes to the break value and changes
* the allocated space accordingly. If incr is negative, the amount of
* allocated space is decreased by incr bytes. The current value of the
- * program break is returned by sbrk(0).
+ * program break is returned by sbrk(0).
*
* Input Parameters:
* incr - Specifies the number of bytes to add or to remove from the
diff --git a/net/Kconfig b/net/Kconfig
index 62b5e5ae39..c3a8022a75 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -137,6 +137,7 @@ config NET_6LOWPAN
select NETDEV_MULTINIC if NET_ETHERNET || NET_LOOPBACK || NET_SLIP || NET_TUN
select NET_MULTILINK if NET_ETHERNET || NET_LOOPBACK || NET_SLIP || NET_TUN
select NETDEV_IOCTL
+ select NET_HAVE_STAR
depends on NET_IPv6
---help---
Enable support for IEEE 802.15.4 Low power Wireless Personal Area
@@ -284,6 +285,20 @@ menuconfig NET_IPv6
source "net/neighbor/Kconfig"
source "net/sixlowpan/Kconfig"
+config NET_IPFORWARD
+ bool "Enable L2 forwarding"
+ default n
+ depends on NET_IPv6
+ ---help---
+ Enable forwarding of IPv6 packets. Packets received with IPv6
+ addresses which are not supported by this platform will be forwarded
+ to the appropriate network device. Routing table support may be
+ required.
+
+ NOTE: L2 forwarding only supported for IPv6. There is no technical
+ reason why IPv4 forwarding has not been implemented, it just has
+ not yet been done.
+
endmenu # Internet Protocol Selection
source "net/socket/Kconfig"
@@ -306,10 +321,54 @@ config NET_STATISTICS
---help---
Network layer statistics on or off
+config NET_HAVE_STAR
+ bool
+ default n
+ ---help---
+ Automatically enabled if at least one selected L2 protocol supports
+ a STAR topology. In order to support the star topology, the L2
+ protocol must support relaying all packets to a well-known hub node.
+
+menu "Network Topologies"
+
+config NET_STAR
+ bool "Enable star topology"
+ default n
+ depends on NET_HAVE_STAR && NET_IPv6
+ ---help---
+ Enable support for a star network topology.
+
+ NOTE: Currently only supported by 6LoWPAN.
+ NOTE: L2 forwarding only supported for IPv6.
+
+choice
+ prompt "Node role"
+ depends on NET_STAR
+ default NET_STARPOINT
+ ---help---
+ Specifies the role of this not in the star configuration.
+
+config NET_STARPOINT
+ bool "Point node in star"
+ ---help---
+ The node is a "point" in the star configuration and must send all
+ packets to the star hub node.
+
+config NET_STARHUB
+ bool "Hub node of star"
+ select NET_IPFORWARD
+ ---help---
+ This is the "hub" node in the star configurations. It will receive
+ packets packets from all "point" nodes and perform L2 forwarding of
+ the packets that are not destined for this node.
+
+endchoice # Node role
+endmenu # Network Topologies
+
source "net/route/Kconfig"
config NET_HOSTNAME
- string "Host name for current machine"
+ string "Host name for this device"
default ""
---help---
A unique name to identify device on the network
diff --git a/net/devif/Make.defs b/net/devif/Make.defs
index f46aa5c26a..714f4356e1 100644
--- a/net/devif/Make.defs
+++ b/net/devif/Make.defs
@@ -46,6 +46,9 @@ endif
ifeq ($(CONFIG_NET_IPv6),y)
NET_CSRCS += ipv6_input.c
+ifeq ($(CONFIG_NET_IPFORWARD),y)
+NET_CSRCS += ipv6_forward.c
+endif
endif
# I/O buffer chain support required?
diff --git a/net/devif/devif.h b/net/devif/devif.h
index e90377dd58..78fcce32e5 100644
--- a/net/devif/devif.h
+++ b/net/devif/devif.h
@@ -425,6 +425,33 @@ uint16_t devif_conn_event(FAR struct net_driver_s *dev, FAR void *pvconn,
uint16_t devif_dev_event(FAR struct net_driver_s *dev, void *pvconn,
uint16_t flags);
+/****************************************************************************
+ * Name: ipv6_forward
+ *
+ * Description:
+ * This function is called from ipv6_input when a packet is received that
+ * is not destined for us. In this case, the packet may need to be
+ * forwarded to another device (or sent back out the same device)
+ * depending configuration, routing table information, and the IPv6
+ * networks served by various network devices.
+ *
+ * Input Parameters:
+ * dev - The device on which the packet was received and which contains
+ * the IPv6 packet.
+ * ipv6 - A convenience pointer to the IPv6 header in within the IPv6
+ * packet
+ *
+ * Returned Value:
+ * Zero is returned if the packet was successfully forward; A negated
+ * errno value is returned if the packet is not forwardable. In that
+ * latter case, the caller (ipv6_input()) should drop the packet.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_NET_IPFORWARD) && defined(CONFIG_NET_IPv6)
+int ipv6_forward(FAR struct net_driver_s *dev, FAR struct ipv6_hdr_s *ipv6);
+#endif
+
/****************************************************************************
* Send data on the current connection.
*
diff --git a/net/devif/devif_poll.c b/net/devif/devif_poll.c
index 41475cb9b5..08d6c99e8a 100644
--- a/net/devif/devif_poll.c
+++ b/net/devif/devif_poll.c
@@ -89,7 +89,8 @@ systime_t g_polltime;
*
* Description:
* Generic output conversion hook. Only needed for IEEE802.15.4 for now
- * is a point where support for other conversions may be provided.
+ * but this is a point where support for other conversions may be
+ * provided.
*
* TCP output comes through three different mechansims. Either from:
*
@@ -136,7 +137,7 @@ static void devif_packet_conversion(FAR struct net_driver_s *dev,
{
/* Let 6LoWPAN convert IPv6 TCP output into IEEE802.15.4 frames. */
- sixlowpan_tcp_send(dev);
+ sixlowpan_tcp_send(dev, dev, ipv6);
}
else
{
diff --git a/net/devif/ipv6_forward.c b/net/devif/ipv6_forward.c
new file mode 100644
index 0000000000..905b977ed1
--- /dev/null
+++ b/net/devif/ipv6_forward.c
@@ -0,0 +1,265 @@
+/****************************************************************************
+ * net/devif/ipv6_forward.c
+ *
+ * Copyright (C) 2017 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include
+
+#include
+#include
+
+#include
+#include
+
+#include "netdev/netdev.h"
+#include "sixlowpan/sixlowpan.h"
+#include "devif/devif.h"
+
+#if defined(CONFIG_NET_IPFORWARD) && defined(CONFIG_NET_IPv6)
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ipv6_packet_conversion
+ *
+ * Description:
+ * Generic output conversion hook. Only needed for IEEE802.15.4 for now
+ * but this is a point where support for other conversions may be
+ * provided.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NET_6LOWPAN
+static int ipv6_packet_conversion(FAR struct net_driver_s *dev,
+ FAR struct net_driver_s *fwddev,
+ FAR struct ipv6_hdr_s *ipv6)
+{
+#ifdef CONFIG_NET_MULTILINK
+ /* Handle the case where multiple link layer protocols are supported */
+
+ if (dev->d_len > 0 && fwddev->d_lltype == NET_LL_IEEE802154)
+#else
+ if (dev->d_len > 0)
+#endif
+ {
+#ifdef CONFIG_NET_TCP
+ if (ipv6->proto == IP_PROTO_TCP)
+ {
+ /* Let 6LoWPAN convert IPv6 TCP output into IEEE802.15.4 frames. */
+
+ sixlowpan_tcp_send(dev, fwddev, ipv6);
+ }
+ else
+#endif
+#ifdef CONFIG_NET_UDP
+ if (ipv6->proto == IP_PROTO_UDP)
+ {
+ /* Let 6LoWPAN convert IPv6 UDP output into IEEE802.15.4 frames. */
+
+ sixlowpan_udp_send(dev, fwddev, ipv6);
+ }
+ else
+#endif
+ {
+ /* Otherwise, we will have to drop the packet */
+
+ nwarn("WARNING: Dropping. Unsupported 6LoWPAN protocol: %d\n",
+ ipv6->proto);
+
+#ifdef CONFIG_NET_STATISTICS
+ g_netstats.ipv6.drop++;
+#endif
+ }
+
+ dev->d_len = 0;
+ return OK;
+ }
+
+ return -EPFNOSUPPORT;
+}
+#else
+# define ipv6_packet_conversion(dev, ipv6)
+#endif /* CONFIG_NET_6LOWPAN */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: ipv6_forward
+ *
+ * Description:
+ * This function is called from ipv6_input when a packet is received that
+ * is not destined for us. In this case, the packet may need to be
+ * forwarded to another device (or sent back out the same device)
+ * depending configuration, routing table information, and the IPv6
+ * networks served by various network devices.
+ *
+ * Input Parameters:
+ * dev - The device on which the packet was received and which contains
+ * the IPv6 packet.
+ * ipv6 - A convenience pointer to the IPv6 header in within the IPv6
+ * packet
+ *
+ * On input:
+ * - dev->d_buf holds the received packet.
+ * - dev->d_len holds the length of the received packet MINUS the
+ * size of the L1 header. That was subtracted out by ipv6_input.
+ * - ipv6 points to the IPv6 header with dev->d_buf.
+ *
+ * Returned Value:
+ * Zero is returned if the packet was successfully forward; A negated
+ * errno value is returned if the packet is not forwardable. In that
+ * latter case, the caller (ipv6_input()) should drop the packet.
+ *
+ ****************************************************************************/
+
+int ipv6_forward(FAR struct net_driver_s *dev, FAR struct ipv6_hdr_s *ipv6)
+{
+ /* Multiple network devices */
+
+ FAR struct net_driver_s *fwddev;
+ int ret;
+
+ /* Search for a device that can forward this packet. This is a trivial
+ * serch if there is only a single network device (CONFIG_NETDEV_MULTINIC
+ * not defined). But netdev_findby_ipv6addr() will still assure
+ * routability in that case.
+ */
+
+#ifdef CONFIG_NETDEV_MULTINIC
+ fwddev = netdev_findby_ipv6addr(ipv6->srcipaddr, ipv6->destipaddr);
+#else
+ fwddev = netdev_findby_ipv6addr(ipv6->destipaddr);
+#endif
+ if (fwddev == NULL)
+ {
+ nwarn("WARNING: Not routable\n");
+ return (ssize_t)-ENETUNREACH;
+ }
+
+#if defined(CONFIG_NETDEV_MULTINIC)
+ /* Check if we are forwarding on the same device that we received the
+ * packet from.
+ */
+
+ if (fwddev != dev)
+ {
+ /* Perform any necessary packet conversions. */
+
+ ret = ipv6_packet_conversion(dev, fwddev, ipv6);
+ if (ret < 0)
+ {
+ /* Extract the IPv6 + L3 header; Move the data payload to an IOB
+ * chain.
+ */
+
+ /* Notify the forwarding device that TX data is available */
+
+ /* Set up to send the packet when the selected device polls for TX
+ * data.
+ */
+
+ /* REVISIT: For Ethernet we may have to fix up the Ethernet header:
+ * - source MAC, the MAC of the current device.
+ * - dest MAC, the MAC associated with the destination IPv6 adress.
+ * This will involve ICMPv6 and Neighbor Discovery.
+ */
+
+ /* Return success with dev->d_len = 0 */
+
+# warning Missing logic
+ nwarn("WARNING: Packet forwarding not yet supported "
+ "across different devices\n");
+ return -ENOSYS;
+ }
+ }
+ else
+#endif /* CONFIG_NETDEV_MULTINIC */
+
+#if defined(CONFIG_NET_6LOWPAN) /* REVISIT: Currently only suport for
+ * 6LoWPAN */
+ {
+ /* Single network device */
+
+ /* Perform any necessary packet conversions. If the packet was handled
+ * via a backdoor path (or dropped), then dev->d_len will be zero. If
+ * the packet needs to be forwarded in the normal manner then
+ * dev->d_len will be unchanged.
+ */
+
+ ret = ipv6_packet_conversion(dev, dev, ipv6);
+ if (ret < 0)
+ {
+#ifdef CONFIG_NET_ETHERNET
+ /* REVISIT: For Ethernet we may have to fix up the Ethernet header:
+ * - source MAC, the MAC of the current device.
+ * - dest MAC, the MAC associated with the destination IPv6 adress.
+ * This will involve ICMPv6 and Neighbor Discovery.
+ */
+
+ /* Correct dev->d_buf by adding back the L1 header length */
+#endif
+
+ /* Nothing other 6LoWPAN forwarding is currently handled and that
+ * case was dealt with in ipv6_packet_conversion().
+ */
+
+# warning Missing logic
+ nwarn("WARNING: Packet forwarding supported only for 6LoWPAN\n");
+ return -ENOSYS;
+ }
+ }
+
+#else /* CONFIG_NET_6LOWPAN */
+ {
+ nwarn("WARNING: Packet forwarding not supported in this configuration\n");
+ return -ENOSYS;
+ }
+#endif /* CONFIG_NET_6LOWPAN */
+
+ /* Return success. ipv6_input will return to the network driver with
+ * dev->d_len set to the packet size and the network driver will perform
+ * the transfer.
+ */
+
+ return OK;
+}
+
+#endif /* CONFIG_NET_IPFORWARD && CONFIG_NET_IPv6 */
diff --git a/net/devif/ipv6_input.c b/net/devif/ipv6_input.c
index 8ed331f7ef..98db2cd7c9 100644
--- a/net/devif/ipv6_input.c
+++ b/net/devif/ipv6_input.c
@@ -87,6 +87,7 @@
#include
+#include
#include
#include
#include
@@ -99,6 +100,7 @@
#include "pkt/pkt.h"
#include "icmpv6/icmpv6.h"
+#include "netdev/netdev.h"
#include "devif/devif.h"
/****************************************************************************
@@ -109,6 +111,112 @@
#define IPv6BUF ((FAR struct ipv6_hdr_s *)&dev->d_buf[NET_LL_HDRLEN(dev)])
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: check_dev_destipaddr
+ *
+ * Description:
+ * Check if the destination address in the IPv6 is destined for the
+ * provided network device.
+ *
+ * Returned Value:
+ * 1 - This packet is destined for this network device
+ * 0 - This packet is NOT destined for this network device
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NETDEV_MULTINIC
+static int check_dev_destipaddr(FAR struct net_driver_s *dev, FAR void *arg)
+{
+ FAR struct ipv6_hdr_s *ipv6 = (FAR struct ipv6_hdr_s *)arg;
+
+ /* Check if the IPv6 destination address matches the IPv6 address assigned
+ * to this device.
+ */
+
+ if (net_ipv6addr_cmp(ipv6->destipaddr, dev->d_ipv6addr))
+ {
+ return 1;
+ }
+
+ /* No match, return 0 to keep searching */
+
+ return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: check_destipaddr
+ *
+ * Description:
+ * Check if the destination address in the IPv6 is destined for us. This
+ * is typically just a comparison the of the IPv6 destination address in
+ * the IPv6 packet with the IPv6 address assigned to the receiving device.
+ *
+ * Input Parameters:
+ * dev - The device on which the packet was received and which contains
+ * the IPv6 packet.
+ * ipv6 - A convenience pointer to the IPv6 header in within the IPv6
+ * packet
+ *
+ * Returned Value:
+ * true - This packet is destined for us
+ * false - This packet is NOT destined for us and may need to be forwarded.
+ *
+ ****************************************************************************/
+
+static bool check_destipaddr(FAR struct net_driver_s *dev,
+ FAR struct ipv6_hdr_s *ipv6)
+{
+#ifdef CONFIG_NETDEV_MULTINIC
+ int ret;
+#endif
+
+ /* For IPv6, packet reception is a little trickier as we need to make sure
+ * that we listen to certain multicast addresses (all hosts multicast
+ * address, and the solicited-node multicast address) as well. However,
+ * we will cheat here and accept all multicast packets that are sent to
+ * the ff02::/16 addresses.
+ */
+
+ if (ipv6->destipaddr[0] == HTONS(0xff02))
+ {
+ return true;
+ }
+
+#ifdef CONFIG_NETDEV_MULTINIC
+ /* We will also allow for a perverse case where we receive a packet
+ * addressed to us, but on a different device. Can that really happen?
+ */
+
+ ret = netdev_foreach(check_dev_destipaddr, ipv6);
+ if (ret == 1)
+ {
+ /* The traversal of the network devices will return 0 if there is
+ * no network device with that address or 1 if there is a network
+ * device with such an address.
+ */
+
+ return true;
+ }
+#else
+ /* There is only one network device. If this packet is addressed to us,
+ * then the IPv6 destination address must be the address of assigned to
+ * this device.
+ */
+
+ if (net_ipv6addr_cmp(ipv6->destipaddr, dev->d_ipv6addr))
+ {
+ return true;
+ }
+#endif
+
+ return false;
+}
+
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -117,12 +225,21 @@
* Name: ipv6_input
*
* Description:
+ * Receive an IPv6 packet from the network device. Verify and forward to
+ * L3 packet handling logic if the packet is destined for us.
*
+ * Input Parameters:
+ * dev - The device on which the packet was received and which contains
+ * the IPv6 packet.
* Returned Value:
- * OK The packet was processed (or dropped) and can be discarded.
- * ERROR There is a matching connection, but could not dispatch the packet
- * yet. Currently useful for UDP when a packet arrives before a recv
- * call is in place.
+ * OK - The packet was processed (or dropped) and can be discarded.
+ * ERROR - There is a matching connection, but could not dispatch the
+ * packet yet. Currently useful for UDP when a packet arrives
+ * before a recv call is in place.
+ *
+ * If this function returns to the network driver with dev->d_len > 0,
+ * that is an indication to the driver that there is an outgoing response
+ * to this input.
*
* Assumptions:
*
@@ -133,6 +250,9 @@ int ipv6_input(FAR struct net_driver_s *dev)
FAR struct ipv6_hdr_s *ipv6 = IPv6BUF;
uint16_t hdrlen;
uint16_t pktlen;
+#ifdef CONFIG_NET_IPFORWARD
+ int ret;
+#endif
/* This is where the input processing starts. */
@@ -222,25 +342,39 @@ int ipv6_input(FAR struct net_driver_s *dev)
}
/* Check if the packet is destined for out IP address */
+
else
#endif
{
- /* Check if the packet is destined for our IP address.
- *
- * For IPv6, packet reception is a little trickier as we need to
- * make sure that we listen to certain multicast addresses (all
- * hosts multicast address, and the solicited-node multicast
- * address) as well. However, we will cheat here and accept all
- * multicast packets that are sent to the ff02::/16 addresses.
- */
+ /* Check if the packet is destined for us. */
- if (!net_ipv6addr_cmp(ipv6->destipaddr, dev->d_ipv6addr) &&
- ipv6->destipaddr[0] != HTONS(0xff02))
+ if (!check_destipaddr(dev, ipv6))
{
-#ifdef CONFIG_NET_STATISTICS
- g_netstats.ipv6.drop++;
+#ifdef CONFIG_NET_IPFORWARD
+ /* Not destined for us, try to forward the packet */
+
+ ret = ipv6_forward(dev, ipv6);
+ if (ret >= 0)
+ {
+ /* The packet was forwarded. Return success; d_len will
+ * be set appropriately by the forwarding logic: Cleared
+ * if the packet is forward via anoother device or non-
+ * zero if it will be forwarded by the same device that
+ * it was received on.
+ */
+
+ return OK;
+ }
+ else
#endif
- goto drop;
+ {
+ /* Not destined for us and not forwardable... drop the packet. */
+
+#ifdef CONFIG_NET_STATISTICS
+ g_netstats.ipv6.drop++;
+#endif
+ goto drop;
+ }
}
}
@@ -286,7 +420,7 @@ int ipv6_input(FAR struct net_driver_s *dev)
{
/* Let 6LoWPAN handle the TCP output */
- sixlowpan_tcp_send(dev);
+ sixlowpan_tcp_send(dev, dev, ipv6);
/* Drop the packet in the d_buf */
diff --git a/net/icmpv6/icmpv6_autoconfig.c b/net/icmpv6/icmpv6_autoconfig.c
index 08ec223def..7dc31617e7 100644
--- a/net/icmpv6/icmpv6_autoconfig.c
+++ b/net/icmpv6/icmpv6_autoconfig.c
@@ -499,7 +499,7 @@ int icmpv6_autoconfig(FAR struct net_driver_s *dev)
ninfo("Timed out... retrying %d\n", retries + 1);
}
- /* Check for failures. Note: On successful return, the network will be
+ /* Check for failures. Note: On successful return, the network will be
* in the down state, but not in the event of failures.
*/
diff --git a/net/neighbor/neighbor_ethernet_out.c b/net/neighbor/neighbor_ethernet_out.c
index adfff98723..f342f7cc40 100644
--- a/net/neighbor/neighbor_ethernet_out.c
+++ b/net/neighbor/neighbor_ethernet_out.c
@@ -121,7 +121,7 @@ static const uint8_t g_multicast_ethaddr[3] =
*
* If no Neighbor Table entry is found for the destination IPv6 address,
* the packet in the d_buf is replaced by an ICMPv6 Neighbor Solicit
- * request packet for the IPv6 address. The IPv6 packet is dropped and
+ * request packet for the IPv6 address. The IPv6 packet is dropped and
* it is assumed that the higher level protocols (e.g., TCP) eventually
* will retransmit the dropped packet.
*
@@ -161,7 +161,7 @@ void neighbor_out(FAR struct net_driver_s *dev)
/* First check if destination is a IPv6 multicast address. IPv6
* multicast addresses in IPv6 have the prefix ff00::/8
- *
+ *
* Bits 120-127: Prefix
* Bits 116-119: Flags (1, 2, or 3 defined)
* Bits 112-115: Scope
diff --git a/net/sixlowpan/sixlowpan.h b/net/sixlowpan/sixlowpan.h
index a175a3d3f5..aad911597a 100644
--- a/net/sixlowpan/sixlowpan.h
+++ b/net/sixlowpan/sixlowpan.h
@@ -54,6 +54,7 @@
****************************************************************************/
struct net_driver_s; /* Forward reference */
+struct ipv6_hdr_s; /* Forward reference */
struct socket; /* Forward reference */
struct sockaddr; /* Forward reference */
@@ -126,7 +127,13 @@ ssize_t psock_6lowpan_tcp_send(FAR struct socket *psock, FAR const void *buf,
* the IEEE80215.4 frames.
*
* Parameters:
- * dev - An instance of nework device state structure
+ * dev - The network device containing the packet to be sent.
+ * fwddev - The network device used to send the data. This will be the
+ * same device except for the IP forwarding case where packets
+ * are sent across devices.
+ * ipv6 - A pointer to the IPv6 header in dev->d_buf which lies AFTER
+ * the L1 header. NOTE: dev->d_len must have been decremented
+ * by the size of any preceding MAC header.
*
* Returned Value:
* None
@@ -136,7 +143,9 @@ ssize_t psock_6lowpan_tcp_send(FAR struct socket *psock, FAR const void *buf,
*
****************************************************************************/
-void sixlowpan_tcp_send(FAR struct net_driver_s *dev);
+void sixlowpan_tcp_send(FAR struct net_driver_s *dev,
+ FAR struct net_driver_s *fwddev,
+ FAR struct ipv6_hdr_s *ipv6);
/****************************************************************************
* Name: psock_6lowpan_udp_send
@@ -200,5 +209,35 @@ ssize_t psock_6lowpan_udp_sendto(FAR struct socket *psock,
FAR const struct sockaddr *to,
socklen_t tolen);
+/****************************************************************************
+ * Name: sixlowpan_udp_send
+ *
+ * Description:
+ * Handles forwarding a UDP packet via 6LoWPAN. This is currently only
+ * used by the IPv6 forwarding logic.
+ *
+ * Parameters:
+ * dev - An instance of nework device state structure
+ * fwddev - The network device used to send the data. This will be the
+ * same device except for the IP forwarding case where packets
+ * are sent across devices.
+ * ipv6 - A pointer to the IPv6 header in dev->d_buf which lies AFTER
+ * the L1 header. NOTE: dev->d_len must have been decremented
+ * by the size of any preceding MAC header.
+ *
+ * Returned Value:
+ * None
+ *
+ * Assumptions:
+ * Called with the network locked.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NET_IPFORWARD
+void sixlowpan_udp_send(FAR struct net_driver_s *dev,
+ FAR struct net_driver_s *fwddev,
+ FAR struct ipv6_hdr_s *ipv6);
+#endif
+
#endif /* CONFIG_NET_6LOWPAN */
#endif /* _NET_SIXLOWPAN_SIXLOWPAN_H */
diff --git a/net/sixlowpan/sixlowpan_framelist.c b/net/sixlowpan/sixlowpan_framelist.c
index 53921963ac..2f7b139817 100644
--- a/net/sixlowpan/sixlowpan_framelist.c
+++ b/net/sixlowpan/sixlowpan_framelist.c
@@ -324,6 +324,23 @@ int sixlowpan_queue_frames(FAR struct ieee802154_driver_s *ieee,
&ieee->i_dev.d_mac.ieee802154);
#endif
+#ifdef CONFIG_NET_STARPOINT
+ /* If this node is a "point" in a star topology, then the destination
+ * MAC address is the address of the hub/PAN coordinator.
+ */
+
+ if (destmac->extended)
+ {
+ pktmeta.dextended = TRUE;
+ ret = sixlowpan_coord_eaddr(ieee, pktmeta.dest.eaddr.u8);
+ }
+ else
+ {
+ ret = sixlowpan_coord_saddr(ieee, pktmeta.dest.saddr.u8);
+ }
+#else
+ /* Otherwise, it is the actual destination node address */
+
if (destmac->extended)
{
pktmeta.dextended = TRUE;
@@ -333,6 +350,7 @@ int sixlowpan_queue_frames(FAR struct ieee802154_driver_s *ieee,
{
sixlowpan_saddrcopy(pktmeta.dest.saddr.u8, destmac->u.saddr.u8);
}
+#endif
/* Get the destination PAN ID.
*
diff --git a/net/sixlowpan/sixlowpan_framer.c b/net/sixlowpan/sixlowpan_framer.c
index 18e7cd56d0..91bff0cf76 100644
--- a/net/sixlowpan/sixlowpan_framer.c
+++ b/net/sixlowpan/sixlowpan_framer.c
@@ -228,7 +228,7 @@ int sixlowpan_meta_data(FAR struct ieee802154_driver_s *ieee,
#ifdef CONFIG_IEEE802154_SECURITY
# warning CONFIG_IEEE802154_SECURITY not yet supported
#endif
-
+
#ifdef CONFIG_IEEE802154_UWB
# warning CONFIG_IEEE802154_UWB not yet supported
#endif
diff --git a/net/sixlowpan/sixlowpan_internal.h b/net/sixlowpan/sixlowpan_internal.h
index 0c94d05dba..221d3ad2ef 100644
--- a/net/sixlowpan/sixlowpan_internal.h
+++ b/net/sixlowpan/sixlowpan_internal.h
@@ -593,6 +593,46 @@ bool sixlowpan_iseaddrbased(const net_ipv6addr_t ipaddr,
bool sixlowpan_ismacbased(const net_ipv6addr_t ipaddr,
FAR const struct sixlowpan_tagaddr_s *addr);
+/****************************************************************************
+ * Name: sixlowpan_coord_eaddr
+ *
+ * Description:
+ * Get the extended address of the PAN coordinator.
+ *
+ * Input parameters:
+ * ieee - A reference IEEE802.15.4 MAC network device structure.
+ * eaddr - The location in which to return the extended address.
+ *
+ * Returned Value:
+ * Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NET_STARPOINT
+int sixlowpan_coord_eaddr(FAR struct ieee802154_driver_s *ieee,
+ FAR uint8_t *eaddr);
+#endif
+
+/****************************************************************************
+ * Name: sixlowpan_coord_saddr
+ *
+ * Description:
+ * Get the short address of the PAN coordinator.
+ *
+ * Input parameters:
+ * ieee - A reference IEEE802.15.4 MAC network device structure.
+ * saddr - The location in which to return the short address.
+ *
+ * Returned Value:
+ * Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NET_STARPOINT
+int sixlowpan_coord_saddr(FAR struct ieee802154_driver_s *ieee,
+ FAR uint8_t *saddr);
+#endif
+
/****************************************************************************
* Name: sixlowpan_src_panid
*
diff --git a/net/sixlowpan/sixlowpan_tcpsend.c b/net/sixlowpan/sixlowpan_tcpsend.c
index 4e3701e6fe..eac31b9026 100644
--- a/net/sixlowpan/sixlowpan_tcpsend.c
+++ b/net/sixlowpan/sixlowpan_tcpsend.c
@@ -63,7 +63,6 @@
/* Buffer access helpers */
-#define IPv6BUF(dev) ((FAR struct ipv6_hdr_s *)((dev)->d_buf))
#define TCPBUF(dev) ((FAR struct tcp_hdr_s *)(&(dev)->d_buf[IPv6_HDRLEN]))
/****************************************************************************
@@ -540,7 +539,7 @@ static uint16_t tcp_send_interrupt(FAR struct net_driver_s *dev,
*
* NOTE: tcp_appsend() normally increments conn->unacked based on
* the value of dev->d_sndlen. However, dev->d_len is always
- * zero for 6LoWPAN since it does no send via the dev->d_bufuse
+ * zero for 6LoWPAN since it does not send via the dev->d_buf
* but, rather, uses a backdoor frame interface with the IEEE
* 802.15.4 MAC.
*/
@@ -876,7 +875,7 @@ ssize_t psock_6lowpan_tcp_send(FAR struct socket *psock, FAR const void *buf,
* TCP output comes through three different mechansims. Either from:
*
* 1. TCP socket output. For the case of TCP output to an
- * IEEE802.15.4 device, the TCP output is caught in the socket
+ * IEEE802.15.4, the TCP output is caught in the socket
* send()/sendto() logic and and redirected to psock_6lowpan_tcp_send().
* 2. TCP output from the TCP state machine. That will occur
* during TCP packet processing by the TCP state meachine.
@@ -889,7 +888,13 @@ ssize_t psock_6lowpan_tcp_send(FAR struct socket *psock, FAR const void *buf,
* the IEEE80215.4 frames.
*
* Parameters:
- * dev - An instance of nework device state structure
+ * dev - The network device containing the packet to be sent.
+ * fwddev - The network device used to send the data. This will be the
+ * same device except for the IP forwarding case where packets
+ * are sent across devices.
+ * ipv6 - A pointer to the IPv6 header in dev->d_buf which lies AFTER
+ * the L1 header. NOTE: dev->d_len must have been decremented
+ * by the size of any preceding MAC header.
*
* Returned Value:
* None
@@ -899,15 +904,17 @@ ssize_t psock_6lowpan_tcp_send(FAR struct socket *psock, FAR const void *buf,
*
****************************************************************************/
-void sixlowpan_tcp_send(FAR struct net_driver_s *dev)
+void sixlowpan_tcp_send(FAR struct net_driver_s *dev,
+ FAR struct net_driver_s *fwddev,
+ FAR struct ipv6_hdr_s *ipv6)
{
- DEBUGASSERT(dev != NULL && dev->d_len > 0);
+ DEBUGASSERT(dev != NULL && dev->d_len > 0 && fwddev != NULL);
/* Double check */
ninfo("d_len %u\n", dev->d_len);
sixlowpan_dumpbuffer("Outgoing TCP packet",
- (FAR const uint8_t *)IPv6BUF(dev), dev->d_len);
+ (FAR const uint8_t *)ipv6, dev->d_len);
if (dev != NULL && dev->d_len > 0)
{
@@ -918,7 +925,7 @@ void sixlowpan_tcp_send(FAR struct net_driver_s *dev)
* and the TCP state machine should only response with TCP packets.
*/
- ipv6hdr = (FAR struct ipv6tcp_hdr_s *)(dev->d_buf);
+ ipv6hdr = (FAR struct ipv6tcp_hdr_s *)ipv6;
/* The TCP data payload should follow the IPv6 header plus the
* protocol header.
@@ -960,12 +967,12 @@ void sixlowpan_tcp_send(FAR struct net_driver_s *dev)
{
/* Convert the outgoing packet into a frame list. */
- buf = dev->d_buf + hdrlen;
+ buf = (FAR uint8_t *)ipv6 + hdrlen;
buflen = dev->d_len - hdrlen;
(void)sixlowpan_queue_frames(
- (FAR struct ieee802154_driver_s *)dev, &ipv6hdr->ipv6,
- buf, buflen, &destmac);
+ (FAR struct ieee802154_driver_s *)fwddev,
+ &ipv6hdr->ipv6, buf, buflen, &destmac);
}
}
}
diff --git a/net/sixlowpan/sixlowpan_udpsend.c b/net/sixlowpan/sixlowpan_udpsend.c
index 75b4b2ba43..c7a7d5e8f6 100644
--- a/net/sixlowpan/sixlowpan_udpsend.c
+++ b/net/sixlowpan/sixlowpan_udpsend.c
@@ -407,4 +407,98 @@ ssize_t psock_6lowpan_udp_send(FAR struct socket *psock, FAR const void *buf,
sizeof(struct sockaddr_in6));
}
+/****************************************************************************
+ * Name: sixlowpan_udp_send
+ *
+ * Description:
+ * Handles forwarding a UDP packet via 6LoWPAN. This is currently only
+ * used by the IPv6 forwarding logic.
+ *
+ * Parameters:
+ * dev - An instance of nework device state structure
+ * fwddev - The network device used to send the data. This will be the
+ * same device except for the IP forwarding case where packets
+ * are sent across devices.
+ * ipv6 - A pointer to the IPv6 header in dev->d_buf which lies AFTER
+ * the L1 header. NOTE: dev->d_len must have been decremented
+ * by the size of any preceding MAC header.
+ *
+ * Returned Value:
+ * None
+ *
+ * Assumptions:
+ * Called with the network locked.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NET_IPFORWARD
+void sixlowpan_udp_send(FAR struct net_driver_s *dev,
+ FAR struct net_driver_s *fwddev,
+ FAR struct ipv6_hdr_s *ipv6)
+{
+ FAR struct ipv6udp_hdr_s *ipv6udp = (FAR struct ipv6udp_hdr_s *)ipv6;
+
+ /* Double check */
+
+ DEBUGASSERT(dev != NULL && dev->d_len > 0);
+
+ ninfo("d_len %u\n", dev->d_len);
+
+ if (dev != NULL && dev->d_len > 0)
+ {
+
+ sixlowpan_dumpbuffer("Outgoing UDP packet",
+ (FAR const uint8_t *)ipv6udp, dev->d_len);
+
+ /* The UDP data payload should follow the IPv6 header plus the
+ * protocol header.
+ */
+
+ if (ipv6udp->ipv6.proto != IP_PROTO_UDP)
+ {
+ nwarn("WARNING: Expected UDP protoype: %u vs %s\n",
+ ipv6udp->ipv6.proto, IP_PROTO_UDP);
+ }
+ else
+ {
+ struct sixlowpan_tagaddr_s destmac;
+ FAR uint8_t *buf;
+ uint16_t hdrlen;
+ uint16_t buflen;
+
+ /* Get the IEEE 802.15.4 MAC address of the destination. This
+ * assumes an encoding of the MAC address in the IPv6 address.
+ */
+
+ sixlowpan_addrfromip(ipv6udp->ipv6.destipaddr, &destmac);
+
+ /* Get the IPv6 + UDP combined header length. */
+
+ hdrlen = IPv6_HDRLEN + UDP_HDRLEN;
+
+ /* Drop the packet if the buffer length is less than this. */
+
+ if (hdrlen > dev->d_len)
+ {
+ nwarn("WARNING: Dropping small UDP packet: %u < %u\n",
+ buflen, hdrlen);
+ }
+ else
+ {
+ /* Convert the outgoing packet into a frame list. */
+
+ buf = (FAR uint8_t *)ipv6 + hdrlen;
+ buflen = dev->d_len - hdrlen;
+
+ (void)sixlowpan_queue_frames(
+ (FAR struct ieee802154_driver_s *)fwddev,
+ &ipv6udp->ipv6, buf, buflen, &destmac);
+ }
+ }
+ }
+
+ dev->d_len = 0;
+}
+#endif
+
#endif /* CONFIG_NET_6LOWPAN && CONFIG_NET_UDP */
diff --git a/net/sixlowpan/sixlowpan_utils.c b/net/sixlowpan/sixlowpan_utils.c
index 4772302a7b..b404d37fa6 100644
--- a/net/sixlowpan/sixlowpan_utils.c
+++ b/net/sixlowpan/sixlowpan_utils.c
@@ -227,6 +227,82 @@ bool sixlowpan_ismacbased(const net_ipv6addr_t ipaddr,
}
}
+/****************************************************************************
+ * Name: sixlowpan_coord_eaddr
+ *
+ * Description:
+ * Get the extended address of the PAN coordinator.
+ *
+ * Input parameters:
+ * ieee - A reference IEEE802.15.4 MAC network device structure.
+ * eaddr - The location in which to return the extended address.
+ *
+ * Returned Value:
+ * Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NET_STARPOINT
+int sixlowpan_coord_eaddr(FAR struct ieee802154_driver_s *ieee,
+ FAR uint8_t *eaddr)
+{
+ FAR struct net_driver_s *dev = &ieee->i_dev;
+ struct ieee802154_netmac_s arg;
+ int ret;
+
+ memcpy(arg.ifr_name, ieee->i_dev.d_ifname, IFNAMSIZ);
+ arg.u.getreq.attr = IEEE802154_ATTR_MAC_COORD_EADDR ;
+ ret = dev->d_ioctl(dev, MAC802154IOC_MLME_GET_REQUEST,
+ (unsigned long)((uintptr_t)&arg));
+ if (ret < 0)
+ {
+ nerr("ERROR: MAC802154IOC_MLME_GET_REQUEST failed: %d\n", ret);
+ return ret;
+ }
+
+ IEEE802154_EADDRCOPY(eaddr, arg.u.getreq.attrval.mac.eaddr);
+ return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: sixlowpan_coord_saddr
+ *
+ * Description:
+ * Get the short address of the PAN coordinator.
+ *
+ * Input parameters:
+ * ieee - A reference IEEE802.15.4 MAC network device structure.
+ * saddr - The location in which to return the short address.
+ *
+ * Returned Value:
+ * Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NET_STARPOINT
+int sixlowpan_coord_saddr(FAR struct ieee802154_driver_s *ieee,
+ FAR uint8_t *saddr)
+{
+ FAR struct net_driver_s *dev = &ieee->i_dev;
+ struct ieee802154_netmac_s arg;
+ int ret;
+
+ memcpy(arg.ifr_name, ieee->i_dev.d_ifname, IFNAMSIZ);
+ arg.u.getreq.attr = IEEE802154_ATTR_MAC_COORD_SADDR ;
+ ret = dev->d_ioctl(dev, MAC802154IOC_MLME_GET_REQUEST,
+ (unsigned long)((uintptr_t)&arg));
+ if (ret < 0)
+ {
+ nerr("ERROR: MAC802154IOC_MLME_GET_REQUEST failed: %d\n", ret);
+ return ret;
+ }
+
+ IEEE802154_SADDRCOPY(saddr, arg.u.getreq.attrval.mac.saddr);
+ return OK;
+}
+#endif
+
/****************************************************************************
* Name: sixlowpan_src_panid
*
@@ -256,7 +332,7 @@ int sixlowpan_src_panid(FAR struct ieee802154_driver_s *ieee,
(unsigned long)((uintptr_t)&arg));
if (ret < 0)
{
- wlerr("ERROR: MAC802154IOC_MLME_GET_REQUEST failed: %d\n", ret);
+ nerr("ERROR: MAC802154IOC_MLME_GET_REQUEST failed: %d\n", ret);
return ret;
}
diff --git a/net/usrsock/Make.defs b/net/usrsock/Make.defs
index 2aa069b077..9432883a4d 100644
--- a/net/usrsock/Make.defs
+++ b/net/usrsock/Make.defs
@@ -40,7 +40,7 @@ ifeq ($(CONFIG_NET_USRSOCK),y)
NET_CSRCS += usrsock_close.c usrsock_conn.c usrsock_bind.c usrsock_connect.c
NET_CSRCS += usrsock_dev.c
NET_CSRCS += usrsock_event.c usrsock_getsockname.c usrsock_getsockopt.c
-NET_CSRCS += usrsock_poll.c usrsock_recvfrom.c usrsock_sendto.c
+NET_CSRCS += usrsock_poll.c usrsock_recvfrom.c usrsock_sendto.c
NET_CSRCS += usrsock_setsockopt.c usrsock_socket.c
# Include User Socket build support
diff --git a/net/utils/net_ipv6_mask2pref.c b/net/utils/net_ipv6_mask2pref.c
index 763fc0188a..cc4fd245c8 100644
--- a/net/utils/net_ipv6_mask2pref.c
+++ b/net/utils/net_ipv6_mask2pref.c
@@ -50,7 +50,7 @@
* Private Data
****************************************************************************/
-static const uint8_t g_nibblemap[16] =
+static const uint8_t g_nibblemap[16] =
{
0, 0, 0, 0, 0, 0, 0, 0, /* 0: No bits, 1-7: Should not happen */
1, 1, 1, 1, /* 8: 1 bit, 9-b: Should not happen */
diff --git a/net/utils/net_ipv6_pref2mask.c b/net/utils/net_ipv6_pref2mask.c
index 7155f5856b..3255e17868 100644
--- a/net/utils/net_ipv6_pref2mask.c
+++ b/net/utils/net_ipv6_pref2mask.c
@@ -75,7 +75,7 @@ void net_ipv6_pref2mask(uint8_t preflen, net_ipv6addr_t mask)
* Eg. preflen = 38
* NETMASK: ffff ffff fc00 0000 0000 0000 0000 0000
* bit: 1 1..1
- * 1 1..3 3..4 4..6 6..7 8..9 9..1 1..2
+ * 1 1..3 3..4 4..6 6..7 8..9 9..1 1..2
* 0..5 6..1 2..7 8..3 4..9 0..5 6..1 2..7
* preflen: 1 1..1
* 1 1..3 3..4 4..6 6..8 8..9 9..1 1..2
diff --git a/sched/pthread/pthread_mutextrylock.c b/sched/pthread/pthread_mutextrylock.c
index f4cda697b7..d5701ae722 100644
--- a/sched/pthread/pthread_mutextrylock.c
+++ b/sched/pthread/pthread_mutextrylock.c
@@ -179,7 +179,7 @@ int pthread_mutex_trylock(FAR pthread_mutex_t *mutex)
DEBUGASSERT(mutex->pid != 0); /* < 0: available, >0 owned, ==0 error */
DEBUGASSERT((mutex->flags & _PTHREAD_MFLAGS_INCONSISTENT) != 0);
- /* A thread holds the mutex, but there is no such thread.
+ /* A thread holds the mutex, but there is no such thread.
* POSIX requires that the 'robust' mutex return EOWNERDEAD
* in this case. It is then the caller's responsibility to
* call pthread_mutx_consistent() fo fix the mutex.
diff --git a/sched/sched/sched_setaffinity.c b/sched/sched/sched_setaffinity.c
index 734745e177..bf9daf335a 100644
--- a/sched/sched/sched_setaffinity.c
+++ b/sched/sched/sched_setaffinity.c
@@ -159,5 +159,5 @@ errout_with_csection:
errout_with_lock:
sched_unlock();
set_errno(errcode);
- return ERROR;
+ return ERROR;
}
diff --git a/sched/wqueue/kwork_inherit.c b/sched/wqueue/kwork_inherit.c
index ae4c0e6187..9ea67ee5a3 100644
--- a/sched/wqueue/kwork_inherit.c
+++ b/sched/wqueue/kwork_inherit.c
@@ -154,7 +154,7 @@ static void lpwork_boostworker(pid_t wpid, uint8_t reqprio)
if (reqprio > wtcb->sched_priority)
{
- /* Raise the priority of the worker thread. This cannot cause
+ /* Raise the priority of the worker thread. This cannot cause
* context switch because we have preemption disabled. The task
* will be marked "pending" and the switch will occur during
* sched_unlock() processing.
diff --git a/tools/noteinfo.c b/tools/noteinfo.c
index 54ebdc29c2..3cdc843a30 100644
--- a/tools/noteinfo.c
+++ b/tools/noteinfo.c
@@ -729,7 +729,7 @@ struct note_common_s
};
#define NTYPES 18
-static char *noteid[NTYPES] =
+static char *noteid[NTYPES] =
{
"NOTE_START", /* type = 0 */
"NOTE_STOP", /* type = 1 */
@@ -774,7 +774,7 @@ int main(int argc, char **argv)
unsigned int remainder;
unsigned int value;
char buffer[64];
-
+
notndx = ni_tail;
while (notndx != ni_head)
{
diff --git a/tools/nxstyle.c b/tools/nxstyle.c
index 4fa84eb523..2fb16acf77 100644
--- a/tools/nxstyle.c
+++ b/tools/nxstyle.c
@@ -230,7 +230,7 @@ int main(int argc, char **argv, char **envp)
else if (strncmp(&line[indent], "for ", 4) == 0)
{
- bfor = true;
+ bfor = true;
bstatm = true;
}
else if (strncmp(&line[indent], "switch ", 7) == 0)
@@ -250,7 +250,7 @@ int main(int argc, char **argv, char **envp)
else if (strncmp(&line[indent], "for(", 4) == 0)
{
fprintf(stderr, "Missing whitespace after keyword at line %d:%d\n", lineno, n);
- bfor = true;
+ bfor = true;
bstatm = true;
}
else if (strncmp(&line[indent], "switch(", 7) == 0)
@@ -325,7 +325,7 @@ int main(int argc, char **argv, char **envp)
ncomment = 0;
fprintf(stderr,
"Closing without opening comment at line %d:%d\n",
- lineno, n);
+ lineno, n);
}
}
diff --git a/wireless/ieee802154/mac802154_getset.c b/wireless/ieee802154/mac802154_getset.c
index ba0f5f676a..b1c29f7191 100644
--- a/wireless/ieee802154/mac802154_getset.c
+++ b/wireless/ieee802154/mac802154_getset.c
@@ -92,6 +92,12 @@ int mac802154_req_get(MACHANDLE mac, enum ieee802154_attr_e attr,
case IEEE802154_ATTR_MAC_EADDR:
IEEE802154_EADDRCOPY(attrval->mac.eaddr, priv->addr.eaddr);
break;
+ case IEEE802154_ATTR_MAC_COORD_SADDR:
+ IEEE802154_SADDRCOPY(attrval->mac.coordsaddr, priv->pandesc.coordaddr.saddr);
+ break;
+ case IEEE802154_ATTR_MAC_COORD_EADDR:
+ IEEE802154_EADDRCOPY(attrval->mac.coordeaddr, priv->pandesc.coordaddr.eaddr);
+ break;
case IEEE802154_ATTR_MAC_DEVMODE:
attrval->mac.devmode = priv->devmode;
break;