Clean up pointer handling to make code more readability. This re-introduces the compiler optimization problem but this is the correct thing to do. I will have to drop back from -Os to -O2.
This commit is contained in:
parent
b15cd1653f
commit
18b26dc8e6
@ -1048,13 +1048,15 @@ static void sam_putreg(struct sam_emac_s *priv, uint16_t offset,
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static uint16_t sam_txinuse(struct sam_emac_s *priv, int qid)
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{
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uint32_t txhead32 = (uint32_t)priv->xfrq[qid].txhead;
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if ((uint32_t)priv->xfrq[qid].txtail > txhead32)
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struct sam_queue_s *xfrq = &priv->xfrq[qid];
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uint32_t txhead32 = (uint32_t)xfrq->txhead;
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if ((uint32_t)xfrq->txtail > txhead32)
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{
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txhead32 += priv->xfrq[qid].ntxbuffers;
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txhead32 += xfrq->ntxbuffers;
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}
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return (uint16_t)(txhead32 - (uint32_t)priv->xfrq[qid].txtail);
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return (uint16_t)(txhead32 - (uint32_t)xfrq->txtail);
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}
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/****************************************************************************
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@ -1103,6 +1105,7 @@ static uint16_t sam_txfree(struct sam_emac_s *priv, int qid)
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static int sam_buffer_allocate(struct sam_emac_s *priv)
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{
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#ifdef CONFIG_SAMV7_EMAC_PREALLOCATE
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struct sam_queue_s *xfrq;
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int qid;
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/* Use pre-allocated buffers */
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@ -1121,18 +1124,21 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
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for (qid = 1; qid < EMAC_NQUEUES; qid++)
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{
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priv->xfrq[qid].txdesc = priv->attr->tx1desc;
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priv->xfrq[qid].ntxbuffers = DUMMY_NBUFFERS;
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priv->xfrq[qid].rxdesc = priv->attr->rx1desc;
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priv->xfrq[qid].nrxbuffers = DUMMY_NBUFFERS;
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xfrq = &priv->xfrq[qid];
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priv->xfrq[qid].txbuffer = priv->attr->tx1buffer;
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priv->xfrq[qid].txbufsize = DUMMY_BUFSIZE;
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priv->xfrq[qid].rxbuffer = priv->attr->rx1buffer;
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priv->xfrq[qid].rxbufsize = DUMMY_BUFSIZE;
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xfrq->txdesc = priv->attr->tx1desc;
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xfrq->ntxbuffers = DUMMY_NBUFFERS;
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xfrq->rxdesc = priv->attr->rx1desc;
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xfrq->nrxbuffers = DUMMY_NBUFFERS;
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xfrq->txbuffer = priv->attr->tx1buffer;
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xfrq->txbufsize = DUMMY_BUFSIZE;
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xfrq->rxbuffer = priv->attr->rx1buffer;
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xfrq->rxbufsize = DUMMY_BUFSIZE;
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}
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#else
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struct sam_queue_s *xfrq;
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size_t allocsize;
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int qid;
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@ -1234,17 +1240,19 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
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for (qid = 2; qid < EMAC_NQUEUES; qid++)
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{
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priv->xfrq[qid].txdesc = priv->xfrq[1].txdesc;
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priv->xfrq[qid].rxdesc = priv->xfrq[1].rxdesc;
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xfrq = &priv->xfrq[qid];
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priv->xfrq[qid].txbuffer = priv->xfrq[1].txbuffer;
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priv->xfrq[qid].rxbuffer = priv->xfrq[1].rxbuffer;
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xfrq->txdesc = priv->xfrq[1].txdesc;
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xfrq->rxdesc = priv->xfrq[1].rxdesc;
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priv->xfrq[qid].ntxbuffers = DUMMY_NBUFFERS;
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priv->xfrq[qid].nrxbuffers = DUMMY_NBUFFERS;
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xfrq->txbuffer = priv->xfrq[1].txbuffer;
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xfrq->rxbuffer = priv->xfrq[1].rxbuffer;
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priv->xfrq[qid].txbufsize = DUMMY_BUFSIZE;
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priv->xfrq[qid].rxbufsize = DUMMY_BUFSIZE;
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xfrq->ntxbuffers = DUMMY_NBUFFERS;
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xfrq->nrxbuffers = DUMMY_NBUFFERS;
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xfrq->txbufsize = DUMMY_BUFSIZE;
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xfrq->rxbufsize = DUMMY_BUFSIZE;
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}
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#endif
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@ -1281,43 +1289,45 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
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static void sam_buffer_free(struct sam_emac_s *priv)
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{
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#ifndef CONFIG_SAMV7_EMAC_PREALLOCATE
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struct sam_queue_s *xfrq;
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int qid;
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/* Free allocated buffers */
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for (qid = 0; qid < EMAC_NQUEUES; qid++)
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{
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xfrq = &priv->xfrq[qid];
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if (qid < 2)
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{
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if (priv->xfrq[qid].txdesc)
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if (xfrq->txdesc)
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{
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kmm_free(priv->xfrq[qid].txdesc);
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priv->xfrq[qid].txdesc = NULL;
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kmm_free(xfrq->txdesc);
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xfrq->txdesc = NULL;
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}
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if (priv->xfrq[qid].rxdesc)
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if (xfrq->rxdesc)
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{
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kmm_free(priv->xfrq[qid].rxdesc);
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priv->xfrq[qid].rxdesc = NULL;
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kmm_free(xfrq->rxdesc);
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xfrq->rxdesc = NULL;
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}
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if (priv->xfrq[qid].txbuffer)
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if (xfrq->txbuffer)
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{
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kmm_free(priv->xfrq[qid].txbuffer);
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priv->xfrq[qid].txbuffer = NULL;
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kmm_free(xfrq->txbuffer);
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xfrq->txbuffer = NULL;
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}
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if (priv->xfrq[qid].rxbuffer)
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if (xfrq->rxbuffer)
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{
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kmm_free(priv->xfrq[qid].rxbuffer);
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priv->xfrq[qid].rxbuffer = NULL;
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kmm_free(xfrq->rxbuffer);
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xfrq->rxbuffer = NULL;
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}
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}
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priv->xfrq[qid].txdesc = NULL;
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priv->xfrq[qid].rxdesc = NULL;
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priv->xfrq[qid].txbuffer = NULL;
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priv->xfrq[qid].rxbuffer = NULL;
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xfrq->txdesc = NULL;
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xfrq->rxdesc = NULL;
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xfrq->txbuffer = NULL;
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xfrq->rxbuffer = NULL;
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}
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#endif
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}
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@ -1349,13 +1359,11 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
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{
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struct net_driver_s *dev = &priv->dev;
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volatile struct emac_txdesc_s *txdesc;
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struct sam_queue_s *xfrq;
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uint32_t regval;
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uint32_t status;
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uint16_t txhead;
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nllvdbg("d_len: %d txhead: %d\n", dev->d_len, priv->xfrq[qid].txhead);
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sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
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/* Check parameter */
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if (dev->d_len > EMAC_TX_UNITSIZE)
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@ -1366,8 +1374,12 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
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/* Pointer to the current TX descriptor */
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txhead = priv->xfrq[qid].txhead;
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txdesc = &priv->xfrq[qid].txdesc[txhead];
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xfrq = &priv->xfrq[qid];
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txhead = xfrq->txhead;
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txdesc = &xfrq->txdesc[txhead];
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nllvdbg("d_len: %d txhead[%d]: %d\n", dev->d_len, qid, xfrq->txhead);
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sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
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/* If no free TX descriptor, buffer can't be sent */
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@ -1381,17 +1393,20 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
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if (dev->d_len > 0)
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{
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/* Driver managed the ring buffer */
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/* Copy the data into the driver managed the ring buffer. If we
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* wanted to support zero copy transfers, we would need to make sure
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* that dev->d_buf and txdesc->addr refer to the same memory.
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*/
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memcpy((void *)txdesc->addr, dev->d_buf, dev->d_len);
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arch_clean_dcache((uintptr_t)txdesc->addr,
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(uintptr_t)txdesc->addr + dev->d_len);
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arch_clean_dcache((uint32_t)txdesc->addr,
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(uint32_t)txdesc->addr + dev->d_len);
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}
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/* Update TX descriptor status (with USED=0). */
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status = dev->d_len | EMACTXD_STA_LAST;
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if (txhead == priv->xfrq[qid].ntxbuffers - 1)
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if (txhead == xfrq->ntxbuffers - 1)
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{
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status |= EMACTXD_STA_WRAP;
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}
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@ -1404,12 +1419,12 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
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/* Increment the head index */
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if (++txhead >= priv->xfrq[qid].ntxbuffers)
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if (++txhead >= xfrq->ntxbuffers)
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{
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txhead = 0;
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}
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priv->xfrq[qid].txhead = txhead;
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xfrq->txhead = txhead;
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/* Now start transmission (if it is not already done) */
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@ -1593,6 +1608,7 @@ static void sam_dopoll(struct sam_emac_s *priv, int qid)
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static int sam_recvframe(struct sam_emac_s *priv, int qid)
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{
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volatile struct emac_rxdesc_s *rxdesc;
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struct sam_queue_s *xfrq;
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struct net_driver_s *dev;
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const uint8_t *src;
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uint8_t *dest;
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@ -1611,8 +1627,9 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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dest = dev->d_buf;
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pktlen = 0;
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rxndx = priv->xfrq[qid].rxndx;
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rxdesc = &priv->xfrq[qid].rxdesc[rxndx];
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xfrq = &priv->xfrq[qid];
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rxndx = xfrq->rxndx;
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rxdesc = &xfrq->rxdesc[rxndx];
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isframe = false;
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/* Invalidate the RX descriptor to force re-fetching from RAM. */
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@ -1634,11 +1651,11 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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* start fragment until it is equal to the index with the SOF mark
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*/
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while (rxndx != priv->xfrq[qid].rxndx)
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while (rxndx != xfrq->rxndx)
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{
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/* Give ownership back to the EMAC */
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rxdesc = &priv->xfrq[qid].rxdesc[priv->xfrq[qid].rxndx];
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rxdesc = &xfrq->rxdesc[xfrq->rxndx];
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rxdesc->addr &= ~(EMACRXD_ADDR_OWNER);
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/* Flush the modified RX descriptor to RAM */
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@ -1649,9 +1666,9 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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/* Increment the RX index to the start fragment */
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if (++priv->xfrq[qid].rxndx >= priv->xfrq[qid].nrxbuffers)
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if (++xfrq->rxndx >= xfrq->nrxbuffers)
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{
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priv->xfrq[qid].rxndx = 0;
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xfrq->rxndx = 0;
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}
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}
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@ -1670,7 +1687,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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* of the next frame).
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*/
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if (++rxndx >= priv->xfrq[qid].nrxbuffers)
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if (++rxndx >= xfrq->nrxbuffers)
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{
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rxndx = 0;
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}
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@ -1679,14 +1696,14 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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if (isframe)
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{
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if (rxndx == priv->xfrq[qid].rxndx)
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if (rxndx == xfrq->rxndx)
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{
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nllvdbg("ERROR: No EOF (Invalid or buffers too small)\n");
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do
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{
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/* Give ownership back to the EMAC */
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rxdesc = &priv->xfrq[qid].rxdesc[priv->xfrq[qid].rxndx];
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rxdesc = &xfrq->rxdesc[xfrq->rxndx];
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rxdesc->addr &= ~(EMACRXD_ADDR_OWNER);
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/* Flush the modified RX descriptor to RAM */
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@ -1697,12 +1714,12 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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/* Increment the RX index */
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if (++priv->xfrq[qid].rxndx >= priv->xfrq[qid].nrxbuffers)
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if (++xfrq->rxndx >= xfrq->nrxbuffers)
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{
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priv->xfrq[qid].rxndx = 0;
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xfrq->rxndx = 0;
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}
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}
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while (rxndx != priv->xfrq[qid].rxndx);
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while (rxndx != xfrq->rxndx);
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return -EIO;
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}
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@ -1722,7 +1739,10 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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src = (const uint8_t *)(rxdesc->addr & EMACRXD_ADDR_MASK);
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arch_invalidate_dcache((uintptr_t)src, (uintptr_t)src + copylen);
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/* And do the copy */
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/* Copy the data from the driver managed the ring buffer. If we
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* wanted to support zero copy transfers, we would need to make
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* sure that dev->d_buf and rxdesc->addr refer to the same memory.
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*/
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memcpy(dest, src, copylen);
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dest += copylen;
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@ -1735,19 +1755,18 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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/* Frame size from the EMAC */
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dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
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nllvdbg("packet %d-%d (%d)\n",
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priv->xfrq[qid].rxndx, rxndx, dev->d_len);
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nllvdbg("packet %d-%d (%d)\n", xfrq->rxndx, rxndx, dev->d_len);
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/* All data have been copied in the application frame buffer,
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* release the RX descriptor(s). Loop until all descriptors
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* have been released up to the start of the next frame.
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*/
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while (priv->xfrq[qid].rxndx != rxndx)
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while (xfrq->rxndx != rxndx)
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{
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/* Give ownership back to the EMAC */
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rxdesc = &priv->xfrq[qid].rxdesc[priv->xfrq[qid].rxndx];
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rxdesc = &xfrq->rxdesc[xfrq->rxndx];
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rxdesc->addr &= ~(EMACRXD_ADDR_OWNER);
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/* Flush the modified RX descriptor to RAM */
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@ -1760,9 +1779,9 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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* released.
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*/
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if (++priv->xfrq[qid].rxndx >= priv->xfrq[qid].nrxbuffers)
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if (++xfrq->rxndx >= xfrq->nrxbuffers)
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{
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priv->xfrq[qid].rxndx = 0;
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xfrq->rxndx = 0;
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}
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}
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@ -1771,7 +1790,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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*/
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nllvdbg("rxndx: %d d_len: %d\n",
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priv->xfrq[qid].rxndx, dev->d_len);
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xfrq->rxndx, dev->d_len);
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if (pktlen < dev->d_len)
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{
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nlldbg("ERROR: Buffer size %d; frame size %d\n",
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@ -1804,14 +1823,14 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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* Use it to update the candidate Start-of-Frame.
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*/
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priv->xfrq[qid].rxndx = rxndx;
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xfrq->rxndx = rxndx;
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}
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/* Set-up to process the next fragment. Get the RX descriptor
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* associated with the next fragment.
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*/
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rxdesc = &priv->xfrq[qid].rxdesc[rxndx];
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rxdesc = &xfrq->rxdesc[rxndx];
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/* Invalidate the RX descriptor to force re-fetching from RAM */
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@ -1821,8 +1840,8 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
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/* No packet was found */
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priv->xfrq[qid].rxndx = rxndx;
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nllvdbg("Exit rxndx[%d]: %d\n", qid, priv->xfrq[qid].rxndx);
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xfrq->rxndx = rxndx;
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nllvdbg("Exit rxndx[%d]: %d\n", qid, xfrq->rxndx);
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return -EAGAIN;
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}
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@ -2000,6 +2019,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
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static void sam_txdone(struct sam_emac_s *priv, int qid)
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{
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struct emac_txdesc_s *txdesc;
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struct sam_queue_s *xfrq;
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uint16_t tail;
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/* Are there any outstanding transmissions? Loop until either (1) all of
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@ -2007,12 +2027,14 @@ static void sam_txdone(struct sam_emac_s *priv, int qid)
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* first descriptor that is still in use by the hardware.
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*/
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tail = priv->xfrq[qid].txtail;
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while (tail != priv->xfrq[qid].txhead)
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xfrq = &priv->xfrq[qid];
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tail = xfrq->txtail;
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while (tail != xfrq->txhead)
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{
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/* Yes.. check the next buffer at the tail of the list */
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txdesc = &priv->xfrq[qid].txdesc[tail];
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txdesc = &xfrq->txdesc[tail];
|
||||
arch_invalidate_dcache((uintptr_t)txdesc,
|
||||
(uintptr_t)txdesc + sizeof(struct emac_txdesc_s));
|
||||
|
||||
@ -2031,27 +2053,27 @@ static void sam_txdone(struct sam_emac_s *priv, int qid)
|
||||
|
||||
/* Process all buffers of the current transmitted frame */
|
||||
|
||||
while (tail != priv->xfrq[qid].txhead &&
|
||||
while (tail != xfrq->txhead &&
|
||||
(txdesc->status & EMACTXD_STA_LAST) == 0)
|
||||
{
|
||||
/* Increment the tail index */
|
||||
|
||||
if (++tail >= priv->xfrq[qid].ntxbuffers)
|
||||
if (++tail >= xfrq->ntxbuffers)
|
||||
{
|
||||
tail = 0;
|
||||
}
|
||||
|
||||
/* Get the next TX descriptor */
|
||||
|
||||
txdesc = &priv->xfrq[qid].txdesc[tail];
|
||||
txdesc = &xfrq->txdesc[tail];
|
||||
arch_invalidate_dcache((uintptr_t)txdesc,
|
||||
(uintptr_t)txdesc + sizeof(struct emac_txdesc_s));
|
||||
}
|
||||
|
||||
/* Go to first buffer of the next frame */
|
||||
|
||||
if (tail != priv->xfrq[qid].txhead &&
|
||||
++tail >= priv->xfrq[qid].ntxbuffers)
|
||||
if (tail != xfrq->txhead &&
|
||||
++tail >= xfrq->ntxbuffers)
|
||||
{
|
||||
tail = 0;
|
||||
}
|
||||
@ -2066,7 +2088,7 @@ static void sam_txdone(struct sam_emac_s *priv, int qid)
|
||||
|
||||
/* Save the new tail index */
|
||||
|
||||
priv->xfrq[qid].txtail = tail;
|
||||
xfrq->txtail = tail;
|
||||
|
||||
/* Then poll uIP for new XMIT data */
|
||||
|
||||
@ -2094,6 +2116,7 @@ static void sam_txdone(struct sam_emac_s *priv, int qid)
|
||||
static void sam_txerr_interrupt(FAR struct sam_emac_s *priv, int qid)
|
||||
{
|
||||
struct emac_txdesc_s *txdesc;
|
||||
struct sam_queue_s *xfrq;
|
||||
uint32_t regval;
|
||||
uint16_t tail;
|
||||
|
||||
@ -2127,10 +2150,12 @@ static void sam_txerr_interrupt(FAR struct sam_emac_s *priv, int qid)
|
||||
|
||||
/* Treat frames in TX queue including the ones that caused the error. */
|
||||
|
||||
tail = priv->xfrq[qid].txtail;
|
||||
while (tail != priv->xfrq[qid].txhead)
|
||||
xfrq = &priv->xfrq[qid];
|
||||
tail = xfrq->txtail;
|
||||
|
||||
while (tail != xfrq->txhead)
|
||||
{
|
||||
txdesc = &priv->xfrq[qid].txdesc[tail];
|
||||
txdesc = &xfrq->txdesc[tail];
|
||||
|
||||
/* Make H/W updates to the TX descriptor visible to the CPU. */
|
||||
|
||||
@ -2139,27 +2164,27 @@ static void sam_txerr_interrupt(FAR struct sam_emac_s *priv, int qid)
|
||||
|
||||
/* Go to the last buffer descriptor of the frame */
|
||||
|
||||
while (tail != priv->xfrq[qid].txhead &&
|
||||
while (tail != xfrq->txhead &&
|
||||
(txdesc->status & EMACTXD_STA_LAST) == 0)
|
||||
{
|
||||
/* Increment the tail index */
|
||||
|
||||
if (++tail >= priv->xfrq[qid].ntxbuffers)
|
||||
if (++tail >= xfrq->ntxbuffers)
|
||||
{
|
||||
tail = 0;
|
||||
}
|
||||
|
||||
/* Get the next TX descriptor */
|
||||
|
||||
txdesc = &priv->xfrq[qid].txdesc[tail];
|
||||
txdesc = &xfrq->txdesc[tail];
|
||||
arch_invalidate_dcache((uintptr_t)txdesc,
|
||||
(uintptr_t)txdesc + sizeof(struct emac_txdesc_s));
|
||||
}
|
||||
|
||||
/* Go to first buffer of the next frame */
|
||||
|
||||
if (tail != priv->xfrq[qid].txhead &&
|
||||
++tail >= priv->xfrq[qid].ntxbuffers)
|
||||
if (tail != xfrq->txhead &&
|
||||
++tail >= xfrq->ntxbuffers)
|
||||
{
|
||||
tail = 0;
|
||||
}
|
||||
@ -2167,7 +2192,7 @@ static void sam_txerr_interrupt(FAR struct sam_emac_s *priv, int qid)
|
||||
|
||||
/* Save the new tail index */
|
||||
|
||||
priv->xfrq[qid].txtail = tail;
|
||||
xfrq->txtail = tail;
|
||||
|
||||
/* Reset TX queue */
|
||||
|
||||
@ -4444,13 +4469,20 @@ static inline void sam_ethgpioconfig(struct sam_emac_s *priv)
|
||||
|
||||
static void sam_txreset(struct sam_emac_s *priv, int qid)
|
||||
{
|
||||
uint8_t *txbuffer = priv->xfrq[qid].txbuffer;
|
||||
struct emac_txdesc_s *txdesc = priv->xfrq[qid].txdesc;
|
||||
struct emac_txdesc_s *txdesc;
|
||||
struct sam_queue_s *xfrq;
|
||||
uint8_t *txbuffer;
|
||||
uintptr_t bufaddr;
|
||||
uintptr_t regaddr;
|
||||
uint32_t regval;
|
||||
int ndx;
|
||||
|
||||
/* Get some convenience pointers */
|
||||
|
||||
xfrq = &priv->xfrq[qid];
|
||||
txdesc = xfrq->txdesc;
|
||||
txbuffer = xfrq->txbuffer;
|
||||
|
||||
/* Disable TX */
|
||||
|
||||
regval = sam_getreg(priv, SAM_EMAC_NCR_OFFSET);
|
||||
@ -4459,12 +4491,12 @@ static void sam_txreset(struct sam_emac_s *priv, int qid)
|
||||
|
||||
/* Configure the TX descriptors. */
|
||||
|
||||
priv->xfrq[qid].txhead = 0;
|
||||
priv->xfrq[qid].txtail = 0;
|
||||
xfrq->txhead = 0;
|
||||
xfrq->txtail = 0;
|
||||
|
||||
for (ndx = 0; ndx < priv->xfrq[qid].ntxbuffers; ndx++)
|
||||
for (ndx = 0; ndx < xfrq->ntxbuffers; ndx++)
|
||||
{
|
||||
bufaddr = (uintptr_t)&txbuffer[ndx * priv->xfrq[qid].txbufsize];
|
||||
bufaddr = (uintptr_t)&txbuffer[ndx * xfrq->txbufsize];
|
||||
|
||||
/* Set the buffer address and mark the descriptor as in used by firmware */
|
||||
|
||||
@ -4474,14 +4506,14 @@ static void sam_txreset(struct sam_emac_s *priv, int qid)
|
||||
|
||||
/* Mark the final descriptor in the list */
|
||||
|
||||
txdesc[priv->xfrq[qid].ntxbuffers - 1].status =
|
||||
txdesc[xfrq->ntxbuffers - 1].status =
|
||||
EMACTXD_STA_USED | EMACTXD_STA_WRAP;
|
||||
|
||||
/* Flush the entire TX descriptor table to RAM */
|
||||
|
||||
arch_clean_dcache((uintptr_t)txdesc,
|
||||
(uintptr_t)txdesc +
|
||||
priv->xfrq[qid].ntxbuffers * sizeof(struct emac_txdesc_s));
|
||||
xfrq->ntxbuffers * sizeof(struct emac_txdesc_s));
|
||||
|
||||
/* Set the Transmit Buffer Queue Pointer Register */
|
||||
|
||||
@ -4508,13 +4540,20 @@ static void sam_txreset(struct sam_emac_s *priv, int qid)
|
||||
|
||||
static void sam_rxreset(struct sam_emac_s *priv, int qid)
|
||||
{
|
||||
struct emac_rxdesc_s *rxdesc = priv->xfrq[qid].rxdesc;
|
||||
uint8_t *rxbuffer = priv->xfrq[qid].rxbuffer;
|
||||
struct emac_rxdesc_s *rxdesc;
|
||||
struct sam_queue_s *xfrq;
|
||||
uint8_t *rxbuffer;
|
||||
uintptr_t bufaddr;
|
||||
uintptr_t regaddr;
|
||||
uint32_t regval;
|
||||
int ndx;
|
||||
|
||||
/* Get some convenience pointers */
|
||||
|
||||
xfrq = &priv->xfrq[qid];
|
||||
rxdesc = xfrq->rxdesc;
|
||||
rxbuffer = xfrq->rxbuffer;
|
||||
|
||||
/* Disable RX */
|
||||
|
||||
regval = sam_getreg(priv, SAM_EMAC_NCR_OFFSET);
|
||||
@ -4523,10 +4562,10 @@ static void sam_rxreset(struct sam_emac_s *priv, int qid)
|
||||
|
||||
/* Configure the RX descriptors. */
|
||||
|
||||
priv->xfrq[qid].rxndx = 0;
|
||||
xfrq->rxndx = 0;
|
||||
for (ndx = 0; ndx < priv->attr->nrxbuffers; ndx++)
|
||||
{
|
||||
bufaddr = (uintptr_t)&rxbuffer[ndx * priv->xfrq[qid].rxbufsize];
|
||||
bufaddr = (uintptr_t)&rxbuffer[ndx * xfrq->rxbufsize];
|
||||
DEBUGASSERT((bufaddr & ~EMACRXD_ADDR_MASK) == 0);
|
||||
|
||||
/* Set the buffer address and remove EMACRXD_ADDR_OWNER and
|
||||
|
Loading…
Reference in New Issue
Block a user