From 18e2aa2d033da8f93a0961a1a0c3e74bd43dbe60 Mon Sep 17 00:00:00 2001
From: Petro Karashchenko <petro.karashchenko@gmail.com>
Date: Tue, 18 Apr 2023 11:51:46 +0300
Subject: [PATCH] Revert "risv-v/esp32c6: disable custom optimize level
 temporary"

This reverts commit b94cc5ff9211c7318abb2a9395a684f68f7115f7.
---
 boards/risc-v/esp32c6/esp32c6-devkit/configs/coremark/defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/boards/risc-v/esp32c6/esp32c6-devkit/configs/coremark/defconfig b/boards/risc-v/esp32c6/esp32c6-devkit/configs/coremark/defconfig
index 4df52f2cef..5fcd33b030 100644
--- a/boards/risc-v/esp32c6/esp32c6-devkit/configs/coremark/defconfig
+++ b/boards/risc-v/esp32c6/esp32c6-devkit/configs/coremark/defconfig
@@ -17,6 +17,8 @@ CONFIG_ARCH_INTERRUPTSTACK=1536
 CONFIG_ARCH_RISCV=y
 CONFIG_BENCHMARK_COREMARK=y
 CONFIG_BOARD_LOOPSPERMSEC=15000
+CONFIG_DEBUG_CUSTOMOPT=y
+CONFIG_DEBUG_OPTLEVEL="-O3"
 CONFIG_FS_PROCFS=y
 CONFIG_IDLETHREAD_STACKSIZE=3072
 CONFIG_INIT_ENTRYPOINT="coremark_main"