MPFS: Create centralized module for PLIC address handling
Reduce complexity and copy-paste amount by implementing a module to handle calculating PLIC offsets.
This commit is contained in:
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745f00e77d
commit
195705d11f
@ -56,6 +56,7 @@ CHIP_CSRCS += mpfs_irq.c mpfs_irq_dispatch.c
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CHIP_CSRCS += mpfs_lowputc.c mpfs_serial.c
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CHIP_CSRCS += mpfs_lowputc.c mpfs_serial.c
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CHIP_CSRCS += mpfs_start.c mpfs_timerisr.c
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CHIP_CSRCS += mpfs_start.c mpfs_timerisr.c
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CHIP_CSRCS += mpfs_gpio.c mpfs_systemreset.c
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CHIP_CSRCS += mpfs_gpio.c mpfs_systemreset.c
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CHIP_CSRCS += mpfs_plic.c
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ifeq ($(CONFIG_MPFS_DMA),y)
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ifeq ($(CONFIG_MPFS_DMA),y)
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CHIP_CSRCS += mpfs_dma.c
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CHIP_CSRCS += mpfs_dma.c
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@ -37,6 +37,7 @@
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#define MPFS_PLIC_I51 (MPFS_PLIC_BASE + 0x001014)
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#define MPFS_PLIC_I51 (MPFS_PLIC_BASE + 0x001014)
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#define MPFS_HART_MIE_OFFSET (0x100)
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#define MPFS_HART_MIE_OFFSET (0x100)
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#define MPFS_HART_SIE_OFFSET (0x80)
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#define MPFS_PLIC_H0_MIE0 (MPFS_PLIC_BASE + 0x002000)
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#define MPFS_PLIC_H0_MIE0 (MPFS_PLIC_BASE + 0x002000)
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#define MPFS_PLIC_H0_MIE1 (MPFS_PLIC_BASE + 0x002004)
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#define MPFS_PLIC_H0_MIE1 (MPFS_PLIC_BASE + 0x002004)
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@ -35,6 +35,7 @@
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#include "riscv_internal.h"
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#include "riscv_internal.h"
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#include "mpfs.h"
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#include "mpfs.h"
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#include "mpfs_plic.h"
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/****************************************************************************
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/****************************************************************************
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* Public Data
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* Public Data
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@ -62,39 +63,18 @@ void up_irqinitialize(void)
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/* Disable all global interrupts for current hart */
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/* Disable all global interrupts for current hart */
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uintptr_t hart_id = riscv_mhartid();
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uintptr_t iebase = mpfs_plic_get_iebase();
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uint32_t *miebase;
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putreg32(0x0, iebase + 0);
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if (hart_id == 0)
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putreg32(0x0, iebase + 4);
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{
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putreg32(0x0, iebase + 8);
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miebase = (uint32_t *)MPFS_PLIC_H0_MIE0;
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putreg32(0x0, iebase + 12);
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}
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putreg32(0x0, iebase + 16);
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else
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putreg32(0x0, iebase + 20);
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{
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miebase = (uint32_t *)(MPFS_PLIC_H1_MIE0 +
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(hart_id - 1) * MPFS_HART_MIE_OFFSET);
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}
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putreg32(0x0, miebase + 0);
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putreg32(0x0, miebase + 1);
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putreg32(0x0, miebase + 2);
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putreg32(0x0, miebase + 3);
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putreg32(0x0, miebase + 4);
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putreg32(0x0, miebase + 5);
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/* Clear pendings in PLIC (for current hart) */
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/* Clear pendings in PLIC (for current hart) */
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uintptr_t claim_address;
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uintptr_t claim_address = mpfs_plic_get_claimbase();
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if (hart_id == 0)
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{
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claim_address = MPFS_PLIC_H0_MCLAIM;
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}
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else
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{
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claim_address = MPFS_PLIC_H1_MCLAIM +
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((hart_id - 1) * MPFS_PLIC_NEXTHART_OFFSET);
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}
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uint32_t val = getreg32(claim_address);
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uint32_t val = getreg32(claim_address);
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putreg32(val, claim_address);
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putreg32(val, claim_address);
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@ -116,18 +96,7 @@ void up_irqinitialize(void)
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/* Set irq threshold to 0 (permits all global interrupts) */
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/* Set irq threshold to 0 (permits all global interrupts) */
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uint32_t *threshold_address;
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uintptr_t threshold_address = mpfs_plic_get_thresholdbase();
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if (hart_id == 0)
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{
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threshold_address = (uint32_t *)MPFS_PLIC_H0_MTHRESHOLD;
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}
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else
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{
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threshold_address = (uint32_t *)(MPFS_PLIC_H1_MTHRESHOLD +
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((hart_id - 1) *
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MPFS_PLIC_NEXTHART_OFFSET));
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}
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putreg32(0, threshold_address);
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putreg32(0, threshold_address);
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/* currents_regs is non-NULL only while processing an interrupt */
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/* currents_regs is non-NULL only while processing an interrupt */
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@ -180,22 +149,11 @@ void up_disable_irq(int irq)
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/* Clear enable bit for the irq */
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/* Clear enable bit for the irq */
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uintptr_t hart_id = riscv_mhartid();
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uintptr_t iebase = mpfs_plic_get_iebase();
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uintptr_t miebase;
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if (hart_id == 0)
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{
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miebase = MPFS_PLIC_H0_MIE0;
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}
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else
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{
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miebase = MPFS_PLIC_H1_MIE0 +
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((hart_id - 1) * MPFS_HART_MIE_OFFSET);
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}
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if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_EXT_START)
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if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_EXT_START)
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{
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{
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modifyreg32(miebase + (4 * (extirq / 32)), 1 << (extirq % 32), 0);
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modifyreg32(iebase + (4 * (extirq / 32)), 1 << (extirq % 32), 0);
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}
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}
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else
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else
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{
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{
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@ -234,22 +192,11 @@ void up_enable_irq(int irq)
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/* Set enable bit for the irq */
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/* Set enable bit for the irq */
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uintptr_t hart_id = riscv_mhartid();
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uintptr_t iebase = mpfs_plic_get_iebase();
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uintptr_t miebase;
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if (hart_id == 0)
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{
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miebase = MPFS_PLIC_H0_MIE0;
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}
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else
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{
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miebase = MPFS_PLIC_H1_MIE0 +
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((hart_id - 1) * MPFS_HART_MIE_OFFSET);
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}
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if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_EXT_START)
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if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_EXT_START)
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{
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{
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modifyreg32(miebase + (4 * (extirq / 32)), 0, 1 << (extirq % 32));
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modifyreg32(iebase + (4 * (extirq / 32)), 0, 1 << (extirq % 32));
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}
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}
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else
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else
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{
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{
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@ -38,6 +38,8 @@
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#include "hardware/mpfs_memorymap.h"
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#include "hardware/mpfs_memorymap.h"
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#include "hardware/mpfs_plic.h"
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#include "hardware/mpfs_plic.h"
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#include "mpfs_plic.h"
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/****************************************************************************
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/****************************************************************************
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* Public Functions
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* Public Functions
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****************************************************************************/
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****************************************************************************/
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@ -71,18 +73,7 @@ void *riscv_dispatch_irq(uint64_t vector, uint64_t *regs)
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/* Firstly, check if the irq is machine external interrupt */
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/* Firstly, check if the irq is machine external interrupt */
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uintptr_t hart_id = riscv_mhartid();
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uintptr_t claim_address = mpfs_plic_get_claimbase();
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uintptr_t claim_address;
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if (hart_id == 0)
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{
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claim_address = MPFS_PLIC_H0_MCLAIM;
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}
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else
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{
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claim_address = MPFS_PLIC_H1_MCLAIM +
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((hart_id - 1) * MPFS_PLIC_NEXTHART_OFFSET);
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}
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if (irq == RISCV_IRQ_MEXT)
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if (irq == RISCV_IRQ_MEXT)
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{
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{
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130
arch/risc-v/src/mpfs/mpfs_plic.c
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130
arch/risc-v/src/mpfs/mpfs_plic.c
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@ -0,0 +1,130 @@
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/****************************************************************************
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* arch/risc-v/src/mpfs/mpfs_plic.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <arch/irq.h>
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#include "mpfs.h"
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#include "mpfs_plic.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: mpfs_plic_get_iebase
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*
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* Description:
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* Context aware way to query PLIC interrupt enable base address
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*
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* Returned Value:
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* Interrupt enable base address
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*
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****************************************************************************/
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uintptr_t mpfs_plic_get_iebase(void)
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{
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uintptr_t iebase;
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uintptr_t hart_id = riscv_mhartid();
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if (hart_id == 0)
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{
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iebase = MPFS_PLIC_H0_MIE0;
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}
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else
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{
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iebase = MPFS_PLIC_H1_MIE0 + (hart_id - 1) * MPFS_HART_MIE_OFFSET;
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}
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return iebase;
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}
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/****************************************************************************
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* Name: mpfs_plic_get_claimbase
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*
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* Description:
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* Context aware way to query PLIC interrupt claim base address
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*
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* Returned Value:
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* Interrupt enable claim address
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*
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****************************************************************************/
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uintptr_t mpfs_plic_get_claimbase(void)
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{
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uintptr_t claim_address;
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uintptr_t hart_id = riscv_mhartid();
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if (hart_id == 0)
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{
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claim_address = MPFS_PLIC_H0_MCLAIM;
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}
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else
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{
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claim_address = MPFS_PLIC_H1_MCLAIM +
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(hart_id - 1) * MPFS_PLIC_NEXTHART_OFFSET;
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}
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return claim_address;
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}
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/****************************************************************************
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* Name: mpfs_plic_get_thresholdbase
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*
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* Description:
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* Context aware way to query PLIC interrupt threshold base address
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*
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* Returned Value:
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* Interrupt enable threshold address
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*
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****************************************************************************/
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uintptr_t mpfs_plic_get_thresholdbase(void)
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{
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uintptr_t threshold_address;
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uintptr_t hart_id = riscv_mhartid();
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if (hart_id == 0)
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{
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threshold_address = MPFS_PLIC_H0_MTHRESHOLD;
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}
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else
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{
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threshold_address = MPFS_PLIC_H1_MTHRESHOLD +
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(hart_id - 1) * MPFS_PLIC_NEXTHART_OFFSET;
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}
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return threshold_address;
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}
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73
arch/risc-v/src/mpfs/mpfs_plic.h
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73
arch/risc-v/src/mpfs/mpfs_plic.h
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/****************************************************************************
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* arch/risc-v/src/mpfs/mpfs_plic.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISC_V_SRC_MPFS_MPFS_PLIC_H
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#define __ARCH_RISC_V_SRC_MPFS_MPFS_PLIC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <stdint.h>
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: mpfs_plic_get_iebase
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*
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* Description:
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* Context aware way to query PLIC interrupt enable base address
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*
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* Returned Value:
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* Interrupt enable base address
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*
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****************************************************************************/
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uintptr_t mpfs_plic_get_iebase(void);
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/****************************************************************************
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* Name: mpfs_plic_get_claimbase
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*
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* Description:
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* Context aware way to query PLIC interrupt claim base address
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*
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* Returned Value:
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* Interrupt enable claim address
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*
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****************************************************************************/
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uintptr_t mpfs_plic_get_claimbase(void);
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/****************************************************************************
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* Name: mpfs_plic_get_thresholdbase
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*
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* Description:
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* Context aware way to query PLIC interrupt threshold base address
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*
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* Returned Value:
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* Interrupt enable threshold address
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*
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****************************************************************************/
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uintptr_t mpfs_plic_get_thresholdbase(void);
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#endif /* __ARCH_RISC_V_SRC_MPFS_MPFS_PLIC_H */
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